IntelFrameworkPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / SmmCpuSaveState.h

/** @file\r
  This file declares the SMM CPU Save State protocol, which provides the processor\r
  save-state information for IA-32 and Itanium processors.\r
\r
Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
  @par Revision Reference:\r
  This Protocol is defined in Framework of EFI SMM Core Interface Spec\r
  Version 0.91.\r
**/\r
\r
#ifndef _SMM_CPU_SAVE_STATE_H_\r
#define _SMM_CPU_SAVE_STATE_H_\r
\r
#define EFI_SMM_CPU_SAVE_STATE_PROTOCOL_GUID \\r
  { \\r
    0x21f302ad, 0x6e94, 0x471b, {0x84, 0xbc, 0xb1, 0x48, 0x0, 0x40, 0x3a, 0x1d} \\r
  }\r
\r
typedef struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL  EFI_SMM_CPU_SAVE_STATE_PROTOCOL;\r
\r
#define EFI_SMM_MIN_REV_ID_x64  0x30006\r
\r
#pragma pack (1)\r
\r
///\r
/// CPU save-state strcuture for IA32 and X64.\r
///\r
/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because the\r
/// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build\r
/// breaks on many compilers with high warning levels.  Instead, the UINT8 Reserved[0x200]\r
/// field has been moved into EFI_SMM_CPU_STATE32.  This maintains binary compatibility for\r
/// the layout and also maintains source comaptibility for access of all fields in this\r
/// union.\r
///\r
/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because\r
/// the Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure.  These\r
/// have been changed to use the base types defined in the UEFI Specification.\r
///\r
typedef struct {\r
  UINT8   Reserved[0x200];\r
  UINT8   Reserved1[0xf8];  // fe00h\r
  UINT32  SMBASE;           // fef8h\r
  UINT32  SMMRevId;         // fefch\r
  UINT16  IORestart;        // ff00h\r
  UINT16  AutoHALTRestart;  // ff02h\r
  UINT32  IEDBASE;          // ff04h\r
  UINT8   Reserved2[0x98];  // ff08h\r
  UINT32  IOMemAddr;        // ffa0h\r
  UINT32  IOMisc;           // ffa4h\r
  UINT32  _ES;\r
  UINT32  _CS;\r
  UINT32  _SS;\r
  UINT32  _DS;\r
  UINT32  _FS;\r
  UINT32  _GS;\r
  UINT32  _LDTBase;\r
  UINT32  _TR;\r
  UINT32  _DR7;\r
  UINT32  _DR6;\r
  UINT32  _EAX;\r
  UINT32  _ECX;\r
  UINT32  _EDX;\r
  UINT32  _EBX;\r
  UINT32  _ESP;\r
  UINT32  _EBP;\r
  UINT32  _ESI;\r
  UINT32  _EDI;\r
  UINT32  _EIP;\r
  UINT32  _EFLAGS;\r
  UINT32  _CR3;\r
  UINT32  _CR0;\r
} EFI_SMM_CPU_STATE32;\r
\r
///\r
/// This struct declaration does not exctly match the Framework SMM CIS 0.91 because\r
/// the Framework SMM CIS 0.91 uses ASM_XXX for base types in this structure.  These\r
/// have been changed to use the base types defined in the UEFI Specification.\r
///\r
typedef struct {\r
  UINT8   Reserved1[0x1d0];  // fc00h\r
  UINT32  GdtBaseHiDword;    // fdd0h\r
  UINT32  LdtBaseHiDword;    // fdd4h\r
  UINT32  IdtBaseHiDword;    // fdd8h\r
  UINT8   Reserved2[0xc];    // fddch\r
  UINT64  IO_EIP;            // fde8h\r
  UINT8   Reserved3[0x50];   // fdf0h\r
  UINT32  _CR4;              // fe40h\r
  UINT8   Reserved4[0x48];   // fe44h\r
  UINT32  GdtBaseLoDword;    // fe8ch\r
  UINT32  GdtLimit;          // fe90h\r
  UINT32  IdtBaseLoDword;    // fe94h\r
  UINT32  IdtLimit;          // fe98h\r
  UINT32  LdtBaseLoDword;    // fe9ch\r
  UINT32  LdtLimit;          // fea0h\r
  UINT32  LdtInfo;           // fea4h\r
  UINT8   Reserved5[0x50];   // fea8h\r
  UINT32  SMBASE;            // fef8h\r
  UINT32  SMMRevId;          // fefch\r
  UINT16  AutoHALTRestart;   // ff00h\r
  UINT16  IORestart;         // ff02h\r
  UINT32  IEDBASE;           // ff04h\r
  UINT8   Reserved6[0x14];   // ff08h\r
  UINT64  _R15;              // ff1ch\r
  UINT64  _R14;\r
  UINT64  _R13;\r
  UINT64  _R12;\r
  UINT64  _R11;\r
  UINT64  _R10;\r
  UINT64  _R9;\r
  UINT64  _R8;\r
  UINT64  _RAX;              // ff5ch\r
  UINT64  _RCX;\r
  UINT64  _RDX;\r
  UINT64  _RBX;\r
  UINT64  _RSP;\r
  UINT64  _RBP;\r
  UINT64  _RSI;\r
  UINT64  _RDI;\r
  UINT64  IOMemAddr;         // ff9ch\r
  UINT32  IOMisc;            // ffa4h\r
  UINT32  _ES;               // ffa8h\r
  UINT32  _CS;\r
  UINT32  _SS;\r
  UINT32  _DS;\r
  UINT32  _FS;\r
  UINT32  _GS;\r
  UINT32  _LDTR;             // ffc0h\r
  UINT32  _TR;\r
  UINT64  _DR7;              // ffc8h\r
  UINT64  _DR6;\r
  UINT64  _RIP;              // ffd8h\r
  UINT64  IA32_EFER;         // ffe0h\r
  UINT64  _RFLAGS;           // ffe8h\r
  UINT64  _CR3;              // fff0h\r
  UINT64  _CR0;              // fff8h\r
} EFI_SMM_CPU_STATE64;\r
\r
///\r
/// Union of CPU save-state strcutures for IA32 and X64.\r
///\r
/// This union declaration does not exctly match the Framework SMM CIS 0.91 because the\r
/// union in the Framework SMM CIS 0.91 contains an unnamed union member that causes build\r
/// breaks on many compilers with high warning levels.  Instead, the UINT8 Reserved[0x200]\r
/// field has been moved into EFI_SMM_CPU_STATE32.  This maintains binary compatibility for\r
/// the layout and also maintains source comaptibility for access of all fields in this\r
/// union.\r
///\r
typedef union  {\r
  EFI_SMM_CPU_STATE32  x86;\r
  EFI_SMM_CPU_STATE64  x64;\r
} EFI_SMM_CPU_STATE;\r
\r
#pragma pack ()\r
\r
///\r
/// Provides a programatic means to access SMM save state.\r
///\r
struct _EFI_SMM_CPU_SAVE_STATE_PROTOCOL {\r
  ///\r
  /// Reference to a list of save states.\r
  ///\r
  EFI_SMM_CPU_STATE  **CpuSaveState;\r
};\r
\r
extern EFI_GUID gEfiSmmCpuSaveStateProtocolGuid;\r
\r
#endif\r