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1/** @file\r
2 Provides string functions, linked list functions, math functions, synchronization\r
3 functions, and CPU architecture-specific functions.\r
4\r
5Copyright (c) 2006 - 2008, Intel Corporation<BR>\r
6Portions Copyright (c) 2008-2009 Apple Inc.<BR>\r
7All rights reserved. This program and the accompanying materials\r
8are licensed and made available under the terms and conditions of the BSD License\r
9which accompanies this distribution. The full text of the license may be found at\r
10http://opensource.org/licenses/bsd-license.php\r
11\r
12THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15**/\r
16\r
17#ifndef __BASE_LIB__\r
18#define __BASE_LIB__\r
19\r
20//\r
21// Definitions for architecture-specific types\r
22//\r
23#if defined (MDE_CPU_IA32)\r
24///\r
25/// IA-32 architecture context buffer used by SetJump() and LongJump()\r
26///\r
27typedef struct {\r
28 UINT32 Ebx;\r
29 UINT32 Esi;\r
30 UINT32 Edi;\r
31 UINT32 Ebp;\r
32 UINT32 Esp;\r
33 UINT32 Eip;\r
34} BASE_LIBRARY_JUMP_BUFFER;\r
35\r
36#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
37\r
38#endif // defined (MDE_CPU_IA32)\r
39\r
40#if defined (MDE_CPU_IPF)\r
41\r
42///\r
43/// Itanium architecture context buffer used by SetJump() and LongJump()\r
44///\r
45typedef struct {\r
46 UINT64 F2[2];\r
47 UINT64 F3[2];\r
48 UINT64 F4[2];\r
49 UINT64 F5[2];\r
50 UINT64 F16[2];\r
51 UINT64 F17[2];\r
52 UINT64 F18[2];\r
53 UINT64 F19[2];\r
54 UINT64 F20[2];\r
55 UINT64 F21[2];\r
56 UINT64 F22[2];\r
57 UINT64 F23[2];\r
58 UINT64 F24[2];\r
59 UINT64 F25[2];\r
60 UINT64 F26[2];\r
61 UINT64 F27[2];\r
62 UINT64 F28[2];\r
63 UINT64 F29[2];\r
64 UINT64 F30[2];\r
65 UINT64 F31[2];\r
66 UINT64 R4;\r
67 UINT64 R5;\r
68 UINT64 R6;\r
69 UINT64 R7;\r
70 UINT64 SP;\r
71 UINT64 BR0;\r
72 UINT64 BR1;\r
73 UINT64 BR2;\r
74 UINT64 BR3;\r
75 UINT64 BR4;\r
76 UINT64 BR5;\r
77 UINT64 InitialUNAT;\r
78 UINT64 AfterSpillUNAT;\r
79 UINT64 PFS;\r
80 UINT64 BSP;\r
81 UINT64 Predicates;\r
82 UINT64 LoopCount;\r
83 UINT64 FPSR;\r
84} BASE_LIBRARY_JUMP_BUFFER;\r
85\r
86#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 0x10\r
87\r
88#endif // defined (MDE_CPU_IPF)\r
89\r
90#if defined (MDE_CPU_X64)\r
91///\r
92/// x64 architecture context buffer used by SetJump() and LongJump()\r
93///\r
94typedef struct {\r
95 UINT64 Rbx;\r
96 UINT64 Rsp;\r
97 UINT64 Rbp;\r
98 UINT64 Rdi;\r
99 UINT64 Rsi;\r
100 UINT64 R12;\r
101 UINT64 R13;\r
102 UINT64 R14;\r
103 UINT64 R15;\r
104 UINT64 Rip;\r
105 UINT64 MxCsr;\r
106 UINT8 XmmBuffer[160]; ///< XMM6-XMM15\r
107} BASE_LIBRARY_JUMP_BUFFER;\r
108\r
109#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
110\r
111#endif // defined (MDE_CPU_X64)\r
112\r
113#if defined (MDE_CPU_EBC)\r
114///\r
115/// EBC context buffer used by SetJump() and LongJump()\r
116///\r
117typedef struct {\r
118 UINT64 R0;\r
119 UINT64 R1;\r
120 UINT64 R2;\r
121 UINT64 R3;\r
122 UINT64 IP;\r
123} BASE_LIBRARY_JUMP_BUFFER;\r
124\r
125#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8\r
126\r
127#endif // defined (MDE_CPU_EBC)\r
128\r
129#if defined (MDE_CPU_ARM)\r
130\r
131typedef struct {\r
132 UINT32 R3; ///< Copy of R13\r
133 UINT32 R4;\r
134 UINT32 R5;\r
135 UINT32 R6;\r
136 UINT32 R7;\r
137 UINT32 R8;\r
138 UINT32 R9;\r
139 UINT32 R10;\r
140 UINT32 R11;\r
141 UINT32 R12;\r
142 UINT32 R14;\r
143} BASE_LIBRARY_JUMP_BUFFER;\r
144\r
145#define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 4\r
146\r
147#endif // defined (MDE_CPU_ARM)\r
148\r
149//\r
150// String Services\r
151//\r
152\r
153/**\r
154 Copies one Null-terminated Unicode string to another Null-terminated Unicode\r
155 string and returns the new Unicode string.\r
156\r
157 This function copies the contents of the Unicode string Source to the Unicode\r
158 string Destination, and returns Destination. If Source and Destination\r
159 overlap, then the results are undefined.\r
160\r
161 If Destination is NULL, then ASSERT().\r
162 If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
163 If Source is NULL, then ASSERT().\r
164 If Source is not aligned on a 16-bit boundary, then ASSERT().\r
165 If Source and Destination overlap, then ASSERT().\r
166 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
167 PcdMaximumUnicodeStringLength Unicode characters not including the\r
168 Null-terminator, then ASSERT().\r
169\r
170 @param Destination Pointer to a Null-terminated Unicode string.\r
171 @param Source Pointer to a Null-terminated Unicode string.\r
172\r
173 @return Destination.\r
174\r
175**/\r
176CHAR16 *\r
177EFIAPI\r
178StrCpy (\r
179 OUT CHAR16 *Destination,\r
180 IN CONST CHAR16 *Source\r
181 );\r
182\r
183\r
184/**\r
185 Copies up to a specified length from one Null-terminated Unicode string to \r
186 another Null-terminated Unicode string and returns the new Unicode string.\r
187\r
188 This function copies the contents of the Unicode string Source to the Unicode\r
189 string Destination, and returns Destination. At most, Length Unicode\r
190 characters are copied from Source to Destination. If Length is 0, then\r
191 Destination is returned unmodified. If Length is greater that the number of\r
192 Unicode characters in Source, then Destination is padded with Null Unicode\r
193 characters. If Source and Destination overlap, then the results are\r
194 undefined.\r
195\r
196 If Length > 0 and Destination is NULL, then ASSERT().\r
197 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
198 If Length > 0 and Source is NULL, then ASSERT().\r
199 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
200 If Source and Destination overlap, then ASSERT().\r
201 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
202 PcdMaximumUnicodeStringLength, then ASSERT().\r
203 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
204 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
205 then ASSERT().\r
206\r
207 @param Destination Pointer to a Null-terminated Unicode string.\r
208 @param Source Pointer to a Null-terminated Unicode string.\r
209 @param Length Maximum number of Unicode characters to copy.\r
210\r
211 @return Destination.\r
212\r
213**/\r
214CHAR16 *\r
215EFIAPI\r
216StrnCpy (\r
217 OUT CHAR16 *Destination,\r
218 IN CONST CHAR16 *Source,\r
219 IN UINTN Length\r
220 );\r
221\r
222\r
223/**\r
224 Returns the length of a Null-terminated Unicode string.\r
225\r
226 This function returns the number of Unicode characters in the Null-terminated\r
227 Unicode string specified by String.\r
228\r
229 If String is NULL, then ASSERT().\r
230 If String is not aligned on a 16-bit boundary, then ASSERT().\r
231 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
232 PcdMaximumUnicodeStringLength Unicode characters not including the\r
233 Null-terminator, then ASSERT().\r
234\r
235 @param String Pointer to a Null-terminated Unicode string.\r
236\r
237 @return The length of String.\r
238\r
239**/\r
240UINTN\r
241EFIAPI\r
242StrLen (\r
243 IN CONST CHAR16 *String\r
244 );\r
245\r
246\r
247/**\r
248 Returns the size of a Null-terminated Unicode string in bytes, including the\r
249 Null terminator.\r
250\r
251 This function returns the size, in bytes, of the Null-terminated Unicode string \r
252 specified by String.\r
253\r
254 If String is NULL, then ASSERT().\r
255 If String is not aligned on a 16-bit boundary, then ASSERT().\r
256 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
257 PcdMaximumUnicodeStringLength Unicode characters not including the\r
258 Null-terminator, then ASSERT().\r
259\r
260 @param String Pointer to a Null-terminated Unicode string.\r
261\r
262 @return The size of String.\r
263\r
264**/\r
265UINTN\r
266EFIAPI\r
267StrSize (\r
268 IN CONST CHAR16 *String\r
269 );\r
270\r
271\r
272/**\r
273 Compares two Null-terminated Unicode strings, and returns the difference\r
274 between the first mismatched Unicode characters.\r
275\r
276 This function compares the Null-terminated Unicode string FirstString to the\r
277 Null-terminated Unicode string SecondString. If FirstString is identical to\r
278 SecondString, then 0 is returned. Otherwise, the value returned is the first\r
279 mismatched Unicode character in SecondString subtracted from the first\r
280 mismatched Unicode character in FirstString.\r
281\r
282 If FirstString is NULL, then ASSERT().\r
283 If FirstString is not aligned on a 16-bit boundary, then ASSERT().\r
284 If SecondString is NULL, then ASSERT().\r
285 If SecondString is not aligned on a 16-bit boundary, then ASSERT().\r
286 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more\r
287 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
288 Null-terminator, then ASSERT().\r
289 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more\r
290 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
291 Null-terminator, then ASSERT().\r
292\r
293 @param FirstString Pointer to a Null-terminated Unicode string.\r
294 @param SecondString Pointer to a Null-terminated Unicode string.\r
295\r
296 @retval 0 FirstString is identical to SecondString.\r
297 @return others FirstString is not identical to SecondString.\r
298\r
299**/\r
300INTN\r
301EFIAPI\r
302StrCmp (\r
303 IN CONST CHAR16 *FirstString,\r
304 IN CONST CHAR16 *SecondString\r
305 );\r
306\r
307\r
308/**\r
309 Compares up to a specified length the contents of two Null-terminated Unicode strings,\r
310 and returns the difference between the first mismatched Unicode characters.\r
311 \r
312 This function compares the Null-terminated Unicode string FirstString to the\r
313 Null-terminated Unicode string SecondString. At most, Length Unicode\r
314 characters will be compared. If Length is 0, then 0 is returned. If\r
315 FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
316 value returned is the first mismatched Unicode character in SecondString\r
317 subtracted from the first mismatched Unicode character in FirstString.\r
318\r
319 If Length > 0 and FirstString is NULL, then ASSERT().\r
320 If Length > 0 and FirstString is not aligned on a 16-bit boundary, then ASSERT().\r
321 If Length > 0 and SecondString is NULL, then ASSERT().\r
322 If Length > 0 and SecondString is not aligned on a 16-bit boundary, then ASSERT().\r
323 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than\r
324 PcdMaximumUnicodeStringLength, then ASSERT().\r
325 If PcdMaximumUnicodeStringLength is not zero, and FirstString contains more than\r
326 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
327 then ASSERT().\r
328 If PcdMaximumUnicodeStringLength is not zero, and SecondString contains more than\r
329 PcdMaximumUnicodeStringLength Unicode characters, not including the Null-terminator,\r
330 then ASSERT().\r
331\r
332 @param FirstString Pointer to a Null-terminated Unicode string.\r
333 @param SecondString Pointer to a Null-terminated Unicode string.\r
334 @param Length Maximum number of Unicode characters to compare.\r
335\r
336 @retval 0 FirstString is identical to SecondString.\r
337 @return others FirstString is not identical to SecondString.\r
338\r
339**/\r
340INTN\r
341EFIAPI\r
342StrnCmp (\r
343 IN CONST CHAR16 *FirstString,\r
344 IN CONST CHAR16 *SecondString,\r
345 IN UINTN Length\r
346 );\r
347\r
348\r
349/**\r
350 Concatenates one Null-terminated Unicode string to another Null-terminated\r
351 Unicode string, and returns the concatenated Unicode string.\r
352\r
353 This function concatenates two Null-terminated Unicode strings. The contents\r
354 of Null-terminated Unicode string Source are concatenated to the end of\r
355 Null-terminated Unicode string Destination. The Null-terminated concatenated\r
356 Unicode String is returned. If Source and Destination overlap, then the\r
357 results are undefined.\r
358\r
359 If Destination is NULL, then ASSERT().\r
360 If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
361 If Source is NULL, then ASSERT().\r
362 If Source is not aligned on a 16-bit boundary, then ASSERT().\r
363 If Source and Destination overlap, then ASSERT().\r
364 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
365 than PcdMaximumUnicodeStringLength Unicode characters not including the\r
366 Null-terminator, then ASSERT().\r
367 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
368 PcdMaximumUnicodeStringLength Unicode characters not including the\r
369 Null-terminator, then ASSERT().\r
370 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
371 and Source results in a Unicode string with more than\r
372 PcdMaximumUnicodeStringLength Unicode characters not including the\r
373 Null-terminator, then ASSERT().\r
374\r
375 @param Destination Pointer to a Null-terminated Unicode string.\r
376 @param Source Pointer to a Null-terminated Unicode string.\r
377\r
378 @return Destination.\r
379\r
380**/\r
381CHAR16 *\r
382EFIAPI\r
383StrCat (\r
384 IN OUT CHAR16 *Destination,\r
385 IN CONST CHAR16 *Source\r
386 );\r
387\r
388\r
389/**\r
390 Concatenates up to a specified length one Null-terminated Unicode to the end \r
391 of another Null-terminated Unicode string, and returns the concatenated \r
392 Unicode string.\r
393\r
394 This function concatenates two Null-terminated Unicode strings. The contents\r
395 of Null-terminated Unicode string Source are concatenated to the end of\r
396 Null-terminated Unicode string Destination, and Destination is returned. At\r
397 most, Length Unicode characters are concatenated from Source to the end of\r
398 Destination, and Destination is always Null-terminated. If Length is 0, then\r
399 Destination is returned unmodified. If Source and Destination overlap, then\r
400 the results are undefined.\r
401\r
402 If Destination is NULL, then ASSERT().\r
403 If Length > 0 and Destination is not aligned on a 16-bit boundary, then ASSERT().\r
404 If Length > 0 and Source is NULL, then ASSERT().\r
405 If Length > 0 and Source is not aligned on a 16-bit boundary, then ASSERT().\r
406 If Source and Destination overlap, then ASSERT().\r
407 If PcdMaximumUnicodeStringLength is not zero, and Length is greater than \r
408 PcdMaximumUnicodeStringLength, then ASSERT().\r
409 If PcdMaximumUnicodeStringLength is not zero, and Destination contains more\r
410 than PcdMaximumUnicodeStringLength Unicode characters, not including the\r
411 Null-terminator, then ASSERT().\r
412 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
413 PcdMaximumUnicodeStringLength Unicode characters, not including the\r
414 Null-terminator, then ASSERT().\r
415 If PcdMaximumUnicodeStringLength is not zero, and concatenating Destination\r
416 and Source results in a Unicode string with more than PcdMaximumUnicodeStringLength\r
417 Unicode characters, not including the Null-terminator, then ASSERT().\r
418\r
419 @param Destination Pointer to a Null-terminated Unicode string.\r
420 @param Source Pointer to a Null-terminated Unicode string.\r
421 @param Length Maximum number of Unicode characters to concatenate from\r
422 Source.\r
423\r
424 @return Destination.\r
425\r
426**/\r
427CHAR16 *\r
428EFIAPI\r
429StrnCat (\r
430 IN OUT CHAR16 *Destination,\r
431 IN CONST CHAR16 *Source,\r
432 IN UINTN Length\r
433 );\r
434\r
435/**\r
436 Returns the first occurrence of a Null-terminated Unicode sub-string\r
437 in a Null-terminated Unicode string.\r
438\r
439 This function scans the contents of the Null-terminated Unicode string\r
440 specified by String and returns the first occurrence of SearchString.\r
441 If SearchString is not found in String, then NULL is returned. If\r
442 the length of SearchString is zero, then String is\r
443 returned.\r
444\r
445 If String is NULL, then ASSERT().\r
446 If String is not aligned on a 16-bit boundary, then ASSERT().\r
447 If SearchString is NULL, then ASSERT().\r
448 If SearchString is not aligned on a 16-bit boundary, then ASSERT().\r
449\r
450 If PcdMaximumUnicodeStringLength is not zero, and SearchString\r
451 or String contains more than PcdMaximumUnicodeStringLength Unicode\r
452 characters not including the Null-terminator, then ASSERT().\r
453\r
454 @param String Pointer to a Null-terminated Unicode string.\r
455 @param SearchString Pointer to a Null-terminated Unicode string to search for.\r
456\r
457 @retval NULL If the SearchString does not appear in String.\r
458 @return others If there is a match.\r
459\r
460**/\r
461CHAR16 *\r
462EFIAPI\r
463StrStr (\r
464 IN CONST CHAR16 *String,\r
465 IN CONST CHAR16 *SearchString\r
466 );\r
467\r
468/**\r
469 Convert a Null-terminated Unicode decimal string to a value of\r
470 type UINTN.\r
471\r
472 This function returns a value of type UINTN by interpreting the contents\r
473 of the Unicode string specified by String as a decimal number. The format\r
474 of the input Unicode string String is:\r
475\r
476 [spaces] [decimal digits].\r
477\r
478 The valid decimal digit character is in the range [0-9]. The\r
479 function will ignore the pad space, which includes spaces or\r
480 tab characters, before [decimal digits]. The running zero in the\r
481 beginning of [decimal digits] will be ignored. Then, the function\r
482 stops at the first character that is a not a valid decimal character\r
483 or a Null-terminator, whichever one comes first.\r
484\r
485 If String is NULL, then ASSERT().\r
486 If String is not aligned in a 16-bit boundary, then ASSERT().\r
487 If String has only pad spaces, then 0 is returned.\r
488 If String has no pad spaces or valid decimal digits,\r
489 then 0 is returned.\r
490 If the number represented by String overflows according\r
491 to the range defined by UINTN, then ASSERT().\r
492\r
493 If PcdMaximumUnicodeStringLength is not zero, and String contains\r
494 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
495 the Null-terminator, then ASSERT().\r
496\r
497 @param String Pointer to a Null-terminated Unicode string.\r
498\r
499 @retval Value translated from String.\r
500\r
501**/\r
502UINTN\r
503EFIAPI\r
504StrDecimalToUintn (\r
505 IN CONST CHAR16 *String\r
506 );\r
507\r
508/**\r
509 Convert a Null-terminated Unicode decimal string to a value of\r
510 type UINT64.\r
511\r
512 This function returns a value of type UINT64 by interpreting the contents\r
513 of the Unicode string specified by String as a decimal number. The format\r
514 of the input Unicode string String is:\r
515\r
516 [spaces] [decimal digits].\r
517\r
518 The valid decimal digit character is in the range [0-9]. The\r
519 function will ignore the pad space, which includes spaces or\r
520 tab characters, before [decimal digits]. The running zero in the\r
521 beginning of [decimal digits] will be ignored. Then, the function\r
522 stops at the first character that is a not a valid decimal character\r
523 or a Null-terminator, whichever one comes first.\r
524\r
525 If String is NULL, then ASSERT().\r
526 If String is not aligned in a 16-bit boundary, then ASSERT().\r
527 If String has only pad spaces, then 0 is returned.\r
528 If String has no pad spaces or valid decimal digits,\r
529 then 0 is returned.\r
530 If the number represented by String overflows according\r
531 to the range defined by UINT64, then ASSERT().\r
532\r
533 If PcdMaximumUnicodeStringLength is not zero, and String contains\r
534 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
535 the Null-terminator, then ASSERT().\r
536\r
537 @param String Pointer to a Null-terminated Unicode string.\r
538\r
539 @retval Value translated from String.\r
540\r
541**/\r
542UINT64\r
543EFIAPI\r
544StrDecimalToUint64 (\r
545 IN CONST CHAR16 *String\r
546 );\r
547 \r
548\r
549/**\r
550 Convert a Null-terminated Unicode hexadecimal string to a value of type UINTN.\r
551\r
552 This function returns a value of type UINTN by interpreting the contents\r
553 of the Unicode string specified by String as a hexadecimal number.\r
554 The format of the input Unicode string String is:\r
555\r
556 [spaces][zeros][x][hexadecimal digits].\r
557\r
558 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
559 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
560 If "x" appears in the input string, it must be prefixed with at least one 0.\r
561 The function will ignore the pad space, which includes spaces or tab characters,\r
562 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
563 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
564 first valid hexadecimal digit. Then, the function stops at the first character that is\r
565 a not a valid hexadecimal character or NULL, whichever one comes first.\r
566\r
567 If String is NULL, then ASSERT().\r
568 If String is not aligned in a 16-bit boundary, then ASSERT().\r
569 If String has only pad spaces, then zero is returned.\r
570 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
571 then zero is returned.\r
572 If the number represented by String overflows according to the range defined by\r
573 UINTN, then ASSERT().\r
574\r
575 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
576 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
577 then ASSERT().\r
578\r
579 @param String Pointer to a Null-terminated Unicode string.\r
580\r
581 @retval Value translated from String.\r
582\r
583**/\r
584UINTN\r
585EFIAPI\r
586StrHexToUintn (\r
587 IN CONST CHAR16 *String\r
588 );\r
589\r
590\r
591/**\r
592 Convert a Null-terminated Unicode hexadecimal string to a value of type UINT64.\r
593\r
594 This function returns a value of type UINT64 by interpreting the contents\r
595 of the Unicode string specified by String as a hexadecimal number.\r
596 The format of the input Unicode string String is\r
597\r
598 [spaces][zeros][x][hexadecimal digits].\r
599\r
600 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
601 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix.\r
602 If "x" appears in the input string, it must be prefixed with at least one 0.\r
603 The function will ignore the pad space, which includes spaces or tab characters,\r
604 before [zeros], [x] or [hexadecimal digit]. The running zero before [x] or\r
605 [hexadecimal digit] will be ignored. Then, the decoding starts after [x] or the\r
606 first valid hexadecimal digit. Then, the function stops at the first character that is\r
607 a not a valid hexadecimal character or NULL, whichever one comes first.\r
608\r
609 If String is NULL, then ASSERT().\r
610 If String is not aligned in a 16-bit boundary, then ASSERT().\r
611 If String has only pad spaces, then zero is returned.\r
612 If String has no leading pad spaces, leading zeros or valid hexadecimal digits,\r
613 then zero is returned.\r
614 If the number represented by String overflows according to the range defined by\r
615 UINT64, then ASSERT().\r
616\r
617 If PcdMaximumUnicodeStringLength is not zero, and String contains more than\r
618 PcdMaximumUnicodeStringLength Unicode characters not including the Null-terminator,\r
619 then ASSERT().\r
620\r
621 @param String Pointer to a Null-terminated Unicode string.\r
622\r
623 @retval Value translated from String.\r
624\r
625**/\r
626UINT64\r
627EFIAPI\r
628StrHexToUint64 (\r
629 IN CONST CHAR16 *String\r
630 );\r
631\r
632/**\r
633 Convert a Null-terminated Unicode string to a Null-terminated\r
634 ASCII string and returns the ASCII string.\r
635\r
636 This function converts the content of the Unicode string Source\r
637 to the ASCII string Destination by copying the lower 8 bits of\r
638 each Unicode character. It returns Destination.\r
639\r
640 If any Unicode characters in Source contain non-zero value in\r
641 the upper 8 bits, then ASSERT().\r
642\r
643 If Destination is NULL, then ASSERT().\r
644 If Source is NULL, then ASSERT().\r
645 If Source is not aligned on a 16-bit boundary, then ASSERT().\r
646 If Source and Destination overlap, then ASSERT().\r
647\r
648 If PcdMaximumUnicodeStringLength is not zero, and Source contains\r
649 more than PcdMaximumUnicodeStringLength Unicode characters not including\r
650 the Null-terminator, then ASSERT().\r
651\r
652 If PcdMaximumAsciiStringLength is not zero, and Source contains more\r
653 than PcdMaximumAsciiStringLength Unicode characters not including the\r
654 Null-terminator, then ASSERT().\r
655\r
656 @param Source Pointer to a Null-terminated Unicode string.\r
657 @param Destination Pointer to a Null-terminated ASCII string.\r
658\r
659 @return Destination.\r
660\r
661**/\r
662CHAR8 *\r
663EFIAPI\r
664UnicodeStrToAsciiStr (\r
665 IN CONST CHAR16 *Source,\r
666 OUT CHAR8 *Destination\r
667 );\r
668\r
669\r
670/**\r
671 Copies one Null-terminated ASCII string to another Null-terminated ASCII\r
672 string and returns the new ASCII string.\r
673\r
674 This function copies the contents of the ASCII string Source to the ASCII\r
675 string Destination, and returns Destination. If Source and Destination\r
676 overlap, then the results are undefined.\r
677\r
678 If Destination is NULL, then ASSERT().\r
679 If Source is NULL, then ASSERT().\r
680 If Source and Destination overlap, then ASSERT().\r
681 If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
682 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
683 then ASSERT().\r
684\r
685 @param Destination Pointer to a Null-terminated ASCII string.\r
686 @param Source Pointer to a Null-terminated ASCII string.\r
687\r
688 @return Destination\r
689\r
690**/\r
691CHAR8 *\r
692EFIAPI\r
693AsciiStrCpy (\r
694 OUT CHAR8 *Destination,\r
695 IN CONST CHAR8 *Source\r
696 );\r
697\r
698\r
699/**\r
700 Copies up to a specified length one Null-terminated ASCII string to another \r
701 Null-terminated ASCII string and returns the new ASCII string.\r
702\r
703 This function copies the contents of the ASCII string Source to the ASCII\r
704 string Destination, and returns Destination. At most, Length ASCII characters\r
705 are copied from Source to Destination. If Length is 0, then Destination is\r
706 returned unmodified. If Length is greater that the number of ASCII characters\r
707 in Source, then Destination is padded with Null ASCII characters. If Source\r
708 and Destination overlap, then the results are undefined.\r
709\r
710 If Destination is NULL, then ASSERT().\r
711 If Source is NULL, then ASSERT().\r
712 If Source and Destination overlap, then ASSERT().\r
713 If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
714 PcdMaximumAsciiStringLength, then ASSERT().\r
715 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
716 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
717 then ASSERT().\r
718\r
719 @param Destination Pointer to a Null-terminated ASCII string.\r
720 @param Source Pointer to a Null-terminated ASCII string.\r
721 @param Length Maximum number of ASCII characters to copy.\r
722\r
723 @return Destination\r
724\r
725**/\r
726CHAR8 *\r
727EFIAPI\r
728AsciiStrnCpy (\r
729 OUT CHAR8 *Destination,\r
730 IN CONST CHAR8 *Source,\r
731 IN UINTN Length\r
732 );\r
733\r
734\r
735/**\r
736 Returns the length of a Null-terminated ASCII string.\r
737\r
738 This function returns the number of ASCII characters in the Null-terminated\r
739 ASCII string specified by String.\r
740\r
741 If Length > 0 and Destination is NULL, then ASSERT().\r
742 If Length > 0 and Source is NULL, then ASSERT().\r
743 If PcdMaximumAsciiStringLength is not zero and String contains more than\r
744 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
745 then ASSERT().\r
746\r
747 @param String Pointer to a Null-terminated ASCII string.\r
748\r
749 @return The length of String.\r
750\r
751**/\r
752UINTN\r
753EFIAPI\r
754AsciiStrLen (\r
755 IN CONST CHAR8 *String\r
756 );\r
757\r
758\r
759/**\r
760 Returns the size of a Null-terminated ASCII string in bytes, including the\r
761 Null terminator.\r
762\r
763 This function returns the size, in bytes, of the Null-terminated ASCII string\r
764 specified by String.\r
765\r
766 If String is NULL, then ASSERT().\r
767 If PcdMaximumAsciiStringLength is not zero and String contains more than\r
768 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
769 then ASSERT().\r
770\r
771 @param String Pointer to a Null-terminated ASCII string.\r
772\r
773 @return The size of String.\r
774\r
775**/\r
776UINTN\r
777EFIAPI\r
778AsciiStrSize (\r
779 IN CONST CHAR8 *String\r
780 );\r
781\r
782\r
783/**\r
784 Compares two Null-terminated ASCII strings, and returns the difference\r
785 between the first mismatched ASCII characters.\r
786\r
787 This function compares the Null-terminated ASCII string FirstString to the\r
788 Null-terminated ASCII string SecondString. If FirstString is identical to\r
789 SecondString, then 0 is returned. Otherwise, the value returned is the first\r
790 mismatched ASCII character in SecondString subtracted from the first\r
791 mismatched ASCII character in FirstString.\r
792\r
793 If FirstString is NULL, then ASSERT().\r
794 If SecondString is NULL, then ASSERT().\r
795 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
796 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
797 then ASSERT().\r
798 If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
799 than PcdMaximumAsciiStringLength ASCII characters not including the\r
800 Null-terminator, then ASSERT().\r
801\r
802 @param FirstString Pointer to a Null-terminated ASCII string.\r
803 @param SecondString Pointer to a Null-terminated ASCII string.\r
804\r
805 @retval ==0 FirstString is identical to SecondString.\r
806 @retval !=0 FirstString is not identical to SecondString.\r
807\r
808**/\r
809INTN\r
810EFIAPI\r
811AsciiStrCmp (\r
812 IN CONST CHAR8 *FirstString,\r
813 IN CONST CHAR8 *SecondString\r
814 );\r
815\r
816\r
817/**\r
818 Performs a case insensitive comparison of two Null-terminated ASCII strings,\r
819 and returns the difference between the first mismatched ASCII characters.\r
820\r
821 This function performs a case insensitive comparison of the Null-terminated\r
822 ASCII string FirstString to the Null-terminated ASCII string SecondString. If\r
823 FirstString is identical to SecondString, then 0 is returned. Otherwise, the\r
824 value returned is the first mismatched lower case ASCII character in\r
825 SecondString subtracted from the first mismatched lower case ASCII character\r
826 in FirstString.\r
827\r
828 If FirstString is NULL, then ASSERT().\r
829 If SecondString is NULL, then ASSERT().\r
830 If PcdMaximumAsciiStringLength is not zero and FirstString contains more than\r
831 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
832 then ASSERT().\r
833 If PcdMaximumAsciiStringLength is not zero and SecondString contains more\r
834 than PcdMaximumAsciiStringLength ASCII characters not including the\r
835 Null-terminator, then ASSERT().\r
836\r
837 @param FirstString Pointer to a Null-terminated ASCII string.\r
838 @param SecondString Pointer to a Null-terminated ASCII string.\r
839\r
840 @retval ==0 FirstString is identical to SecondString using case insensitive\r
841 comparisons.\r
842 @retval !=0 FirstString is not identical to SecondString using case\r
843 insensitive comparisons.\r
844\r
845**/\r
846INTN\r
847EFIAPI\r
848AsciiStriCmp (\r
849 IN CONST CHAR8 *FirstString,\r
850 IN CONST CHAR8 *SecondString\r
851 );\r
852\r
853\r
854/**\r
855 Compares two Null-terminated ASCII strings with maximum lengths, and returns\r
856 the difference between the first mismatched ASCII characters.\r
857\r
858 This function compares the Null-terminated ASCII string FirstString to the\r
859 Null-terminated ASCII string SecondString. At most, Length ASCII characters\r
860 will be compared. If Length is 0, then 0 is returned. If FirstString is\r
861 identical to SecondString, then 0 is returned. Otherwise, the value returned\r
862 is the first mismatched ASCII character in SecondString subtracted from the\r
863 first mismatched ASCII character in FirstString.\r
864\r
865 If Length > 0 and FirstString is NULL, then ASSERT().\r
866 If Length > 0 and SecondString is NULL, then ASSERT().\r
867 If PcdMaximumAsciiStringLength is not zero, and Length is greater than \r
868 PcdMaximumAsciiStringLength, then ASSERT().\r
869 If PcdMaximumAsciiStringLength is not zero, and FirstString contains more than\r
870 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
871 then ASSERT().\r
872 If PcdMaximumAsciiStringLength is not zero, and SecondString contains more than\r
873 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
874 then ASSERT().\r
875\r
876 @param FirstString Pointer to a Null-terminated ASCII string.\r
877 @param SecondString Pointer to a Null-terminated ASCII string.\r
878 @param Length Maximum number of ASCII characters for compare.\r
879 \r
880 @retval ==0 FirstString is identical to SecondString.\r
881 @retval !=0 FirstString is not identical to SecondString.\r
882\r
883**/\r
884INTN\r
885EFIAPI\r
886AsciiStrnCmp (\r
887 IN CONST CHAR8 *FirstString,\r
888 IN CONST CHAR8 *SecondString,\r
889 IN UINTN Length\r
890 );\r
891\r
892\r
893/**\r
894 Concatenates one Null-terminated ASCII string to another Null-terminated\r
895 ASCII string, and returns the concatenated ASCII string.\r
896\r
897 This function concatenates two Null-terminated ASCII strings. The contents of\r
898 Null-terminated ASCII string Source are concatenated to the end of Null-\r
899 terminated ASCII string Destination. The Null-terminated concatenated ASCII\r
900 String is returned.\r
901\r
902 If Destination is NULL, then ASSERT().\r
903 If Source is NULL, then ASSERT().\r
904 If PcdMaximumAsciiStringLength is not zero and Destination contains more than\r
905 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
906 then ASSERT().\r
907 If PcdMaximumAsciiStringLength is not zero and Source contains more than\r
908 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
909 then ASSERT().\r
910 If PcdMaximumAsciiStringLength is not zero and concatenating Destination and\r
911 Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
912 ASCII characters, then ASSERT().\r
913\r
914 @param Destination Pointer to a Null-terminated ASCII string.\r
915 @param Source Pointer to a Null-terminated ASCII string.\r
916\r
917 @return Destination\r
918\r
919**/\r
920CHAR8 *\r
921EFIAPI\r
922AsciiStrCat (\r
923 IN OUT CHAR8 *Destination,\r
924 IN CONST CHAR8 *Source\r
925 );\r
926\r
927\r
928/**\r
929 Concatenates up to a specified length one Null-terminated ASCII string to \r
930 the end of another Null-terminated ASCII string, and returns the \r
931 concatenated ASCII string.\r
932\r
933 This function concatenates two Null-terminated ASCII strings. The contents\r
934 of Null-terminated ASCII string Source are concatenated to the end of Null-\r
935 terminated ASCII string Destination, and Destination is returned. At most,\r
936 Length ASCII characters are concatenated from Source to the end of\r
937 Destination, and Destination is always Null-terminated. If Length is 0, then\r
938 Destination is returned unmodified. If Source and Destination overlap, then\r
939 the results are undefined.\r
940\r
941 If Length > 0 and Destination is NULL, then ASSERT().\r
942 If Length > 0 and Source is NULL, then ASSERT().\r
943 If Source and Destination overlap, then ASSERT().\r
944 If PcdMaximumAsciiStringLength is not zero, and Length is greater than\r
945 PcdMaximumAsciiStringLength, then ASSERT().\r
946 If PcdMaximumAsciiStringLength is not zero, and Destination contains more than\r
947 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
948 then ASSERT().\r
949 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
950 PcdMaximumAsciiStringLength ASCII characters, not including the Null-terminator,\r
951 then ASSERT().\r
952 If PcdMaximumAsciiStringLength is not zero, and concatenating Destination and\r
953 Source results in a ASCII string with more than PcdMaximumAsciiStringLength\r
954 ASCII characters, not including the Null-terminator, then ASSERT().\r
955\r
956 @param Destination Pointer to a Null-terminated ASCII string.\r
957 @param Source Pointer to a Null-terminated ASCII string.\r
958 @param Length Maximum number of ASCII characters to concatenate from\r
959 Source.\r
960\r
961 @return Destination\r
962\r
963**/\r
964CHAR8 *\r
965EFIAPI\r
966AsciiStrnCat (\r
967 IN OUT CHAR8 *Destination,\r
968 IN CONST CHAR8 *Source,\r
969 IN UINTN Length\r
970 );\r
971\r
972\r
973/**\r
974 Returns the first occurrence of a Null-terminated ASCII sub-string\r
975 in a Null-terminated ASCII string.\r
976\r
977 This function scans the contents of the ASCII string specified by String\r
978 and returns the first occurrence of SearchString. If SearchString is not\r
979 found in String, then NULL is returned. If the length of SearchString is zero,\r
980 then String is returned.\r
981\r
982 If String is NULL, then ASSERT().\r
983 If SearchString is NULL, then ASSERT().\r
984\r
985 If PcdMaximumAsciiStringLength is not zero, and SearchString or\r
986 String contains more than PcdMaximumAsciiStringLength Unicode characters\r
987 not including the Null-terminator, then ASSERT().\r
988\r
989 @param String Pointer to a Null-terminated ASCII string.\r
990 @param SearchString Pointer to a Null-terminated ASCII string to search for.\r
991\r
992 @retval NULL If the SearchString does not appear in String.\r
993 @retval others If there is a match return the first occurrence of SearchingString.\r
994 If the length of SearchString is zero,return String.\r
995\r
996**/\r
997CHAR8 *\r
998EFIAPI\r
999AsciiStrStr (\r
1000 IN CONST CHAR8 *String,\r
1001 IN CONST CHAR8 *SearchString\r
1002 );\r
1003\r
1004\r
1005/**\r
1006 Convert a Null-terminated ASCII decimal string to a value of type\r
1007 UINTN.\r
1008\r
1009 This function returns a value of type UINTN by interpreting the contents\r
1010 of the ASCII string String as a decimal number. The format of the input\r
1011 ASCII string String is:\r
1012\r
1013 [spaces] [decimal digits].\r
1014\r
1015 The valid decimal digit character is in the range [0-9]. The function will\r
1016 ignore the pad space, which includes spaces or tab characters, before the digits.\r
1017 The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
1018 function stops at the first character that is a not a valid decimal character or\r
1019 Null-terminator, whichever on comes first.\r
1020\r
1021 If String has only pad spaces, then 0 is returned.\r
1022 If String has no pad spaces or valid decimal digits, then 0 is returned.\r
1023 If the number represented by String overflows according to the range defined by\r
1024 UINTN, then ASSERT().\r
1025 If String is NULL, then ASSERT().\r
1026 If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
1027 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
1028 then ASSERT().\r
1029\r
1030 @param String Pointer to a Null-terminated ASCII string.\r
1031\r
1032 @retval Value translated from String.\r
1033\r
1034**/\r
1035UINTN\r
1036EFIAPI\r
1037AsciiStrDecimalToUintn (\r
1038 IN CONST CHAR8 *String\r
1039 );\r
1040\r
1041\r
1042/**\r
1043 Convert a Null-terminated ASCII decimal string to a value of type\r
1044 UINT64.\r
1045\r
1046 This function returns a value of type UINT64 by interpreting the contents\r
1047 of the ASCII string String as a decimal number. The format of the input\r
1048 ASCII string String is:\r
1049\r
1050 [spaces] [decimal digits].\r
1051\r
1052 The valid decimal digit character is in the range [0-9]. The function will\r
1053 ignore the pad space, which includes spaces or tab characters, before the digits.\r
1054 The running zero in the beginning of [decimal digits] will be ignored. Then, the\r
1055 function stops at the first character that is a not a valid decimal character or\r
1056 Null-terminator, whichever on comes first.\r
1057\r
1058 If String has only pad spaces, then 0 is returned.\r
1059 If String has no pad spaces or valid decimal digits, then 0 is returned.\r
1060 If the number represented by String overflows according to the range defined by\r
1061 UINT64, then ASSERT().\r
1062 If String is NULL, then ASSERT().\r
1063 If PcdMaximumAsciiStringLength is not zero, and String contains more than\r
1064 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
1065 then ASSERT().\r
1066\r
1067 @param String Pointer to a Null-terminated ASCII string.\r
1068\r
1069 @retval Value translated from String.\r
1070\r
1071**/\r
1072UINT64\r
1073EFIAPI\r
1074AsciiStrDecimalToUint64 (\r
1075 IN CONST CHAR8 *String\r
1076 );\r
1077\r
1078\r
1079/**\r
1080 Convert a Null-terminated ASCII hexadecimal string to a value of type UINTN.\r
1081\r
1082 This function returns a value of type UINTN by interpreting the contents of\r
1083 the ASCII string String as a hexadecimal number. The format of the input ASCII\r
1084 string String is:\r
1085\r
1086 [spaces][zeros][x][hexadecimal digits].\r
1087\r
1088 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
1089 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
1090 appears in the input string, it must be prefixed with at least one 0. The function\r
1091 will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
1092 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
1093 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
1094 digit. Then, the function stops at the first character that is a not a valid\r
1095 hexadecimal character or Null-terminator, whichever on comes first.\r
1096\r
1097 If String has only pad spaces, then 0 is returned.\r
1098 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
1099 0 is returned.\r
1100\r
1101 If the number represented by String overflows according to the range defined by UINTN,\r
1102 then ASSERT().\r
1103 If String is NULL, then ASSERT().\r
1104 If PcdMaximumAsciiStringLength is not zero,\r
1105 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
1106 the Null-terminator, then ASSERT().\r
1107\r
1108 @param String Pointer to a Null-terminated ASCII string.\r
1109\r
1110 @retval Value translated from String.\r
1111\r
1112**/\r
1113UINTN\r
1114EFIAPI\r
1115AsciiStrHexToUintn (\r
1116 IN CONST CHAR8 *String\r
1117 );\r
1118\r
1119\r
1120/**\r
1121 Convert a Null-terminated ASCII hexadecimal string to a value of type UINT64.\r
1122\r
1123 This function returns a value of type UINT64 by interpreting the contents of\r
1124 the ASCII string String as a hexadecimal number. The format of the input ASCII\r
1125 string String is:\r
1126\r
1127 [spaces][zeros][x][hexadecimal digits].\r
1128\r
1129 The valid hexadecimal digit character is in the range [0-9], [a-f] and [A-F].\r
1130 The prefix "0x" is optional. Both "x" and "X" is allowed in "0x" prefix. If "x"\r
1131 appears in the input string, it must be prefixed with at least one 0. The function\r
1132 will ignore the pad space, which includes spaces or tab characters, before [zeros],\r
1133 [x] or [hexadecimal digits]. The running zero before [x] or [hexadecimal digits]\r
1134 will be ignored. Then, the decoding starts after [x] or the first valid hexadecimal\r
1135 digit. Then, the function stops at the first character that is a not a valid\r
1136 hexadecimal character or Null-terminator, whichever on comes first.\r
1137\r
1138 If String has only pad spaces, then 0 is returned.\r
1139 If String has no leading pad spaces, leading zeros or valid hexadecimal digits, then\r
1140 0 is returned.\r
1141\r
1142 If the number represented by String overflows according to the range defined by UINT64,\r
1143 then ASSERT().\r
1144 If String is NULL, then ASSERT().\r
1145 If PcdMaximumAsciiStringLength is not zero,\r
1146 and String contains more than PcdMaximumAsciiStringLength ASCII characters not including\r
1147 the Null-terminator, then ASSERT().\r
1148\r
1149 @param String Pointer to a Null-terminated ASCII string.\r
1150\r
1151 @retval Value translated from String.\r
1152\r
1153**/\r
1154UINT64\r
1155EFIAPI\r
1156AsciiStrHexToUint64 (\r
1157 IN CONST CHAR8 *String\r
1158 );\r
1159\r
1160\r
1161/**\r
1162 Convert one Null-terminated ASCII string to a Null-terminated\r
1163 Unicode string and returns the Unicode string.\r
1164\r
1165 This function converts the contents of the ASCII string Source to the Unicode\r
1166 string Destination, and returns Destination. The function terminates the\r
1167 Unicode string Destination by appending a Null-terminator character at the end.\r
1168 The caller is responsible to make sure Destination points to a buffer with size\r
1169 equal or greater than ((AsciiStrLen (Source) + 1) * sizeof (CHAR16)) in bytes.\r
1170\r
1171 If Destination is NULL, then ASSERT().\r
1172 If Destination is not aligned on a 16-bit boundary, then ASSERT().\r
1173 If Source is NULL, then ASSERT().\r
1174 If Source and Destination overlap, then ASSERT().\r
1175 If PcdMaximumAsciiStringLength is not zero, and Source contains more than\r
1176 PcdMaximumAsciiStringLength ASCII characters not including the Null-terminator,\r
1177 then ASSERT().\r
1178 If PcdMaximumUnicodeStringLength is not zero, and Source contains more than\r
1179 PcdMaximumUnicodeStringLength ASCII characters not including the\r
1180 Null-terminator, then ASSERT().\r
1181\r
1182 @param Source Pointer to a Null-terminated ASCII string.\r
1183 @param Destination Pointer to a Null-terminated Unicode string.\r
1184\r
1185 @return Destination.\r
1186\r
1187**/\r
1188CHAR16 *\r
1189EFIAPI\r
1190AsciiStrToUnicodeStr (\r
1191 IN CONST CHAR8 *Source,\r
1192 OUT CHAR16 *Destination\r
1193 );\r
1194\r
1195\r
1196/**\r
1197 Converts an 8-bit value to an 8-bit BCD value.\r
1198\r
1199 Converts the 8-bit value specified by Value to BCD. The BCD value is\r
1200 returned.\r
1201\r
1202 If Value >= 100, then ASSERT().\r
1203\r
1204 @param Value The 8-bit value to convert to BCD. Range 0..99.\r
1205\r
1206 @return The BCD value.\r
1207\r
1208**/\r
1209UINT8\r
1210EFIAPI\r
1211DecimalToBcd8 (\r
1212 IN UINT8 Value\r
1213 );\r
1214\r
1215\r
1216/**\r
1217 Converts an 8-bit BCD value to an 8-bit value.\r
1218\r
1219 Converts the 8-bit BCD value specified by Value to an 8-bit value. The 8-bit\r
1220 value is returned.\r
1221\r
1222 If Value >= 0xA0, then ASSERT().\r
1223 If (Value & 0x0F) >= 0x0A, then ASSERT().\r
1224\r
1225 @param Value The 8-bit BCD value to convert to an 8-bit value.\r
1226\r
1227 @return The 8-bit value is returned.\r
1228\r
1229**/\r
1230UINT8\r
1231EFIAPI\r
1232BcdToDecimal8 (\r
1233 IN UINT8 Value\r
1234 );\r
1235\r
1236\r
1237//\r
1238// Linked List Functions and Macros\r
1239//\r
1240\r
1241/**\r
1242 Initializes the head node of a doubly linked list that is declared as a\r
1243 global variable in a module.\r
1244\r
1245 Initializes the forward and backward links of a new linked list. After\r
1246 initializing a linked list with this macro, the other linked list functions\r
1247 may be used to add and remove nodes from the linked list. This macro results\r
1248 in smaller executables by initializing the linked list in the data section,\r
1249 instead if calling the InitializeListHead() function to perform the\r
1250 equivalent operation.\r
1251\r
1252 @param ListHead The head note of a list to initialize.\r
1253\r
1254**/\r
1255#define INITIALIZE_LIST_HEAD_VARIABLE(ListHead) {&(ListHead), &(ListHead)}\r
1256\r
1257\r
1258/**\r
1259 Initializes the head node of a doubly linked list, and returns the pointer to\r
1260 the head node of the doubly linked list.\r
1261\r
1262 Initializes the forward and backward links of a new linked list. After\r
1263 initializing a linked list with this function, the other linked list\r
1264 functions may be used to add and remove nodes from the linked list. It is up\r
1265 to the caller of this function to allocate the memory for ListHead.\r
1266\r
1267 If ListHead is NULL, then ASSERT().\r
1268\r
1269 @param ListHead A pointer to the head node of a new doubly linked list.\r
1270\r
1271 @return ListHead\r
1272\r
1273**/\r
1274LIST_ENTRY *\r
1275EFIAPI\r
1276InitializeListHead (\r
1277 IN OUT LIST_ENTRY *ListHead\r
1278 );\r
1279\r
1280\r
1281/**\r
1282 Adds a node to the beginning of a doubly linked list, and returns the pointer\r
1283 to the head node of the doubly linked list.\r
1284\r
1285 Adds the node Entry at the beginning of the doubly linked list denoted by\r
1286 ListHead, and returns ListHead.\r
1287\r
1288 If ListHead is NULL, then ASSERT().\r
1289 If Entry is NULL, then ASSERT().\r
1290 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
1291 InitializeListHead(), then ASSERT().\r
1292 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
1293 of nodes in ListHead, including the ListHead node, is greater than or\r
1294 equal to PcdMaximumLinkedListLength, then ASSERT().\r
1295\r
1296 @param ListHead A pointer to the head node of a doubly linked list.\r
1297 @param Entry A pointer to a node that is to be inserted at the beginning\r
1298 of a doubly linked list.\r
1299\r
1300 @return ListHead\r
1301\r
1302**/\r
1303LIST_ENTRY *\r
1304EFIAPI\r
1305InsertHeadList (\r
1306 IN OUT LIST_ENTRY *ListHead,\r
1307 IN OUT LIST_ENTRY *Entry\r
1308 );\r
1309\r
1310\r
1311/**\r
1312 Adds a node to the end of a doubly linked list, and returns the pointer to\r
1313 the head node of the doubly linked list.\r
1314\r
1315 Adds the node Entry to the end of the doubly linked list denoted by ListHead,\r
1316 and returns ListHead.\r
1317\r
1318 If ListHead is NULL, then ASSERT().\r
1319 If Entry is NULL, then ASSERT().\r
1320 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1321 InitializeListHead(), then ASSERT().\r
1322 If PcdMaximumLinkedListLenth is not zero, and prior to insertion the number\r
1323 of nodes in ListHead, including the ListHead node, is greater than or\r
1324 equal to PcdMaximumLinkedListLength, then ASSERT().\r
1325\r
1326 @param ListHead A pointer to the head node of a doubly linked list.\r
1327 @param Entry A pointer to a node that is to be added at the end of the\r
1328 doubly linked list.\r
1329\r
1330 @return ListHead\r
1331\r
1332**/\r
1333LIST_ENTRY *\r
1334EFIAPI\r
1335InsertTailList (\r
1336 IN OUT LIST_ENTRY *ListHead,\r
1337 IN OUT LIST_ENTRY *Entry\r
1338 );\r
1339\r
1340\r
1341/**\r
1342 Retrieves the first node of a doubly linked list.\r
1343\r
1344 Returns the first node of a doubly linked list. List must have been \r
1345 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
1346 If List is empty, then List is returned.\r
1347\r
1348 If List is NULL, then ASSERT().\r
1349 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1350 InitializeListHead(), then ASSERT().\r
1351 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1352 in List, including the List node, is greater than or equal to\r
1353 PcdMaximumLinkedListLength, then ASSERT().\r
1354\r
1355 @param List A pointer to the head node of a doubly linked list.\r
1356\r
1357 @return The first node of a doubly linked list.\r
1358 @retval NULL The list is empty.\r
1359\r
1360**/\r
1361LIST_ENTRY *\r
1362EFIAPI\r
1363GetFirstNode (\r
1364 IN CONST LIST_ENTRY *List\r
1365 );\r
1366\r
1367\r
1368/**\r
1369 Retrieves the next node of a doubly linked list.\r
1370\r
1371 Returns the node of a doubly linked list that follows Node. \r
1372 List must have been initialized with INTIALIZE_LIST_HEAD_VARIABLE()\r
1373 or InitializeListHead(). If List is empty, then List is returned.\r
1374\r
1375 If List is NULL, then ASSERT().\r
1376 If Node is NULL, then ASSERT().\r
1377 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1378 InitializeListHead(), then ASSERT().\r
1379 If PcdMaximumLinkedListLenth is not zero, and List contains more than\r
1380 PcdMaximumLinkedListLenth nodes, then ASSERT().\r
1381 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r
1382\r
1383 @param List A pointer to the head node of a doubly linked list.\r
1384 @param Node A pointer to a node in the doubly linked list.\r
1385\r
1386 @return Pointer to the next node if one exists. Otherwise a null value which\r
1387 is actually List is returned.\r
1388\r
1389**/\r
1390LIST_ENTRY *\r
1391EFIAPI\r
1392GetNextNode (\r
1393 IN CONST LIST_ENTRY *List,\r
1394 IN CONST LIST_ENTRY *Node\r
1395 );\r
1396\r
1397\r
1398/**\r
1399 Checks to see if a doubly linked list is empty or not.\r
1400\r
1401 Checks to see if the doubly linked list is empty. If the linked list contains\r
1402 zero nodes, this function returns TRUE. Otherwise, it returns FALSE.\r
1403\r
1404 If ListHead is NULL, then ASSERT().\r
1405 If ListHead was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or \r
1406 InitializeListHead(), then ASSERT().\r
1407 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1408 in List, including the List node, is greater than or equal to\r
1409 PcdMaximumLinkedListLength, then ASSERT().\r
1410\r
1411 @param ListHead A pointer to the head node of a doubly linked list.\r
1412\r
1413 @retval TRUE The linked list is empty.\r
1414 @retval FALSE The linked list is not empty.\r
1415\r
1416**/\r
1417BOOLEAN\r
1418EFIAPI\r
1419IsListEmpty (\r
1420 IN CONST LIST_ENTRY *ListHead\r
1421 );\r
1422\r
1423\r
1424/**\r
1425 Determines if a node in a doubly linked list is the head node of a the same\r
1426 doubly linked list. This function is typically used to terminate a loop that\r
1427 traverses all the nodes in a doubly linked list starting with the head node.\r
1428\r
1429 Returns TRUE if Node is equal to List. Returns FALSE if Node is one of the\r
1430 nodes in the doubly linked list specified by List. List must have been\r
1431 initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
1432\r
1433 If List is NULL, then ASSERT().\r
1434 If Node is NULL, then ASSERT().\r
1435 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(), \r
1436 then ASSERT().\r
1437 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1438 in List, including the List node, is greater than or equal to\r
1439 PcdMaximumLinkedListLength, then ASSERT().\r
1440 If PcdVerifyNodeInList is TRUE and Node is not a node in List the and Node is not equal \r
1441 to List, then ASSERT().\r
1442\r
1443 @param List A pointer to the head node of a doubly linked list.\r
1444 @param Node A pointer to a node in the doubly linked list.\r
1445\r
1446 @retval TRUE Node is one of the nodes in the doubly linked list.\r
1447 @retval FALSE Node is not one of the nodes in the doubly linked list.\r
1448\r
1449**/\r
1450BOOLEAN\r
1451EFIAPI\r
1452IsNull (\r
1453 IN CONST LIST_ENTRY *List,\r
1454 IN CONST LIST_ENTRY *Node\r
1455 );\r
1456\r
1457\r
1458/**\r
1459 Determines if a node the last node in a doubly linked list.\r
1460\r
1461 Returns TRUE if Node is the last node in the doubly linked list specified by\r
1462 List. Otherwise, FALSE is returned. List must have been initialized with\r
1463 INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead().\r
1464\r
1465 If List is NULL, then ASSERT().\r
1466 If Node is NULL, then ASSERT().\r
1467 If List was not initialized with INTIALIZE_LIST_HEAD_VARIABLE() or\r
1468 InitializeListHead(), then ASSERT().\r
1469 If PcdMaximumLinkedListLenth is not zero, and the number of nodes\r
1470 in List, including the List node, is greater than or equal to\r
1471 PcdMaximumLinkedListLength, then ASSERT().\r
1472 If PcdVerifyNodeInList is TRUE and Node is not a node in List, then ASSERT().\r
1473\r
1474 @param List A pointer to the head node of a doubly linked list.\r
1475 @param Node A pointer to a node in the doubly linked list.\r
1476\r
1477 @retval TRUE Node is the last node in the linked list.\r
1478 @retval FALSE Node is not the last node in the linked list.\r
1479\r
1480**/\r
1481BOOLEAN\r
1482EFIAPI\r
1483IsNodeAtEnd (\r
1484 IN CONST LIST_ENTRY *List,\r
1485 IN CONST LIST_ENTRY *Node\r
1486 );\r
1487\r
1488\r
1489/**\r
1490 Swaps the location of two nodes in a doubly linked list, and returns the\r
1491 first node after the swap.\r
1492\r
1493 If FirstEntry is identical to SecondEntry, then SecondEntry is returned.\r
1494 Otherwise, the location of the FirstEntry node is swapped with the location\r
1495 of the SecondEntry node in a doubly linked list. SecondEntry must be in the\r
1496 same double linked list as FirstEntry and that double linked list must have\r
1497 been initialized with INTIALIZE_LIST_HEAD_VARIABLE() or InitializeListHead(). \r
1498 SecondEntry is returned after the nodes are swapped.\r
1499\r
1500 If FirstEntry is NULL, then ASSERT().\r
1501 If SecondEntry is NULL, then ASSERT().\r
1502 If PcdVerifyNodeInList is TRUE and SecondEntry and FirstEntry are not in the \r
1503 same linked list, then ASSERT().\r
1504 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
1505 linked list containing the FirstEntry and SecondEntry nodes, including\r
1506 the FirstEntry and SecondEntry nodes, is greater than or equal to\r
1507 PcdMaximumLinkedListLength, then ASSERT().\r
1508\r
1509 @param FirstEntry A pointer to a node in a linked list.\r
1510 @param SecondEntry A pointer to another node in the same linked list.\r
1511 \r
1512 @return SecondEntry.\r
1513\r
1514**/\r
1515LIST_ENTRY *\r
1516EFIAPI\r
1517SwapListEntries (\r
1518 IN OUT LIST_ENTRY *FirstEntry,\r
1519 IN OUT LIST_ENTRY *SecondEntry\r
1520 );\r
1521\r
1522\r
1523/**\r
1524 Removes a node from a doubly linked list, and returns the node that follows\r
1525 the removed node.\r
1526\r
1527 Removes the node Entry from a doubly linked list. It is up to the caller of\r
1528 this function to release the memory used by this node if that is required. On\r
1529 exit, the node following Entry in the doubly linked list is returned. If\r
1530 Entry is the only node in the linked list, then the head node of the linked\r
1531 list is returned.\r
1532\r
1533 If Entry is NULL, then ASSERT().\r
1534 If Entry is the head node of an empty list, then ASSERT().\r
1535 If PcdMaximumLinkedListLength is not zero, and the number of nodes in the\r
1536 linked list containing Entry, including the Entry node, is greater than\r
1537 or equal to PcdMaximumLinkedListLength, then ASSERT().\r
1538\r
1539 @param Entry A pointer to a node in a linked list.\r
1540\r
1541 @return Entry.\r
1542\r
1543**/\r
1544LIST_ENTRY *\r
1545EFIAPI\r
1546RemoveEntryList (\r
1547 IN CONST LIST_ENTRY *Entry\r
1548 );\r
1549\r
1550//\r
1551// Math Services\r
1552//\r
1553\r
1554/**\r
1555 Shifts a 64-bit integer left between 0 and 63 bits. The low bits are filled\r
1556 with zeros. The shifted value is returned.\r
1557\r
1558 This function shifts the 64-bit value Operand to the left by Count bits. The\r
1559 low Count bits are set to zero. The shifted value is returned.\r
1560\r
1561 If Count is greater than 63, then ASSERT().\r
1562\r
1563 @param Operand The 64-bit operand to shift left.\r
1564 @param Count The number of bits to shift left.\r
1565\r
1566 @return Operand << Count.\r
1567\r
1568**/\r
1569UINT64\r
1570EFIAPI\r
1571LShiftU64 (\r
1572 IN UINT64 Operand,\r
1573 IN UINTN Count\r
1574 );\r
1575\r
1576\r
1577/**\r
1578 Shifts a 64-bit integer right between 0 and 63 bits. This high bits are\r
1579 filled with zeros. The shifted value is returned.\r
1580\r
1581 This function shifts the 64-bit value Operand to the right by Count bits. The\r
1582 high Count bits are set to zero. The shifted value is returned.\r
1583\r
1584 If Count is greater than 63, then ASSERT().\r
1585\r
1586 @param Operand The 64-bit operand to shift right.\r
1587 @param Count The number of bits to shift right.\r
1588\r
1589 @return Operand >> Count\r
1590\r
1591**/\r
1592UINT64\r
1593EFIAPI\r
1594RShiftU64 (\r
1595 IN UINT64 Operand,\r
1596 IN UINTN Count\r
1597 );\r
1598\r
1599\r
1600/**\r
1601 Shifts a 64-bit integer right between 0 and 63 bits. The high bits are filled\r
1602 with original integer's bit 63. The shifted value is returned.\r
1603\r
1604 This function shifts the 64-bit value Operand to the right by Count bits. The\r
1605 high Count bits are set to bit 63 of Operand. The shifted value is returned.\r
1606\r
1607 If Count is greater than 63, then ASSERT().\r
1608\r
1609 @param Operand The 64-bit operand to shift right.\r
1610 @param Count The number of bits to shift right.\r
1611\r
1612 @return Operand >> Count\r
1613\r
1614**/\r
1615UINT64\r
1616EFIAPI\r
1617ARShiftU64 (\r
1618 IN UINT64 Operand,\r
1619 IN UINTN Count\r
1620 );\r
1621\r
1622\r
1623/**\r
1624 Rotates a 32-bit integer left between 0 and 31 bits, filling the low bits\r
1625 with the high bits that were rotated.\r
1626\r
1627 This function rotates the 32-bit value Operand to the left by Count bits. The\r
1628 low Count bits are fill with the high Count bits of Operand. The rotated\r
1629 value is returned.\r
1630\r
1631 If Count is greater than 31, then ASSERT().\r
1632\r
1633 @param Operand The 32-bit operand to rotate left.\r
1634 @param Count The number of bits to rotate left.\r
1635\r
1636 @return Operand << Count\r
1637\r
1638**/\r
1639UINT32\r
1640EFIAPI\r
1641LRotU32 (\r
1642 IN UINT32 Operand,\r
1643 IN UINTN Count\r
1644 );\r
1645\r
1646\r
1647/**\r
1648 Rotates a 32-bit integer right between 0 and 31 bits, filling the high bits\r
1649 with the low bits that were rotated.\r
1650\r
1651 This function rotates the 32-bit value Operand to the right by Count bits.\r
1652 The high Count bits are fill with the low Count bits of Operand. The rotated\r
1653 value is returned.\r
1654\r
1655 If Count is greater than 31, then ASSERT().\r
1656\r
1657 @param Operand The 32-bit operand to rotate right.\r
1658 @param Count The number of bits to rotate right.\r
1659\r
1660 @return Operand >> Count\r
1661\r
1662**/\r
1663UINT32\r
1664EFIAPI\r
1665RRotU32 (\r
1666 IN UINT32 Operand,\r
1667 IN UINTN Count\r
1668 );\r
1669\r
1670\r
1671/**\r
1672 Rotates a 64-bit integer left between 0 and 63 bits, filling the low bits\r
1673 with the high bits that were rotated.\r
1674\r
1675 This function rotates the 64-bit value Operand to the left by Count bits. The\r
1676 low Count bits are fill with the high Count bits of Operand. The rotated\r
1677 value is returned.\r
1678\r
1679 If Count is greater than 63, then ASSERT().\r
1680\r
1681 @param Operand The 64-bit operand to rotate left.\r
1682 @param Count The number of bits to rotate left.\r
1683\r
1684 @return Operand << Count\r
1685\r
1686**/\r
1687UINT64\r
1688EFIAPI\r
1689LRotU64 (\r
1690 IN UINT64 Operand,\r
1691 IN UINTN Count\r
1692 );\r
1693\r
1694\r
1695/**\r
1696 Rotates a 64-bit integer right between 0 and 63 bits, filling the high bits\r
1697 with the high low bits that were rotated.\r
1698\r
1699 This function rotates the 64-bit value Operand to the right by Count bits.\r
1700 The high Count bits are fill with the low Count bits of Operand. The rotated\r
1701 value is returned.\r
1702\r
1703 If Count is greater than 63, then ASSERT().\r
1704\r
1705 @param Operand The 64-bit operand to rotate right.\r
1706 @param Count The number of bits to rotate right.\r
1707\r
1708 @return Operand >> Count\r
1709\r
1710**/\r
1711UINT64\r
1712EFIAPI\r
1713RRotU64 (\r
1714 IN UINT64 Operand,\r
1715 IN UINTN Count\r
1716 );\r
1717\r
1718\r
1719/**\r
1720 Returns the bit position of the lowest bit set in a 32-bit value.\r
1721\r
1722 This function computes the bit position of the lowest bit set in the 32-bit\r
1723 value specified by Operand. If Operand is zero, then -1 is returned.\r
1724 Otherwise, a value between 0 and 31 is returned.\r
1725\r
1726 @param Operand The 32-bit operand to evaluate.\r
1727\r
1728 @retval 0..31 The lowest bit set in Operand was found.\r
1729 @retval -1 Operand is zero.\r
1730\r
1731**/\r
1732INTN\r
1733EFIAPI\r
1734LowBitSet32 (\r
1735 IN UINT32 Operand\r
1736 );\r
1737\r
1738\r
1739/**\r
1740 Returns the bit position of the lowest bit set in a 64-bit value.\r
1741\r
1742 This function computes the bit position of the lowest bit set in the 64-bit\r
1743 value specified by Operand. If Operand is zero, then -1 is returned.\r
1744 Otherwise, a value between 0 and 63 is returned.\r
1745\r
1746 @param Operand The 64-bit operand to evaluate.\r
1747\r
1748 @retval 0..63 The lowest bit set in Operand was found.\r
1749 @retval -1 Operand is zero.\r
1750\r
1751\r
1752**/\r
1753INTN\r
1754EFIAPI\r
1755LowBitSet64 (\r
1756 IN UINT64 Operand\r
1757 );\r
1758\r
1759\r
1760/**\r
1761 Returns the bit position of the highest bit set in a 32-bit value. Equivalent\r
1762 to log2(x).\r
1763\r
1764 This function computes the bit position of the highest bit set in the 32-bit\r
1765 value specified by Operand. If Operand is zero, then -1 is returned.\r
1766 Otherwise, a value between 0 and 31 is returned.\r
1767\r
1768 @param Operand The 32-bit operand to evaluate.\r
1769\r
1770 @retval 0..31 Position of the highest bit set in Operand if found.\r
1771 @retval -1 Operand is zero.\r
1772\r
1773**/\r
1774INTN\r
1775EFIAPI\r
1776HighBitSet32 (\r
1777 IN UINT32 Operand\r
1778 );\r
1779\r
1780\r
1781/**\r
1782 Returns the bit position of the highest bit set in a 64-bit value. Equivalent\r
1783 to log2(x).\r
1784\r
1785 This function computes the bit position of the highest bit set in the 64-bit\r
1786 value specified by Operand. If Operand is zero, then -1 is returned.\r
1787 Otherwise, a value between 0 and 63 is returned.\r
1788\r
1789 @param Operand The 64-bit operand to evaluate.\r
1790\r
1791 @retval 0..63 Position of the highest bit set in Operand if found.\r
1792 @retval -1 Operand is zero.\r
1793\r
1794**/\r
1795INTN\r
1796EFIAPI\r
1797HighBitSet64 (\r
1798 IN UINT64 Operand\r
1799 );\r
1800\r
1801\r
1802/**\r
1803 Returns the value of the highest bit set in a 32-bit value. Equivalent to\r
1804 1 << log2(x).\r
1805\r
1806 This function computes the value of the highest bit set in the 32-bit value\r
1807 specified by Operand. If Operand is zero, then zero is returned.\r
1808\r
1809 @param Operand The 32-bit operand to evaluate.\r
1810\r
1811 @return 1 << HighBitSet32(Operand)\r
1812 @retval 0 Operand is zero.\r
1813\r
1814**/\r
1815UINT32\r
1816EFIAPI\r
1817GetPowerOfTwo32 (\r
1818 IN UINT32 Operand\r
1819 );\r
1820\r
1821\r
1822/**\r
1823 Returns the value of the highest bit set in a 64-bit value. Equivalent to\r
1824 1 << log2(x).\r
1825\r
1826 This function computes the value of the highest bit set in the 64-bit value\r
1827 specified by Operand. If Operand is zero, then zero is returned.\r
1828\r
1829 @param Operand The 64-bit operand to evaluate.\r
1830\r
1831 @return 1 << HighBitSet64(Operand)\r
1832 @retval 0 Operand is zero.\r
1833\r
1834**/\r
1835UINT64\r
1836EFIAPI\r
1837GetPowerOfTwo64 (\r
1838 IN UINT64 Operand\r
1839 );\r
1840\r
1841\r
1842/**\r
1843 Switches the endianess of a 16-bit integer.\r
1844\r
1845 This function swaps the bytes in a 16-bit unsigned value to switch the value\r
1846 from little endian to big endian or vice versa. The byte swapped value is\r
1847 returned.\r
1848\r
1849 @param Value A 16-bit unsigned value.\r
1850\r
1851 @return The byte swapped Value.\r
1852\r
1853**/\r
1854UINT16\r
1855EFIAPI\r
1856SwapBytes16 (\r
1857 IN UINT16 Value\r
1858 );\r
1859\r
1860\r
1861/**\r
1862 Switches the endianess of a 32-bit integer.\r
1863\r
1864 This function swaps the bytes in a 32-bit unsigned value to switch the value\r
1865 from little endian to big endian or vice versa. The byte swapped value is\r
1866 returned.\r
1867\r
1868 @param Value A 32-bit unsigned value.\r
1869\r
1870 @return The byte swapped Value.\r
1871\r
1872**/\r
1873UINT32\r
1874EFIAPI\r
1875SwapBytes32 (\r
1876 IN UINT32 Value\r
1877 );\r
1878\r
1879\r
1880/**\r
1881 Switches the endianess of a 64-bit integer.\r
1882\r
1883 This function swaps the bytes in a 64-bit unsigned value to switch the value\r
1884 from little endian to big endian or vice versa. The byte swapped value is\r
1885 returned.\r
1886\r
1887 @param Value A 64-bit unsigned value.\r
1888\r
1889 @return The byte swapped Value.\r
1890\r
1891**/\r
1892UINT64\r
1893EFIAPI\r
1894SwapBytes64 (\r
1895 IN UINT64 Value\r
1896 );\r
1897\r
1898\r
1899/**\r
1900 Multiples a 64-bit unsigned integer by a 32-bit unsigned integer and\r
1901 generates a 64-bit unsigned result.\r
1902\r
1903 This function multiples the 64-bit unsigned value Multiplicand by the 32-bit\r
1904 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
1905 bit unsigned result is returned.\r
1906\r
1907 @param Multiplicand A 64-bit unsigned value.\r
1908 @param Multiplier A 32-bit unsigned value.\r
1909\r
1910 @return Multiplicand * Multiplier\r
1911\r
1912**/\r
1913UINT64\r
1914EFIAPI\r
1915MultU64x32 (\r
1916 IN UINT64 Multiplicand,\r
1917 IN UINT32 Multiplier\r
1918 );\r
1919\r
1920\r
1921/**\r
1922 Multiples a 64-bit unsigned integer by a 64-bit unsigned integer and\r
1923 generates a 64-bit unsigned result.\r
1924\r
1925 This function multiples the 64-bit unsigned value Multiplicand by the 64-bit\r
1926 unsigned value Multiplier and generates a 64-bit unsigned result. This 64-\r
1927 bit unsigned result is returned.\r
1928\r
1929 @param Multiplicand A 64-bit unsigned value.\r
1930 @param Multiplier A 64-bit unsigned value.\r
1931\r
1932 @return Multiplicand * Multiplier\r
1933\r
1934**/\r
1935UINT64\r
1936EFIAPI\r
1937MultU64x64 (\r
1938 IN UINT64 Multiplicand,\r
1939 IN UINT64 Multiplier\r
1940 );\r
1941\r
1942\r
1943/**\r
1944 Multiples a 64-bit signed integer by a 64-bit signed integer and generates a\r
1945 64-bit signed result.\r
1946\r
1947 This function multiples the 64-bit signed value Multiplicand by the 64-bit\r
1948 signed value Multiplier and generates a 64-bit signed result. This 64-bit\r
1949 signed result is returned.\r
1950\r
1951 @param Multiplicand A 64-bit signed value.\r
1952 @param Multiplier A 64-bit signed value.\r
1953\r
1954 @return Multiplicand * Multiplier\r
1955\r
1956**/\r
1957INT64\r
1958EFIAPI\r
1959MultS64x64 (\r
1960 IN INT64 Multiplicand,\r
1961 IN INT64 Multiplier\r
1962 );\r
1963\r
1964\r
1965/**\r
1966 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1967 a 64-bit unsigned result.\r
1968\r
1969 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1970 unsigned value Divisor and generates a 64-bit unsigned quotient. This\r
1971 function returns the 64-bit unsigned quotient.\r
1972\r
1973 If Divisor is 0, then ASSERT().\r
1974\r
1975 @param Dividend A 64-bit unsigned value.\r
1976 @param Divisor A 32-bit unsigned value.\r
1977\r
1978 @return Dividend / Divisor\r
1979\r
1980**/\r
1981UINT64\r
1982EFIAPI\r
1983DivU64x32 (\r
1984 IN UINT64 Dividend,\r
1985 IN UINT32 Divisor\r
1986 );\r
1987\r
1988\r
1989/**\r
1990 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
1991 a 32-bit unsigned remainder.\r
1992\r
1993 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
1994 unsigned value Divisor and generates a 32-bit remainder. This function\r
1995 returns the 32-bit unsigned remainder.\r
1996\r
1997 If Divisor is 0, then ASSERT().\r
1998\r
1999 @param Dividend A 64-bit unsigned value.\r
2000 @param Divisor A 32-bit unsigned value.\r
2001\r
2002 @return Dividend % Divisor\r
2003\r
2004**/\r
2005UINT32\r
2006EFIAPI\r
2007ModU64x32 (\r
2008 IN UINT64 Dividend,\r
2009 IN UINT32 Divisor\r
2010 );\r
2011\r
2012\r
2013/**\r
2014 Divides a 64-bit unsigned integer by a 32-bit unsigned integer and generates\r
2015 a 64-bit unsigned result and an optional 32-bit unsigned remainder.\r
2016\r
2017 This function divides the 64-bit unsigned value Dividend by the 32-bit\r
2018 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
2019 is not NULL, then the 32-bit unsigned remainder is returned in Remainder.\r
2020 This function returns the 64-bit unsigned quotient.\r
2021\r
2022 If Divisor is 0, then ASSERT().\r
2023\r
2024 @param Dividend A 64-bit unsigned value.\r
2025 @param Divisor A 32-bit unsigned value.\r
2026 @param Remainder A pointer to a 32-bit unsigned value. This parameter is\r
2027 optional and may be NULL.\r
2028\r
2029 @return Dividend / Divisor\r
2030\r
2031**/\r
2032UINT64\r
2033EFIAPI\r
2034DivU64x32Remainder (\r
2035 IN UINT64 Dividend,\r
2036 IN UINT32 Divisor,\r
2037 OUT UINT32 *Remainder OPTIONAL\r
2038 );\r
2039\r
2040\r
2041/**\r
2042 Divides a 64-bit unsigned integer by a 64-bit unsigned integer and generates\r
2043 a 64-bit unsigned result and an optional 64-bit unsigned remainder.\r
2044\r
2045 This function divides the 64-bit unsigned value Dividend by the 64-bit\r
2046 unsigned value Divisor and generates a 64-bit unsigned quotient. If Remainder\r
2047 is not NULL, then the 64-bit unsigned remainder is returned in Remainder.\r
2048 This function returns the 64-bit unsigned quotient.\r
2049\r
2050 If Divisor is 0, then ASSERT().\r
2051\r
2052 @param Dividend A 64-bit unsigned value.\r
2053 @param Divisor A 64-bit unsigned value.\r
2054 @param Remainder A pointer to a 64-bit unsigned value. This parameter is\r
2055 optional and may be NULL.\r
2056\r
2057 @return Dividend / Divisor\r
2058\r
2059**/\r
2060UINT64\r
2061EFIAPI\r
2062DivU64x64Remainder (\r
2063 IN UINT64 Dividend,\r
2064 IN UINT64 Divisor,\r
2065 OUT UINT64 *Remainder OPTIONAL\r
2066 );\r
2067\r
2068\r
2069/**\r
2070 Divides a 64-bit signed integer by a 64-bit signed integer and generates a\r
2071 64-bit signed result and a optional 64-bit signed remainder.\r
2072\r
2073 This function divides the 64-bit signed value Dividend by the 64-bit signed\r
2074 value Divisor and generates a 64-bit signed quotient. If Remainder is not\r
2075 NULL, then the 64-bit signed remainder is returned in Remainder. This\r
2076 function returns the 64-bit signed quotient.\r
2077\r
2078 It is the caller's responsibility to not call this function with a Divisor of 0.\r
2079 If Divisor is 0, then the quotient and remainder should be assumed to be \r
2080 the largest negative integer.\r
2081\r
2082 If Divisor is 0, then ASSERT().\r
2083\r
2084 @param Dividend A 64-bit signed value.\r
2085 @param Divisor A 64-bit signed value.\r
2086 @param Remainder A pointer to a 64-bit signed value. This parameter is\r
2087 optional and may be NULL.\r
2088\r
2089 @return Dividend / Divisor\r
2090\r
2091**/\r
2092INT64\r
2093EFIAPI\r
2094DivS64x64Remainder (\r
2095 IN INT64 Dividend,\r
2096 IN INT64 Divisor,\r
2097 OUT INT64 *Remainder OPTIONAL\r
2098 );\r
2099\r
2100\r
2101/**\r
2102 Reads a 16-bit value from memory that may be unaligned.\r
2103\r
2104 This function returns the 16-bit value pointed to by Buffer. The function\r
2105 guarantees that the read operation does not produce an alignment fault.\r
2106\r
2107 If the Buffer is NULL, then ASSERT().\r
2108\r
2109 @param Buffer Pointer to a 16-bit value that may be unaligned.\r
2110\r
2111 @return The 16-bit value read from Buffer.\r
2112\r
2113**/\r
2114UINT16\r
2115EFIAPI\r
2116ReadUnaligned16 (\r
2117 IN CONST UINT16 *Buffer\r
2118 );\r
2119\r
2120\r
2121/**\r
2122 Writes a 16-bit value to memory that may be unaligned.\r
2123\r
2124 This function writes the 16-bit value specified by Value to Buffer. Value is\r
2125 returned. The function guarantees that the write operation does not produce\r
2126 an alignment fault.\r
2127\r
2128 If the Buffer is NULL, then ASSERT().\r
2129\r
2130 @param Buffer Pointer to a 16-bit value that may be unaligned.\r
2131 @param Value 16-bit value to write to Buffer.\r
2132\r
2133 @return The 16-bit value to write to Buffer.\r
2134\r
2135**/\r
2136UINT16\r
2137EFIAPI\r
2138WriteUnaligned16 (\r
2139 OUT UINT16 *Buffer,\r
2140 IN UINT16 Value\r
2141 );\r
2142\r
2143\r
2144/**\r
2145 Reads a 24-bit value from memory that may be unaligned.\r
2146\r
2147 This function returns the 24-bit value pointed to by Buffer. The function\r
2148 guarantees that the read operation does not produce an alignment fault.\r
2149\r
2150 If the Buffer is NULL, then ASSERT().\r
2151\r
2152 @param Buffer Pointer to a 24-bit value that may be unaligned.\r
2153\r
2154 @return The 24-bit value read from Buffer.\r
2155\r
2156**/\r
2157UINT32\r
2158EFIAPI\r
2159ReadUnaligned24 (\r
2160 IN CONST UINT32 *Buffer\r
2161 );\r
2162\r
2163\r
2164/**\r
2165 Writes a 24-bit value to memory that may be unaligned.\r
2166\r
2167 This function writes the 24-bit value specified by Value to Buffer. Value is\r
2168 returned. The function guarantees that the write operation does not produce\r
2169 an alignment fault.\r
2170\r
2171 If the Buffer is NULL, then ASSERT().\r
2172\r
2173 @param Buffer Pointer to a 24-bit value that may be unaligned.\r
2174 @param Value 24-bit value to write to Buffer.\r
2175\r
2176 @return The 24-bit value to write to Buffer.\r
2177\r
2178**/\r
2179UINT32\r
2180EFIAPI\r
2181WriteUnaligned24 (\r
2182 OUT UINT32 *Buffer,\r
2183 IN UINT32 Value\r
2184 );\r
2185\r
2186\r
2187/**\r
2188 Reads a 32-bit value from memory that may be unaligned.\r
2189\r
2190 This function returns the 32-bit value pointed to by Buffer. The function\r
2191 guarantees that the read operation does not produce an alignment fault.\r
2192\r
2193 If the Buffer is NULL, then ASSERT().\r
2194\r
2195 @param Buffer Pointer to a 32-bit value that may be unaligned.\r
2196\r
2197 @return The 32-bit value read from Buffer.\r
2198\r
2199**/\r
2200UINT32\r
2201EFIAPI\r
2202ReadUnaligned32 (\r
2203 IN CONST UINT32 *Buffer\r
2204 );\r
2205\r
2206\r
2207/**\r
2208 Writes a 32-bit value to memory that may be unaligned.\r
2209\r
2210 This function writes the 32-bit value specified by Value to Buffer. Value is\r
2211 returned. The function guarantees that the write operation does not produce\r
2212 an alignment fault.\r
2213\r
2214 If the Buffer is NULL, then ASSERT().\r
2215\r
2216 @param Buffer Pointer to a 32-bit value that may be unaligned.\r
2217 @param Value 32-bit value to write to Buffer.\r
2218\r
2219 @return The 32-bit value to write to Buffer.\r
2220\r
2221**/\r
2222UINT32\r
2223EFIAPI\r
2224WriteUnaligned32 (\r
2225 OUT UINT32 *Buffer,\r
2226 IN UINT32 Value\r
2227 );\r
2228\r
2229\r
2230/**\r
2231 Reads a 64-bit value from memory that may be unaligned.\r
2232\r
2233 This function returns the 64-bit value pointed to by Buffer. The function\r
2234 guarantees that the read operation does not produce an alignment fault.\r
2235\r
2236 If the Buffer is NULL, then ASSERT().\r
2237\r
2238 @param Buffer Pointer to a 64-bit value that may be unaligned.\r
2239\r
2240 @return The 64-bit value read from Buffer.\r
2241\r
2242**/\r
2243UINT64\r
2244EFIAPI\r
2245ReadUnaligned64 (\r
2246 IN CONST UINT64 *Buffer\r
2247 );\r
2248\r
2249\r
2250/**\r
2251 Writes a 64-bit value to memory that may be unaligned.\r
2252\r
2253 This function writes the 64-bit value specified by Value to Buffer. Value is\r
2254 returned. The function guarantees that the write operation does not produce\r
2255 an alignment fault.\r
2256\r
2257 If the Buffer is NULL, then ASSERT().\r
2258\r
2259 @param Buffer Pointer to a 64-bit value that may be unaligned.\r
2260 @param Value 64-bit value to write to Buffer.\r
2261\r
2262 @return The 64-bit value to write to Buffer.\r
2263\r
2264**/\r
2265UINT64\r
2266EFIAPI\r
2267WriteUnaligned64 (\r
2268 OUT UINT64 *Buffer,\r
2269 IN UINT64 Value\r
2270 );\r
2271\r
2272\r
2273//\r
2274// Bit Field Functions\r
2275//\r
2276\r
2277/**\r
2278 Returns a bit field from an 8-bit value.\r
2279\r
2280 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2281\r
2282 If 8-bit operations are not supported, then ASSERT().\r
2283 If StartBit is greater than 7, then ASSERT().\r
2284 If EndBit is greater than 7, then ASSERT().\r
2285 If EndBit is less than StartBit, then ASSERT().\r
2286\r
2287 @param Operand Operand on which to perform the bitfield operation.\r
2288 @param StartBit The ordinal of the least significant bit in the bit field.\r
2289 Range 0..7.\r
2290 @param EndBit The ordinal of the most significant bit in the bit field.\r
2291 Range 0..7.\r
2292\r
2293 @return The bit field read.\r
2294\r
2295**/\r
2296UINT8\r
2297EFIAPI\r
2298BitFieldRead8 (\r
2299 IN UINT8 Operand,\r
2300 IN UINTN StartBit,\r
2301 IN UINTN EndBit\r
2302 );\r
2303\r
2304\r
2305/**\r
2306 Writes a bit field to an 8-bit value, and returns the result.\r
2307\r
2308 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2309 Operand. All other bits in Operand are preserved. The new 8-bit value is\r
2310 returned.\r
2311\r
2312 If 8-bit operations are not supported, then ASSERT().\r
2313 If StartBit is greater than 7, then ASSERT().\r
2314 If EndBit is greater than 7, then ASSERT().\r
2315 If EndBit is less than StartBit, then ASSERT().\r
2316\r
2317 @param Operand Operand on which to perform the bitfield operation.\r
2318 @param StartBit The ordinal of the least significant bit in the bit field.\r
2319 Range 0..7.\r
2320 @param EndBit The ordinal of the most significant bit in the bit field.\r
2321 Range 0..7.\r
2322 @param Value New value of the bit field.\r
2323\r
2324 @return The new 8-bit value.\r
2325\r
2326**/\r
2327UINT8\r
2328EFIAPI\r
2329BitFieldWrite8 (\r
2330 IN UINT8 Operand,\r
2331 IN UINTN StartBit,\r
2332 IN UINTN EndBit,\r
2333 IN UINT8 Value\r
2334 );\r
2335\r
2336\r
2337/**\r
2338 Reads a bit field from an 8-bit value, performs a bitwise OR, and returns the\r
2339 result.\r
2340\r
2341 Performs a bitwise OR between the bit field specified by StartBit\r
2342 and EndBit in Operand and the value specified by OrData. All other bits in\r
2343 Operand are preserved. The new 8-bit value is returned.\r
2344\r
2345 If 8-bit operations are not supported, then ASSERT().\r
2346 If StartBit is greater than 7, then ASSERT().\r
2347 If EndBit is greater than 7, then ASSERT().\r
2348 If EndBit is less than StartBit, then ASSERT().\r
2349\r
2350 @param Operand Operand on which to perform the bitfield operation.\r
2351 @param StartBit The ordinal of the least significant bit in the bit field.\r
2352 Range 0..7.\r
2353 @param EndBit The ordinal of the most significant bit in the bit field.\r
2354 Range 0..7.\r
2355 @param OrData The value to OR with the read value from the value\r
2356\r
2357 @return The new 8-bit value.\r
2358\r
2359**/\r
2360UINT8\r
2361EFIAPI\r
2362BitFieldOr8 (\r
2363 IN UINT8 Operand,\r
2364 IN UINTN StartBit,\r
2365 IN UINTN EndBit,\r
2366 IN UINT8 OrData\r
2367 );\r
2368\r
2369\r
2370/**\r
2371 Reads a bit field from an 8-bit value, performs a bitwise AND, and returns\r
2372 the result.\r
2373\r
2374 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2375 in Operand and the value specified by AndData. All other bits in Operand are\r
2376 preserved. The new 8-bit value is returned.\r
2377\r
2378 If 8-bit operations are not supported, then ASSERT().\r
2379 If StartBit is greater than 7, then ASSERT().\r
2380 If EndBit is greater than 7, then ASSERT().\r
2381 If EndBit is less than StartBit, then ASSERT().\r
2382\r
2383 @param Operand Operand on which to perform the bitfield operation.\r
2384 @param StartBit The ordinal of the least significant bit in the bit field.\r
2385 Range 0..7.\r
2386 @param EndBit The ordinal of the most significant bit in the bit field.\r
2387 Range 0..7.\r
2388 @param AndData The value to AND with the read value from the value.\r
2389\r
2390 @return The new 8-bit value.\r
2391\r
2392**/\r
2393UINT8\r
2394EFIAPI\r
2395BitFieldAnd8 (\r
2396 IN UINT8 Operand,\r
2397 IN UINTN StartBit,\r
2398 IN UINTN EndBit,\r
2399 IN UINT8 AndData\r
2400 );\r
2401\r
2402\r
2403/**\r
2404 Reads a bit field from an 8-bit value, performs a bitwise AND followed by a\r
2405 bitwise OR, and returns the result.\r
2406\r
2407 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2408 in Operand and the value specified by AndData, followed by a bitwise \r
2409 OR with value specified by OrData. All other bits in Operand are\r
2410 preserved. The new 8-bit value is returned.\r
2411\r
2412 If 8-bit operations are not supported, then ASSERT().\r
2413 If StartBit is greater than 7, then ASSERT().\r
2414 If EndBit is greater than 7, then ASSERT().\r
2415 If EndBit is less than StartBit, then ASSERT().\r
2416\r
2417 @param Operand Operand on which to perform the bitfield operation.\r
2418 @param StartBit The ordinal of the least significant bit in the bit field.\r
2419 Range 0..7.\r
2420 @param EndBit The ordinal of the most significant bit in the bit field.\r
2421 Range 0..7.\r
2422 @param AndData The value to AND with the read value from the value.\r
2423 @param OrData The value to OR with the result of the AND operation.\r
2424\r
2425 @return The new 8-bit value.\r
2426\r
2427**/\r
2428UINT8\r
2429EFIAPI\r
2430BitFieldAndThenOr8 (\r
2431 IN UINT8 Operand,\r
2432 IN UINTN StartBit,\r
2433 IN UINTN EndBit,\r
2434 IN UINT8 AndData,\r
2435 IN UINT8 OrData\r
2436 );\r
2437\r
2438\r
2439/**\r
2440 Returns a bit field from a 16-bit value.\r
2441\r
2442 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2443\r
2444 If 16-bit operations are not supported, then ASSERT().\r
2445 If StartBit is greater than 15, then ASSERT().\r
2446 If EndBit is greater than 15, then ASSERT().\r
2447 If EndBit is less than StartBit, then ASSERT().\r
2448\r
2449 @param Operand Operand on which to perform the bitfield operation.\r
2450 @param StartBit The ordinal of the least significant bit in the bit field.\r
2451 Range 0..15.\r
2452 @param EndBit The ordinal of the most significant bit in the bit field.\r
2453 Range 0..15.\r
2454\r
2455 @return The bit field read.\r
2456\r
2457**/\r
2458UINT16\r
2459EFIAPI\r
2460BitFieldRead16 (\r
2461 IN UINT16 Operand,\r
2462 IN UINTN StartBit,\r
2463 IN UINTN EndBit\r
2464 );\r
2465\r
2466\r
2467/**\r
2468 Writes a bit field to a 16-bit value, and returns the result.\r
2469\r
2470 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2471 Operand. All other bits in Operand are preserved. The new 16-bit value is\r
2472 returned.\r
2473\r
2474 If 16-bit operations are not supported, then ASSERT().\r
2475 If StartBit is greater than 15, then ASSERT().\r
2476 If EndBit is greater than 15, then ASSERT().\r
2477 If EndBit is less than StartBit, then ASSERT().\r
2478\r
2479 @param Operand Operand on which to perform the bitfield operation.\r
2480 @param StartBit The ordinal of the least significant bit in the bit field.\r
2481 Range 0..15.\r
2482 @param EndBit The ordinal of the most significant bit in the bit field.\r
2483 Range 0..15.\r
2484 @param Value New value of the bit field.\r
2485\r
2486 @return The new 16-bit value.\r
2487\r
2488**/\r
2489UINT16\r
2490EFIAPI\r
2491BitFieldWrite16 (\r
2492 IN UINT16 Operand,\r
2493 IN UINTN StartBit,\r
2494 IN UINTN EndBit,\r
2495 IN UINT16 Value\r
2496 );\r
2497\r
2498\r
2499/**\r
2500 Reads a bit field from a 16-bit value, performs a bitwise OR, and returns the\r
2501 result.\r
2502\r
2503 Performs a bitwise OR between the bit field specified by StartBit\r
2504 and EndBit in Operand and the value specified by OrData. All other bits in\r
2505 Operand are preserved. The new 16-bit value is returned.\r
2506\r
2507 If 16-bit operations are not supported, then ASSERT().\r
2508 If StartBit is greater than 15, then ASSERT().\r
2509 If EndBit is greater than 15, then ASSERT().\r
2510 If EndBit is less than StartBit, then ASSERT().\r
2511\r
2512 @param Operand Operand on which to perform the bitfield operation.\r
2513 @param StartBit The ordinal of the least significant bit in the bit field.\r
2514 Range 0..15.\r
2515 @param EndBit The ordinal of the most significant bit in the bit field.\r
2516 Range 0..15.\r
2517 @param OrData The value to OR with the read value from the value\r
2518\r
2519 @return The new 16-bit value.\r
2520\r
2521**/\r
2522UINT16\r
2523EFIAPI\r
2524BitFieldOr16 (\r
2525 IN UINT16 Operand,\r
2526 IN UINTN StartBit,\r
2527 IN UINTN EndBit,\r
2528 IN UINT16 OrData\r
2529 );\r
2530\r
2531\r
2532/**\r
2533 Reads a bit field from a 16-bit value, performs a bitwise AND, and returns\r
2534 the result.\r
2535\r
2536 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2537 in Operand and the value specified by AndData. All other bits in Operand are\r
2538 preserved. The new 16-bit value is returned.\r
2539\r
2540 If 16-bit operations are not supported, then ASSERT().\r
2541 If StartBit is greater than 15, then ASSERT().\r
2542 If EndBit is greater than 15, then ASSERT().\r
2543 If EndBit is less than StartBit, then ASSERT().\r
2544\r
2545 @param Operand Operand on which to perform the bitfield operation.\r
2546 @param StartBit The ordinal of the least significant bit in the bit field.\r
2547 Range 0..15.\r
2548 @param EndBit The ordinal of the most significant bit in the bit field.\r
2549 Range 0..15.\r
2550 @param AndData The value to AND with the read value from the value\r
2551\r
2552 @return The new 16-bit value.\r
2553\r
2554**/\r
2555UINT16\r
2556EFIAPI\r
2557BitFieldAnd16 (\r
2558 IN UINT16 Operand,\r
2559 IN UINTN StartBit,\r
2560 IN UINTN EndBit,\r
2561 IN UINT16 AndData\r
2562 );\r
2563\r
2564\r
2565/**\r
2566 Reads a bit field from a 16-bit value, performs a bitwise AND followed by a\r
2567 bitwise OR, and returns the result.\r
2568\r
2569 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2570 in Operand and the value specified by AndData, followed by a bitwise \r
2571 OR with value specified by OrData. All other bits in Operand are\r
2572 preserved. The new 16-bit value is returned.\r
2573\r
2574 If 16-bit operations are not supported, then ASSERT().\r
2575 If StartBit is greater than 15, then ASSERT().\r
2576 If EndBit is greater than 15, then ASSERT().\r
2577 If EndBit is less than StartBit, then ASSERT().\r
2578\r
2579 @param Operand Operand on which to perform the bitfield operation.\r
2580 @param StartBit The ordinal of the least significant bit in the bit field.\r
2581 Range 0..15.\r
2582 @param EndBit The ordinal of the most significant bit in the bit field.\r
2583 Range 0..15.\r
2584 @param AndData The value to AND with the read value from the value.\r
2585 @param OrData The value to OR with the result of the AND operation.\r
2586\r
2587 @return The new 16-bit value.\r
2588\r
2589**/\r
2590UINT16\r
2591EFIAPI\r
2592BitFieldAndThenOr16 (\r
2593 IN UINT16 Operand,\r
2594 IN UINTN StartBit,\r
2595 IN UINTN EndBit,\r
2596 IN UINT16 AndData,\r
2597 IN UINT16 OrData\r
2598 );\r
2599\r
2600\r
2601/**\r
2602 Returns a bit field from a 32-bit value.\r
2603\r
2604 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2605\r
2606 If 32-bit operations are not supported, then ASSERT().\r
2607 If StartBit is greater than 31, then ASSERT().\r
2608 If EndBit is greater than 31, then ASSERT().\r
2609 If EndBit is less than StartBit, then ASSERT().\r
2610\r
2611 @param Operand Operand on which to perform the bitfield operation.\r
2612 @param StartBit The ordinal of the least significant bit in the bit field.\r
2613 Range 0..31.\r
2614 @param EndBit The ordinal of the most significant bit in the bit field.\r
2615 Range 0..31.\r
2616\r
2617 @return The bit field read.\r
2618\r
2619**/\r
2620UINT32\r
2621EFIAPI\r
2622BitFieldRead32 (\r
2623 IN UINT32 Operand,\r
2624 IN UINTN StartBit,\r
2625 IN UINTN EndBit\r
2626 );\r
2627\r
2628\r
2629/**\r
2630 Writes a bit field to a 32-bit value, and returns the result.\r
2631\r
2632 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2633 Operand. All other bits in Operand are preserved. The new 32-bit value is\r
2634 returned.\r
2635\r
2636 If 32-bit operations are not supported, then ASSERT().\r
2637 If StartBit is greater than 31, then ASSERT().\r
2638 If EndBit is greater than 31, then ASSERT().\r
2639 If EndBit is less than StartBit, then ASSERT().\r
2640\r
2641 @param Operand Operand on which to perform the bitfield operation.\r
2642 @param StartBit The ordinal of the least significant bit in the bit field.\r
2643 Range 0..31.\r
2644 @param EndBit The ordinal of the most significant bit in the bit field.\r
2645 Range 0..31.\r
2646 @param Value New value of the bit field.\r
2647\r
2648 @return The new 32-bit value.\r
2649\r
2650**/\r
2651UINT32\r
2652EFIAPI\r
2653BitFieldWrite32 (\r
2654 IN UINT32 Operand,\r
2655 IN UINTN StartBit,\r
2656 IN UINTN EndBit,\r
2657 IN UINT32 Value\r
2658 );\r
2659\r
2660\r
2661/**\r
2662 Reads a bit field from a 32-bit value, performs a bitwise OR, and returns the\r
2663 result.\r
2664\r
2665 Performs a bitwise OR between the bit field specified by StartBit\r
2666 and EndBit in Operand and the value specified by OrData. All other bits in\r
2667 Operand are preserved. The new 32-bit value is returned.\r
2668\r
2669 If 32-bit operations are not supported, then ASSERT().\r
2670 If StartBit is greater than 31, then ASSERT().\r
2671 If EndBit is greater than 31, then ASSERT().\r
2672 If EndBit is less than StartBit, then ASSERT().\r
2673\r
2674 @param Operand Operand on which to perform the bitfield operation.\r
2675 @param StartBit The ordinal of the least significant bit in the bit field.\r
2676 Range 0..31.\r
2677 @param EndBit The ordinal of the most significant bit in the bit field.\r
2678 Range 0..31.\r
2679 @param OrData The value to OR with the read value from the value\r
2680\r
2681 @return The new 32-bit value.\r
2682\r
2683**/\r
2684UINT32\r
2685EFIAPI\r
2686BitFieldOr32 (\r
2687 IN UINT32 Operand,\r
2688 IN UINTN StartBit,\r
2689 IN UINTN EndBit,\r
2690 IN UINT32 OrData\r
2691 );\r
2692\r
2693\r
2694/**\r
2695 Reads a bit field from a 32-bit value, performs a bitwise AND, and returns\r
2696 the result.\r
2697\r
2698 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2699 in Operand and the value specified by AndData. All other bits in Operand are\r
2700 preserved. The new 32-bit value is returned.\r
2701\r
2702 If 32-bit operations are not supported, then ASSERT().\r
2703 If StartBit is greater than 31, then ASSERT().\r
2704 If EndBit is greater than 31, then ASSERT().\r
2705 If EndBit is less than StartBit, then ASSERT().\r
2706\r
2707 @param Operand Operand on which to perform the bitfield operation.\r
2708 @param StartBit The ordinal of the least significant bit in the bit field.\r
2709 Range 0..31.\r
2710 @param EndBit The ordinal of the most significant bit in the bit field.\r
2711 Range 0..31.\r
2712 @param AndData The value to AND with the read value from the value\r
2713\r
2714 @return The new 32-bit value.\r
2715\r
2716**/\r
2717UINT32\r
2718EFIAPI\r
2719BitFieldAnd32 (\r
2720 IN UINT32 Operand,\r
2721 IN UINTN StartBit,\r
2722 IN UINTN EndBit,\r
2723 IN UINT32 AndData\r
2724 );\r
2725\r
2726\r
2727/**\r
2728 Reads a bit field from a 32-bit value, performs a bitwise AND followed by a\r
2729 bitwise OR, and returns the result.\r
2730\r
2731 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2732 in Operand and the value specified by AndData, followed by a bitwise \r
2733 OR with value specified by OrData. All other bits in Operand are\r
2734 preserved. The new 32-bit value is returned.\r
2735\r
2736 If 32-bit operations are not supported, then ASSERT().\r
2737 If StartBit is greater than 31, then ASSERT().\r
2738 If EndBit is greater than 31, then ASSERT().\r
2739 If EndBit is less than StartBit, then ASSERT().\r
2740\r
2741 @param Operand Operand on which to perform the bitfield operation.\r
2742 @param StartBit The ordinal of the least significant bit in the bit field.\r
2743 Range 0..31.\r
2744 @param EndBit The ordinal of the most significant bit in the bit field.\r
2745 Range 0..31.\r
2746 @param AndData The value to AND with the read value from the value.\r
2747 @param OrData The value to OR with the result of the AND operation.\r
2748\r
2749 @return The new 32-bit value.\r
2750\r
2751**/\r
2752UINT32\r
2753EFIAPI\r
2754BitFieldAndThenOr32 (\r
2755 IN UINT32 Operand,\r
2756 IN UINTN StartBit,\r
2757 IN UINTN EndBit,\r
2758 IN UINT32 AndData,\r
2759 IN UINT32 OrData\r
2760 );\r
2761\r
2762\r
2763/**\r
2764 Returns a bit field from a 64-bit value.\r
2765\r
2766 Returns the bitfield specified by the StartBit and the EndBit from Operand.\r
2767\r
2768 If 64-bit operations are not supported, then ASSERT().\r
2769 If StartBit is greater than 63, then ASSERT().\r
2770 If EndBit is greater than 63, then ASSERT().\r
2771 If EndBit is less than StartBit, then ASSERT().\r
2772\r
2773 @param Operand Operand on which to perform the bitfield operation.\r
2774 @param StartBit The ordinal of the least significant bit in the bit field.\r
2775 Range 0..63.\r
2776 @param EndBit The ordinal of the most significant bit in the bit field.\r
2777 Range 0..63.\r
2778\r
2779 @return The bit field read.\r
2780\r
2781**/\r
2782UINT64\r
2783EFIAPI\r
2784BitFieldRead64 (\r
2785 IN UINT64 Operand,\r
2786 IN UINTN StartBit,\r
2787 IN UINTN EndBit\r
2788 );\r
2789\r
2790\r
2791/**\r
2792 Writes a bit field to a 64-bit value, and returns the result.\r
2793\r
2794 Writes Value to the bit field specified by the StartBit and the EndBit in\r
2795 Operand. All other bits in Operand are preserved. The new 64-bit value is\r
2796 returned.\r
2797\r
2798 If 64-bit operations are not supported, then ASSERT().\r
2799 If StartBit is greater than 63, then ASSERT().\r
2800 If EndBit is greater than 63, then ASSERT().\r
2801 If EndBit is less than StartBit, then ASSERT().\r
2802\r
2803 @param Operand Operand on which to perform the bitfield operation.\r
2804 @param StartBit The ordinal of the least significant bit in the bit field.\r
2805 Range 0..63.\r
2806 @param EndBit The ordinal of the most significant bit in the bit field.\r
2807 Range 0..63.\r
2808 @param Value New value of the bit field.\r
2809\r
2810 @return The new 64-bit value.\r
2811\r
2812**/\r
2813UINT64\r
2814EFIAPI\r
2815BitFieldWrite64 (\r
2816 IN UINT64 Operand,\r
2817 IN UINTN StartBit,\r
2818 IN UINTN EndBit,\r
2819 IN UINT64 Value\r
2820 );\r
2821\r
2822\r
2823/**\r
2824 Reads a bit field from a 64-bit value, performs a bitwise OR, and returns the\r
2825 result.\r
2826\r
2827 Performs a bitwise OR between the bit field specified by StartBit\r
2828 and EndBit in Operand and the value specified by OrData. All other bits in\r
2829 Operand are preserved. The new 64-bit value is returned.\r
2830\r
2831 If 64-bit operations are not supported, then ASSERT().\r
2832 If StartBit is greater than 63, then ASSERT().\r
2833 If EndBit is greater than 63, then ASSERT().\r
2834 If EndBit is less than StartBit, then ASSERT().\r
2835\r
2836 @param Operand Operand on which to perform the bitfield operation.\r
2837 @param StartBit The ordinal of the least significant bit in the bit field.\r
2838 Range 0..63.\r
2839 @param EndBit The ordinal of the most significant bit in the bit field.\r
2840 Range 0..63.\r
2841 @param OrData The value to OR with the read value from the value\r
2842\r
2843 @return The new 64-bit value.\r
2844\r
2845**/\r
2846UINT64\r
2847EFIAPI\r
2848BitFieldOr64 (\r
2849 IN UINT64 Operand,\r
2850 IN UINTN StartBit,\r
2851 IN UINTN EndBit,\r
2852 IN UINT64 OrData\r
2853 );\r
2854\r
2855\r
2856/**\r
2857 Reads a bit field from a 64-bit value, performs a bitwise AND, and returns\r
2858 the result.\r
2859\r
2860 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2861 in Operand and the value specified by AndData. All other bits in Operand are\r
2862 preserved. The new 64-bit value is returned.\r
2863\r
2864 If 64-bit operations are not supported, then ASSERT().\r
2865 If StartBit is greater than 63, then ASSERT().\r
2866 If EndBit is greater than 63, then ASSERT().\r
2867 If EndBit is less than StartBit, then ASSERT().\r
2868\r
2869 @param Operand Operand on which to perform the bitfield operation.\r
2870 @param StartBit The ordinal of the least significant bit in the bit field.\r
2871 Range 0..63.\r
2872 @param EndBit The ordinal of the most significant bit in the bit field.\r
2873 Range 0..63.\r
2874 @param AndData The value to AND with the read value from the value\r
2875\r
2876 @return The new 64-bit value.\r
2877\r
2878**/\r
2879UINT64\r
2880EFIAPI\r
2881BitFieldAnd64 (\r
2882 IN UINT64 Operand,\r
2883 IN UINTN StartBit,\r
2884 IN UINTN EndBit,\r
2885 IN UINT64 AndData\r
2886 );\r
2887\r
2888\r
2889/**\r
2890 Reads a bit field from a 64-bit value, performs a bitwise AND followed by a\r
2891 bitwise OR, and returns the result.\r
2892\r
2893 Performs a bitwise AND between the bit field specified by StartBit and EndBit\r
2894 in Operand and the value specified by AndData, followed by a bitwise \r
2895 OR with value specified by OrData. All other bits in Operand are\r
2896 preserved. The new 64-bit value is returned.\r
2897\r
2898 If 64-bit operations are not supported, then ASSERT().\r
2899 If StartBit is greater than 63, then ASSERT().\r
2900 If EndBit is greater than 63, then ASSERT().\r
2901 If EndBit is less than StartBit, then ASSERT().\r
2902\r
2903 @param Operand Operand on which to perform the bitfield operation.\r
2904 @param StartBit The ordinal of the least significant bit in the bit field.\r
2905 Range 0..63.\r
2906 @param EndBit The ordinal of the most significant bit in the bit field.\r
2907 Range 0..63.\r
2908 @param AndData The value to AND with the read value from the value.\r
2909 @param OrData The value to OR with the result of the AND operation.\r
2910\r
2911 @return The new 64-bit value.\r
2912\r
2913**/\r
2914UINT64\r
2915EFIAPI\r
2916BitFieldAndThenOr64 (\r
2917 IN UINT64 Operand,\r
2918 IN UINTN StartBit,\r
2919 IN UINTN EndBit,\r
2920 IN UINT64 AndData,\r
2921 IN UINT64 OrData\r
2922 );\r
2923\r
2924//\r
2925// Base Library Checksum Functions\r
2926//\r
2927\r
2928/**\r
2929 Returns the sum of all elements in a buffer in unit of UINT8.\r
2930 During calculation, the carry bits are dropped.\r
2931\r
2932 This function calculates the sum of all elements in a buffer\r
2933 in unit of UINT8. The carry bits in result of addition are dropped.\r
2934 The result is returned as UINT8. If Length is Zero, then Zero is\r
2935 returned.\r
2936\r
2937 If Buffer is NULL, then ASSERT().\r
2938 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
2939\r
2940 @param Buffer Pointer to the buffer to carry out the sum operation.\r
2941 @param Length The size, in bytes, of Buffer.\r
2942\r
2943 @return Sum The sum of Buffer with carry bits dropped during additions.\r
2944\r
2945**/\r
2946UINT8\r
2947EFIAPI\r
2948CalculateSum8 (\r
2949 IN CONST UINT8 *Buffer,\r
2950 IN UINTN Length\r
2951 );\r
2952\r
2953\r
2954/**\r
2955 Returns the two's complement checksum of all elements in a buffer\r
2956 of 8-bit values.\r
2957\r
2958 This function first calculates the sum of the 8-bit values in the\r
2959 buffer specified by Buffer and Length. The carry bits in the result\r
2960 of addition are dropped. Then, the two's complement of the sum is\r
2961 returned. If Length is 0, then 0 is returned.\r
2962\r
2963 If Buffer is NULL, then ASSERT().\r
2964 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
2965\r
2966 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
2967 @param Length The size, in bytes, of Buffer.\r
2968\r
2969 @return Checksum The 2's complement checksum of Buffer.\r
2970\r
2971**/\r
2972UINT8\r
2973EFIAPI\r
2974CalculateCheckSum8 (\r
2975 IN CONST UINT8 *Buffer,\r
2976 IN UINTN Length\r
2977 );\r
2978\r
2979\r
2980/**\r
2981 Returns the sum of all elements in a buffer of 16-bit values. During\r
2982 calculation, the carry bits are dropped.\r
2983\r
2984 This function calculates the sum of the 16-bit values in the buffer\r
2985 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
2986 The 16-bit result is returned. If Length is 0, then 0 is returned.\r
2987\r
2988 If Buffer is NULL, then ASSERT().\r
2989 If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
2990 If Length is not aligned on a 16-bit boundary, then ASSERT().\r
2991 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
2992\r
2993 @param Buffer Pointer to the buffer to carry out the sum operation.\r
2994 @param Length The size, in bytes, of Buffer.\r
2995\r
2996 @return Sum The sum of Buffer with carry bits dropped during additions.\r
2997\r
2998**/\r
2999UINT16\r
3000EFIAPI\r
3001CalculateSum16 (\r
3002 IN CONST UINT16 *Buffer,\r
3003 IN UINTN Length\r
3004 );\r
3005\r
3006\r
3007/**\r
3008 Returns the two's complement checksum of all elements in a buffer of\r
3009 16-bit values.\r
3010\r
3011 This function first calculates the sum of the 16-bit values in the buffer\r
3012 specified by Buffer and Length. The carry bits in the result of addition\r
3013 are dropped. Then, the two's complement of the sum is returned. If Length\r
3014 is 0, then 0 is returned.\r
3015\r
3016 If Buffer is NULL, then ASSERT().\r
3017 If Buffer is not aligned on a 16-bit boundary, then ASSERT().\r
3018 If Length is not aligned on a 16-bit boundary, then ASSERT().\r
3019 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3020\r
3021 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3022 @param Length The size, in bytes, of Buffer.\r
3023\r
3024 @return Checksum The 2's complement checksum of Buffer.\r
3025\r
3026**/\r
3027UINT16\r
3028EFIAPI\r
3029CalculateCheckSum16 (\r
3030 IN CONST UINT16 *Buffer,\r
3031 IN UINTN Length\r
3032 );\r
3033\r
3034\r
3035/**\r
3036 Returns the sum of all elements in a buffer of 32-bit values. During\r
3037 calculation, the carry bits are dropped.\r
3038\r
3039 This function calculates the sum of the 32-bit values in the buffer\r
3040 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
3041 The 32-bit result is returned. If Length is 0, then 0 is returned.\r
3042\r
3043 If Buffer is NULL, then ASSERT().\r
3044 If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
3045 If Length is not aligned on a 32-bit boundary, then ASSERT().\r
3046 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3047\r
3048 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3049 @param Length The size, in bytes, of Buffer.\r
3050\r
3051 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3052\r
3053**/\r
3054UINT32\r
3055EFIAPI\r
3056CalculateSum32 (\r
3057 IN CONST UINT32 *Buffer,\r
3058 IN UINTN Length\r
3059 );\r
3060\r
3061\r
3062/**\r
3063 Returns the two's complement checksum of all elements in a buffer of\r
3064 32-bit values.\r
3065\r
3066 This function first calculates the sum of the 32-bit values in the buffer\r
3067 specified by Buffer and Length. The carry bits in the result of addition\r
3068 are dropped. Then, the two's complement of the sum is returned. If Length\r
3069 is 0, then 0 is returned.\r
3070\r
3071 If Buffer is NULL, then ASSERT().\r
3072 If Buffer is not aligned on a 32-bit boundary, then ASSERT().\r
3073 If Length is not aligned on a 32-bit boundary, then ASSERT().\r
3074 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3075\r
3076 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3077 @param Length The size, in bytes, of Buffer.\r
3078\r
3079 @return Checksum The 2's complement checksum of Buffer.\r
3080\r
3081**/\r
3082UINT32\r
3083EFIAPI\r
3084CalculateCheckSum32 (\r
3085 IN CONST UINT32 *Buffer,\r
3086 IN UINTN Length\r
3087 );\r
3088\r
3089\r
3090/**\r
3091 Returns the sum of all elements in a buffer of 64-bit values. During\r
3092 calculation, the carry bits are dropped.\r
3093\r
3094 This function calculates the sum of the 64-bit values in the buffer\r
3095 specified by Buffer and Length. The carry bits in result of addition are dropped.\r
3096 The 64-bit result is returned. If Length is 0, then 0 is returned.\r
3097\r
3098 If Buffer is NULL, then ASSERT().\r
3099 If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
3100 If Length is not aligned on a 64-bit boundary, then ASSERT().\r
3101 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3102\r
3103 @param Buffer Pointer to the buffer to carry out the sum operation.\r
3104 @param Length The size, in bytes, of Buffer.\r
3105\r
3106 @return Sum The sum of Buffer with carry bits dropped during additions.\r
3107\r
3108**/\r
3109UINT64\r
3110EFIAPI\r
3111CalculateSum64 (\r
3112 IN CONST UINT64 *Buffer,\r
3113 IN UINTN Length\r
3114 );\r
3115\r
3116\r
3117/**\r
3118 Returns the two's complement checksum of all elements in a buffer of\r
3119 64-bit values.\r
3120\r
3121 This function first calculates the sum of the 64-bit values in the buffer\r
3122 specified by Buffer and Length. The carry bits in the result of addition\r
3123 are dropped. Then, the two's complement of the sum is returned. If Length\r
3124 is 0, then 0 is returned.\r
3125\r
3126 If Buffer is NULL, then ASSERT().\r
3127 If Buffer is not aligned on a 64-bit boundary, then ASSERT().\r
3128 If Length is not aligned on a 64-bit boundary, then ASSERT().\r
3129 If Length is greater than (MAX_ADDRESS - Buffer + 1), then ASSERT().\r
3130\r
3131 @param Buffer Pointer to the buffer to carry out the checksum operation.\r
3132 @param Length The size, in bytes, of Buffer.\r
3133\r
3134 @return Checksum The 2's complement checksum of Buffer.\r
3135\r
3136**/\r
3137UINT64\r
3138EFIAPI\r
3139CalculateCheckSum64 (\r
3140 IN CONST UINT64 *Buffer,\r
3141 IN UINTN Length\r
3142 );\r
3143\r
3144\r
3145//\r
3146// Base Library CPU Functions\r
3147//\r
3148\r
3149/**\r
3150 Function entry point used when a stack switch is requested with SwitchStack()\r
3151\r
3152 @param Context1 Context1 parameter passed into SwitchStack().\r
3153 @param Context2 Context2 parameter passed into SwitchStack().\r
3154\r
3155**/\r
3156typedef\r
3157VOID\r
3158(EFIAPI *SWITCH_STACK_ENTRY_POINT)(\r
3159 IN VOID *Context1, OPTIONAL\r
3160 IN VOID *Context2 OPTIONAL\r
3161 );\r
3162\r
3163\r
3164/**\r
3165 Used to serialize load and store operations.\r
3166\r
3167 All loads and stores that proceed calls to this function are guaranteed to be\r
3168 globally visible when this function returns.\r
3169\r
3170**/\r
3171VOID\r
3172EFIAPI\r
3173MemoryFence (\r
3174 VOID\r
3175 );\r
3176\r
3177\r
3178/**\r
3179 Saves the current CPU context that can be restored with a call to LongJump()\r
3180 and returns 0.\r
3181\r
3182 Saves the current CPU context in the buffer specified by JumpBuffer and\r
3183 returns 0. The initial call to SetJump() must always return 0. Subsequent\r
3184 calls to LongJump() cause a non-zero value to be returned by SetJump().\r
3185\r
3186 If JumpBuffer is NULL, then ASSERT().\r
3187 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
3188 \r
3189 NOTE: The structure BASE_LIBRARY_JUMP_BUFFER is CPU architecture specific.\r
3190 The same structure must never be used for more than one CPU architecture context.\r
3191 For example, a BASE_LIBRARY_JUMP_BUFFER allocated by an IA-32 module must never be used from an x64 module. \r
3192 SetJump()/LongJump() is not currently supported for the EBC processor type. \r
3193\r
3194 @param JumpBuffer A pointer to CPU context buffer.\r
3195\r
3196 @retval 0 Indicates a return from SetJump().\r
3197\r
3198**/\r
3199UINTN\r
3200EFIAPI\r
3201SetJump (\r
3202 OUT BASE_LIBRARY_JUMP_BUFFER *JumpBuffer\r
3203 );\r
3204\r
3205\r
3206/**\r
3207 Restores the CPU context that was saved with SetJump().\r
3208\r
3209 Restores the CPU context from the buffer specified by JumpBuffer. This\r
3210 function never returns to the caller. Instead is resumes execution based on\r
3211 the state of JumpBuffer.\r
3212\r
3213 If JumpBuffer is NULL, then ASSERT().\r
3214 For Itanium processors, if JumpBuffer is not aligned on a 16-byte boundary, then ASSERT().\r
3215 If Value is 0, then ASSERT().\r
3216\r
3217 @param JumpBuffer A pointer to CPU context buffer.\r
3218 @param Value The value to return when the SetJump() context is\r
3219 restored and must be non-zero.\r
3220\r
3221**/\r
3222VOID\r
3223EFIAPI\r
3224LongJump (\r
3225 IN BASE_LIBRARY_JUMP_BUFFER *JumpBuffer,\r
3226 IN UINTN Value\r
3227 );\r
3228\r
3229\r
3230/**\r
3231 Enables CPU interrupts.\r
3232\r
3233**/\r
3234VOID\r
3235EFIAPI\r
3236EnableInterrupts (\r
3237 VOID\r
3238 );\r
3239\r
3240\r
3241/**\r
3242 Disables CPU interrupts.\r
3243\r
3244**/\r
3245VOID\r
3246EFIAPI\r
3247DisableInterrupts (\r
3248 VOID\r
3249 );\r
3250\r
3251\r
3252/**\r
3253 Disables CPU interrupts and returns the interrupt state prior to the disable\r
3254 operation.\r
3255\r
3256 @retval TRUE CPU interrupts were enabled on entry to this call.\r
3257 @retval FALSE CPU interrupts were disabled on entry to this call.\r
3258\r
3259**/\r
3260BOOLEAN\r
3261EFIAPI\r
3262SaveAndDisableInterrupts (\r
3263 VOID\r
3264 );\r
3265\r
3266\r
3267/**\r
3268 Enables CPU interrupts for the smallest window required to capture any\r
3269 pending interrupts.\r
3270\r
3271**/\r
3272VOID\r
3273EFIAPI\r
3274EnableDisableInterrupts (\r
3275 VOID\r
3276 );\r
3277\r
3278\r
3279/**\r
3280 Retrieves the current CPU interrupt state.\r
3281\r
3282 Returns TRUE is interrupts are currently enabled. Otherwise\r
3283 returns FALSE.\r
3284\r
3285 @retval TRUE CPU interrupts are enabled.\r
3286 @retval FALSE CPU interrupts are disabled.\r
3287\r
3288**/\r
3289BOOLEAN\r
3290EFIAPI\r
3291GetInterruptState (\r
3292 VOID\r
3293 );\r
3294\r
3295\r
3296/**\r
3297 Set the current CPU interrupt state.\r
3298\r
3299 Sets the current CPU interrupt state to the state specified by\r
3300 InterruptState. If InterruptState is TRUE, then interrupts are enabled. If\r
3301 InterruptState is FALSE, then interrupts are disabled. InterruptState is\r
3302 returned.\r
3303\r
3304 @param InterruptState TRUE if interrupts should enabled. FALSE if\r
3305 interrupts should be disabled.\r
3306\r
3307 @return InterruptState\r
3308\r
3309**/\r
3310BOOLEAN\r
3311EFIAPI\r
3312SetInterruptState (\r
3313 IN BOOLEAN InterruptState\r
3314 );\r
3315\r
3316\r
3317/**\r
3318 Requests CPU to pause for a short period of time.\r
3319\r
3320 Requests CPU to pause for a short period of time. Typically used in MP\r
3321 systems to prevent memory starvation while waiting for a spin lock.\r
3322\r
3323**/\r
3324VOID\r
3325EFIAPI\r
3326CpuPause (\r
3327 VOID\r
3328 );\r
3329\r
3330\r
3331/**\r
3332 Transfers control to a function starting with a new stack.\r
3333\r
3334 Transfers control to the function specified by EntryPoint using the\r
3335 new stack specified by NewStack and passing in the parameters specified\r
3336 by Context1 and Context2. Context1 and Context2 are optional and may\r
3337 be NULL. The function EntryPoint must never return. This function\r
3338 supports a variable number of arguments following the NewStack parameter.\r
3339 These additional arguments are ignored on IA-32, x64, and EBC architectures.\r
3340 Itanium processors expect one additional parameter of type VOID * that specifies\r
3341 the new backing store pointer.\r
3342\r
3343 If EntryPoint is NULL, then ASSERT().\r
3344 If NewStack is NULL, then ASSERT().\r
3345\r
3346 @param EntryPoint A pointer to function to call with the new stack.\r
3347 @param Context1 A pointer to the context to pass into the EntryPoint\r
3348 function.\r
3349 @param Context2 A pointer to the context to pass into the EntryPoint\r
3350 function.\r
3351 @param NewStack A pointer to the new stack to use for the EntryPoint\r
3352 function.\r
3353 @param ... This variable argument list is ignored for IA-32, x64, and EBC architectures. \r
3354 For Itanium processors, this variable argument list is expected to contain \r
3355 a single parameter of type VOID * that specifies the new backing \r
3356 store pointer.\r
3357\r
3358\r
3359**/\r
3360VOID\r
3361EFIAPI\r
3362SwitchStack (\r
3363 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
3364 IN VOID *Context1, OPTIONAL\r
3365 IN VOID *Context2, OPTIONAL\r
3366 IN VOID *NewStack,\r
3367 ...\r
3368 );\r
3369\r
3370\r
3371/**\r
3372 Generates a breakpoint on the CPU.\r
3373\r
3374 Generates a breakpoint on the CPU. The breakpoint must be implemented such\r
3375 that code can resume normal execution after the breakpoint.\r
3376\r
3377**/\r
3378VOID\r
3379EFIAPI\r
3380CpuBreakpoint (\r
3381 VOID\r
3382 );\r
3383\r
3384\r
3385/**\r
3386 Executes an infinite loop.\r
3387\r
3388 Forces the CPU to execute an infinite loop. A debugger may be used to skip\r
3389 past the loop and the code that follows the loop must execute properly. This\r
3390 implies that the infinite loop must not cause the code that follow it to be\r
3391 optimized away.\r
3392\r
3393**/\r
3394VOID\r
3395EFIAPI\r
3396CpuDeadLoop (\r
3397 VOID\r
3398 );\r
3399 \r
3400#if defined (MDE_CPU_IPF)\r
3401\r
3402/**\r
3403 Flush a range of cache lines in the cache coherency domain of the calling\r
3404 CPU.\r
3405\r
3406 Flushes the cache lines specified by Address and Length. If Address is not aligned \r
3407 on a cache line boundary, then entire cache line containing Address is flushed. \r
3408 If Address + Length is not aligned on a cache line boundary, then the entire cache \r
3409 line containing Address + Length - 1 is flushed. This function may choose to flush \r
3410 the entire cache if that is more efficient than flushing the specified range. If \r
3411 Length is 0, the no cache lines are flushed. Address is returned. \r
3412 This function is only available on Itanium processors.\r
3413\r
3414 If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().\r
3415\r
3416 @param Address The base address of the instruction lines to invalidate. If\r
3417 the CPU is in a physical addressing mode, then Address is a\r
3418 physical address. If the CPU is in a virtual addressing mode,\r
3419 then Address is a virtual address.\r
3420\r
3421 @param Length The number of bytes to invalidate from the instruction cache.\r
3422\r
3423 @return Address.\r
3424\r
3425**/\r
3426VOID *\r
3427EFIAPI\r
3428AsmFlushCacheRange (\r
3429 IN VOID *Address,\r
3430 IN UINTN Length\r
3431 );\r
3432\r
3433\r
3434/**\r
3435 Executes a FC instruction\r
3436 Executes a FC instruction on the cache line specified by Address.\r
3437 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
3438 An implementation may flush a larger region. This function is only available on Itanium processors.\r
3439\r
3440 @param Address The Address of cache line to be flushed.\r
3441\r
3442 @return The address of FC instruction executed.\r
3443\r
3444**/\r
3445UINT64\r
3446EFIAPI\r
3447AsmFc (\r
3448 IN UINT64 Address\r
3449 );\r
3450\r
3451\r
3452/**\r
3453 Executes a FC.I instruction.\r
3454 Executes a FC.I instruction on the cache line specified by Address.\r
3455 The cache line size affected is at least 32-bytes (aligned on a 32-byte boundary).\r
3456 An implementation may flush a larger region. This function is only available on Itanium processors.\r
3457\r
3458 @param Address The Address of cache line to be flushed.\r
3459\r
3460 @return The address of FC.I instruction executed.\r
3461\r
3462**/\r
3463UINT64\r
3464EFIAPI\r
3465AsmFci (\r
3466 IN UINT64 Address\r
3467 );\r
3468\r
3469\r
3470/**\r
3471 Reads the current value of a Processor Identifier Register (CPUID).\r
3472 \r
3473 Reads and returns the current value of Processor Identifier Register specified by Index. \r
3474 The Index of largest implemented CPUID (One less than the number of implemented CPUID\r
3475 registers) is determined by CPUID [3] bits {7:0}.\r
3476 No parameter checking is performed on Index. If the Index value is beyond the\r
3477 implemented CPUID register range, a Reserved Register/Field fault may occur. The caller\r
3478 must either guarantee that Index is valid, or the caller must set up fault handlers to\r
3479 catch the faults. This function is only available on Itanium processors.\r
3480\r
3481 @param Index The 8-bit Processor Identifier Register index to read.\r
3482\r
3483 @return The current value of Processor Identifier Register specified by Index.\r
3484\r
3485**/\r
3486UINT64\r
3487EFIAPI\r
3488AsmReadCpuid (\r
3489 IN UINT8 Index\r
3490 );\r
3491\r
3492\r
3493/**\r
3494 Reads the current value of 64-bit Processor Status Register (PSR).\r
3495 This function is only available on Itanium processors.\r
3496\r
3497 @return The current value of PSR.\r
3498\r
3499**/\r
3500UINT64\r
3501EFIAPI\r
3502AsmReadPsr (\r
3503 VOID\r
3504 );\r
3505\r
3506\r
3507/**\r
3508 Writes the current value of 64-bit Processor Status Register (PSR).\r
3509\r
3510 No parameter checking is performed on Value. All bits of Value corresponding to\r
3511 reserved fields of PSR must be 0 or a Reserved Register/Field fault may occur.\r
3512 The caller must either guarantee that Value is valid, or the caller must set up\r
3513 fault handlers to catch the faults. This function is only available on Itanium processors.\r
3514\r
3515 @param Value The 64-bit value to write to PSR.\r
3516\r
3517 @return The 64-bit value written to the PSR.\r
3518\r
3519**/\r
3520UINT64\r
3521EFIAPI\r
3522AsmWritePsr (\r
3523 IN UINT64 Value\r
3524 );\r
3525\r
3526\r
3527/**\r
3528 Reads the current value of 64-bit Kernel Register #0 (KR0).\r
3529 \r
3530 Reads and returns the current value of KR0. \r
3531 This function is only available on Itanium processors.\r
3532\r
3533 @return The current value of KR0.\r
3534\r
3535**/\r
3536UINT64\r
3537EFIAPI\r
3538AsmReadKr0 (\r
3539 VOID\r
3540 );\r
3541\r
3542\r
3543/**\r
3544 Reads the current value of 64-bit Kernel Register #1 (KR1).\r
3545\r
3546 Reads and returns the current value of KR1. \r
3547 This function is only available on Itanium processors.\r
3548\r
3549 @return The current value of KR1.\r
3550\r
3551**/\r
3552UINT64\r
3553EFIAPI\r
3554AsmReadKr1 (\r
3555 VOID\r
3556 );\r
3557\r
3558\r
3559/**\r
3560 Reads the current value of 64-bit Kernel Register #2 (KR2).\r
3561\r
3562 Reads and returns the current value of KR2. \r
3563 This function is only available on Itanium processors.\r
3564\r
3565 @return The current value of KR2.\r
3566\r
3567**/\r
3568UINT64\r
3569EFIAPI\r
3570AsmReadKr2 (\r
3571 VOID\r
3572 );\r
3573\r
3574\r
3575/**\r
3576 Reads the current value of 64-bit Kernel Register #3 (KR3).\r
3577\r
3578 Reads and returns the current value of KR3. \r
3579 This function is only available on Itanium processors.\r
3580\r
3581 @return The current value of KR3.\r
3582\r
3583**/\r
3584UINT64\r
3585EFIAPI\r
3586AsmReadKr3 (\r
3587 VOID\r
3588 );\r
3589\r
3590\r
3591/**\r
3592 Reads the current value of 64-bit Kernel Register #4 (KR4).\r
3593\r
3594 Reads and returns the current value of KR4. \r
3595 This function is only available on Itanium processors.\r
3596 \r
3597 @return The current value of KR4.\r
3598\r
3599**/\r
3600UINT64\r
3601EFIAPI\r
3602AsmReadKr4 (\r
3603 VOID\r
3604 );\r
3605\r
3606\r
3607/**\r
3608 Reads the current value of 64-bit Kernel Register #5 (KR5).\r
3609\r
3610 Reads and returns the current value of KR5. \r
3611 This function is only available on Itanium processors.\r
3612\r
3613 @return The current value of KR5.\r
3614\r
3615**/\r
3616UINT64\r
3617EFIAPI\r
3618AsmReadKr5 (\r
3619 VOID\r
3620 );\r
3621\r
3622\r
3623/**\r
3624 Reads the current value of 64-bit Kernel Register #6 (KR6).\r
3625\r
3626 Reads and returns the current value of KR6. \r
3627 This function is only available on Itanium processors.\r
3628\r
3629 @return The current value of KR6.\r
3630\r
3631**/\r
3632UINT64\r
3633EFIAPI\r
3634AsmReadKr6 (\r
3635 VOID\r
3636 );\r
3637\r
3638\r
3639/**\r
3640 Reads the current value of 64-bit Kernel Register #7 (KR7).\r
3641\r
3642 Reads and returns the current value of KR7. \r
3643 This function is only available on Itanium processors.\r
3644\r
3645 @return The current value of KR7.\r
3646\r
3647**/\r
3648UINT64\r
3649EFIAPI\r
3650AsmReadKr7 (\r
3651 VOID\r
3652 );\r
3653\r
3654\r
3655/**\r
3656 Write the current value of 64-bit Kernel Register #0 (KR0).\r
3657 \r
3658 Writes the current value of KR0. The 64-bit value written to \r
3659 the KR0 is returned. This function is only available on Itanium processors.\r
3660\r
3661 @param Value The 64-bit value to write to KR0.\r
3662\r
3663 @return The 64-bit value written to the KR0.\r
3664\r
3665**/\r
3666UINT64\r
3667EFIAPI\r
3668AsmWriteKr0 (\r
3669 IN UINT64 Value\r
3670 );\r
3671\r
3672\r
3673/**\r
3674 Write the current value of 64-bit Kernel Register #1 (KR1).\r
3675\r
3676 Writes the current value of KR1. The 64-bit value written to \r
3677 the KR1 is returned. This function is only available on Itanium processors.\r
3678\r
3679 @param Value The 64-bit value to write to KR1.\r
3680\r
3681 @return The 64-bit value written to the KR1.\r
3682\r
3683**/\r
3684UINT64\r
3685EFIAPI\r
3686AsmWriteKr1 (\r
3687 IN UINT64 Value\r
3688 );\r
3689\r
3690\r
3691/**\r
3692 Write the current value of 64-bit Kernel Register #2 (KR2).\r
3693\r
3694 Writes the current value of KR2. The 64-bit value written to \r
3695 the KR2 is returned. This function is only available on Itanium processors.\r
3696\r
3697 @param Value The 64-bit value to write to KR2.\r
3698\r
3699 @return The 64-bit value written to the KR2.\r
3700\r
3701**/\r
3702UINT64\r
3703EFIAPI\r
3704AsmWriteKr2 (\r
3705 IN UINT64 Value\r
3706 );\r
3707\r
3708\r
3709/**\r
3710 Write the current value of 64-bit Kernel Register #3 (KR3).\r
3711\r
3712 Writes the current value of KR3. The 64-bit value written to \r
3713 the KR3 is returned. This function is only available on Itanium processors.\r
3714\r
3715 @param Value The 64-bit value to write to KR3.\r
3716\r
3717 @return The 64-bit value written to the KR3.\r
3718\r
3719**/\r
3720UINT64\r
3721EFIAPI\r
3722AsmWriteKr3 (\r
3723 IN UINT64 Value\r
3724 );\r
3725\r
3726\r
3727/**\r
3728 Write the current value of 64-bit Kernel Register #4 (KR4).\r
3729\r
3730 Writes the current value of KR4. The 64-bit value written to \r
3731 the KR4 is returned. This function is only available on Itanium processors.\r
3732\r
3733 @param Value The 64-bit value to write to KR4.\r
3734\r
3735 @return The 64-bit value written to the KR4.\r
3736\r
3737**/\r
3738UINT64\r
3739EFIAPI\r
3740AsmWriteKr4 (\r
3741 IN UINT64 Value\r
3742 );\r
3743\r
3744\r
3745/**\r
3746 Write the current value of 64-bit Kernel Register #5 (KR5).\r
3747\r
3748 Writes the current value of KR5. The 64-bit value written to \r
3749 the KR5 is returned. This function is only available on Itanium processors.\r
3750\r
3751 @param Value The 64-bit value to write to KR5.\r
3752\r
3753 @return The 64-bit value written to the KR5.\r
3754\r
3755**/\r
3756UINT64\r
3757EFIAPI\r
3758AsmWriteKr5 (\r
3759 IN UINT64 Value\r
3760 );\r
3761\r
3762\r
3763/**\r
3764 Write the current value of 64-bit Kernel Register #6 (KR6).\r
3765\r
3766 Writes the current value of KR6. The 64-bit value written to \r
3767 the KR6 is returned. This function is only available on Itanium processors.\r
3768\r
3769 @param Value The 64-bit value to write to KR6.\r
3770\r
3771 @return The 64-bit value written to the KR6.\r
3772\r
3773**/\r
3774UINT64\r
3775EFIAPI\r
3776AsmWriteKr6 (\r
3777 IN UINT64 Value\r
3778 );\r
3779\r
3780\r
3781/**\r
3782 Write the current value of 64-bit Kernel Register #7 (KR7).\r
3783\r
3784 Writes the current value of KR7. The 64-bit value written to \r
3785 the KR7 is returned. This function is only available on Itanium processors.\r
3786\r
3787 @param Value The 64-bit value to write to KR7.\r
3788\r
3789 @return The 64-bit value written to the KR7.\r
3790\r
3791**/\r
3792UINT64\r
3793EFIAPI\r
3794AsmWriteKr7 (\r
3795 IN UINT64 Value\r
3796 );\r
3797\r
3798\r
3799/**\r
3800 Reads the current value of Interval Timer Counter Register (ITC).\r
3801 \r
3802 Reads and returns the current value of ITC.\r
3803 This function is only available on Itanium processors.\r
3804\r
3805 @return The current value of ITC.\r
3806\r
3807**/\r
3808UINT64\r
3809EFIAPI\r
3810AsmReadItc (\r
3811 VOID\r
3812 );\r
3813\r
3814\r
3815/**\r
3816 Reads the current value of Interval Timer Vector Register (ITV).\r
3817 \r
3818 Reads and returns the current value of ITV. \r
3819 This function is only available on Itanium processors.\r
3820\r
3821 @return The current value of ITV.\r
3822\r
3823**/\r
3824UINT64\r
3825EFIAPI\r
3826AsmReadItv (\r
3827 VOID\r
3828 );\r
3829\r
3830\r
3831/**\r
3832 Reads the current value of Interval Timer Match Register (ITM).\r
3833 \r
3834 Reads and returns the current value of ITM.\r
3835 This function is only available on Itanium processors.\r
3836\r
3837 @return The current value of ITM.\r
3838**/\r
3839UINT64\r
3840EFIAPI\r
3841AsmReadItm (\r
3842 VOID\r
3843 );\r
3844\r
3845\r
3846/**\r
3847 Writes the current value of 64-bit Interval Timer Counter Register (ITC).\r
3848 \r
3849 Writes the current value of ITC. The 64-bit value written to the ITC is returned. \r
3850 This function is only available on Itanium processors.\r
3851\r
3852 @param Value The 64-bit value to write to ITC.\r
3853\r
3854 @return The 64-bit value written to the ITC.\r
3855\r
3856**/\r
3857UINT64\r
3858EFIAPI\r
3859AsmWriteItc (\r
3860 IN UINT64 Value\r
3861 );\r
3862\r
3863\r
3864/**\r
3865 Writes the current value of 64-bit Interval Timer Match Register (ITM).\r
3866 \r
3867 Writes the current value of ITM. The 64-bit value written to the ITM is returned. \r
3868 This function is only available on Itanium processors.\r
3869\r
3870 @param Value The 64-bit value to write to ITM.\r
3871\r
3872 @return The 64-bit value written to the ITM.\r
3873\r
3874**/\r
3875UINT64\r
3876EFIAPI\r
3877AsmWriteItm (\r
3878 IN UINT64 Value\r
3879 );\r
3880\r
3881\r
3882/**\r
3883 Writes the current value of 64-bit Interval Timer Vector Register (ITV).\r
3884 \r
3885 Writes the current value of ITV. The 64-bit value written to the ITV is returned. \r
3886 No parameter checking is performed on Value. All bits of Value corresponding to\r
3887 reserved fields of ITV must be 0 or a Reserved Register/Field fault may occur.\r
3888 The caller must either guarantee that Value is valid, or the caller must set up\r
3889 fault handlers to catch the faults.\r
3890 This function is only available on Itanium processors.\r
3891\r
3892 @param Value The 64-bit value to write to ITV.\r
3893\r
3894 @return The 64-bit value written to the ITV.\r
3895\r
3896**/\r
3897UINT64\r
3898EFIAPI\r
3899AsmWriteItv (\r
3900 IN UINT64 Value\r
3901 );\r
3902\r
3903\r
3904/**\r
3905 Reads the current value of Default Control Register (DCR).\r
3906 \r
3907 Reads and returns the current value of DCR. This function is only available on Itanium processors.\r
3908\r
3909 @return The current value of DCR.\r
3910\r
3911**/\r
3912UINT64\r
3913EFIAPI\r
3914AsmReadDcr (\r
3915 VOID\r
3916 );\r
3917\r
3918\r
3919/**\r
3920 Reads the current value of Interruption Vector Address Register (IVA).\r
3921 \r
3922 Reads and returns the current value of IVA. This function is only available on Itanium processors.\r
3923\r
3924 @return The current value of IVA.\r
3925**/\r
3926UINT64\r
3927EFIAPI\r
3928AsmReadIva (\r
3929 VOID\r
3930 );\r
3931\r
3932\r
3933/**\r
3934 Reads the current value of Page Table Address Register (PTA).\r
3935 \r
3936 Reads and returns the current value of PTA. This function is only available on Itanium processors.\r
3937\r
3938 @return The current value of PTA.\r
3939\r
3940**/\r
3941UINT64\r
3942EFIAPI\r
3943AsmReadPta (\r
3944 VOID\r
3945 );\r
3946\r
3947\r
3948/**\r
3949 Writes the current value of 64-bit Default Control Register (DCR).\r
3950 \r
3951 Writes the current value of DCR. The 64-bit value written to the DCR is returned. \r
3952 No parameter checking is performed on Value. All bits of Value corresponding to\r
3953 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
3954 The caller must either guarantee that Value is valid, or the caller must set up\r
3955 fault handlers to catch the faults.\r
3956 This function is only available on Itanium processors.\r
3957\r
3958 @param Value The 64-bit value to write to DCR.\r
3959\r
3960 @return The 64-bit value written to the DCR.\r
3961\r
3962**/\r
3963UINT64\r
3964EFIAPI\r
3965AsmWriteDcr (\r
3966 IN UINT64 Value\r
3967 );\r
3968\r
3969\r
3970/**\r
3971 Writes the current value of 64-bit Interruption Vector Address Register (IVA).\r
3972 \r
3973 Writes the current value of IVA. The 64-bit value written to the IVA is returned. \r
3974 The size of vector table is 32 K bytes and is 32 K bytes aligned\r
3975 the low 15 bits of Value is ignored when written.\r
3976 This function is only available on Itanium processors.\r
3977\r
3978 @param Value The 64-bit value to write to IVA.\r
3979\r
3980 @return The 64-bit value written to the IVA.\r
3981\r
3982**/\r
3983UINT64\r
3984EFIAPI\r
3985AsmWriteIva (\r
3986 IN UINT64 Value\r
3987 );\r
3988\r
3989\r
3990/**\r
3991 Writes the current value of 64-bit Page Table Address Register (PTA).\r
3992 \r
3993 Writes the current value of PTA. The 64-bit value written to the PTA is returned. \r
3994 No parameter checking is performed on Value. All bits of Value corresponding to\r
3995 reserved fields of DCR must be 0 or a Reserved Register/Field fault may occur.\r
3996 The caller must either guarantee that Value is valid, or the caller must set up\r
3997 fault handlers to catch the faults.\r
3998 This function is only available on Itanium processors.\r
3999\r
4000 @param Value The 64-bit value to write to PTA.\r
4001\r
4002 @return The 64-bit value written to the PTA.\r
4003**/\r
4004UINT64\r
4005EFIAPI\r
4006AsmWritePta (\r
4007 IN UINT64 Value\r
4008 );\r
4009\r
4010\r
4011/**\r
4012 Reads the current value of Local Interrupt ID Register (LID).\r
4013 \r
4014 Reads and returns the current value of LID. This function is only available on Itanium processors.\r
4015\r
4016 @return The current value of LID.\r
4017\r
4018**/\r
4019UINT64\r
4020EFIAPI\r
4021AsmReadLid (\r
4022 VOID\r
4023 );\r
4024\r
4025\r
4026/**\r
4027 Reads the current value of External Interrupt Vector Register (IVR).\r
4028 \r
4029 Reads and returns the current value of IVR. This function is only available on Itanium processors. \r
4030\r
4031 @return The current value of IVR.\r
4032\r
4033**/\r
4034UINT64\r
4035EFIAPI\r
4036AsmReadIvr (\r
4037 VOID\r
4038 );\r
4039\r
4040\r
4041/**\r
4042 Reads the current value of Task Priority Register (TPR).\r
4043 \r
4044 Reads and returns the current value of TPR. This function is only available on Itanium processors. \r
4045\r
4046 @return The current value of TPR.\r
4047\r
4048**/\r
4049UINT64\r
4050EFIAPI\r
4051AsmReadTpr (\r
4052 VOID\r
4053 );\r
4054\r
4055\r
4056/**\r
4057 Reads the current value of External Interrupt Request Register #0 (IRR0).\r
4058 \r
4059 Reads and returns the current value of IRR0. This function is only available on Itanium processors. \r
4060\r
4061 @return The current value of IRR0.\r
4062\r
4063**/\r
4064UINT64\r
4065EFIAPI\r
4066AsmReadIrr0 (\r
4067 VOID\r
4068 );\r
4069\r
4070\r
4071/**\r
4072 Reads the current value of External Interrupt Request Register #1 (IRR1).\r
4073 \r
4074 Reads and returns the current value of IRR1. This function is only available on Itanium processors. \r
4075\r
4076 @return The current value of IRR1.\r
4077\r
4078**/\r
4079UINT64\r
4080EFIAPI\r
4081AsmReadIrr1 (\r
4082 VOID\r
4083 );\r
4084\r
4085\r
4086/**\r
4087 Reads the current value of External Interrupt Request Register #2 (IRR2).\r
4088 \r
4089 Reads and returns the current value of IRR2. This function is only available on Itanium processors.\r
4090\r
4091 @return The current value of IRR2.\r
4092\r
4093**/\r
4094UINT64\r
4095EFIAPI\r
4096AsmReadIrr2 (\r
4097 VOID\r
4098 );\r
4099\r
4100\r
4101/**\r
4102 Reads the current value of External Interrupt Request Register #3 (IRR3).\r
4103 \r
4104 Reads and returns the current value of IRR3. This function is only available on Itanium processors. \r
4105\r
4106 @return The current value of IRR3.\r
4107\r
4108**/\r
4109UINT64\r
4110EFIAPI\r
4111AsmReadIrr3 (\r
4112 VOID\r
4113 );\r
4114\r
4115\r
4116/**\r
4117 Reads the current value of Performance Monitor Vector Register (PMV).\r
4118 \r
4119 Reads and returns the current value of PMV. This function is only available on Itanium processors. \r
4120\r
4121 @return The current value of PMV.\r
4122\r
4123**/\r
4124UINT64\r
4125EFIAPI\r
4126AsmReadPmv (\r
4127 VOID\r
4128 );\r
4129\r
4130\r
4131/**\r
4132 Reads the current value of Corrected Machine Check Vector Register (CMCV).\r
4133 \r
4134 Reads and returns the current value of CMCV. This function is only available on Itanium processors.\r
4135\r
4136 @return The current value of CMCV.\r
4137\r
4138**/\r
4139UINT64\r
4140EFIAPI\r
4141AsmReadCmcv (\r
4142 VOID\r
4143 );\r
4144\r
4145\r
4146/**\r
4147 Reads the current value of Local Redirection Register #0 (LRR0).\r
4148 \r
4149 Reads and returns the current value of LRR0. This function is only available on Itanium processors. \r
4150\r
4151 @return The current value of LRR0.\r
4152\r
4153**/\r
4154UINT64\r
4155EFIAPI\r
4156AsmReadLrr0 (\r
4157 VOID\r
4158 );\r
4159\r
4160\r
4161/**\r
4162 Reads the current value of Local Redirection Register #1 (LRR1).\r
4163 \r
4164 Reads and returns the current value of LRR1. This function is only available on Itanium processors.\r
4165\r
4166 @return The current value of LRR1.\r
4167\r
4168**/\r
4169UINT64\r
4170EFIAPI\r
4171AsmReadLrr1 (\r
4172 VOID\r
4173 );\r
4174\r
4175\r
4176/**\r
4177 Writes the current value of 64-bit Page Local Interrupt ID Register (LID).\r
4178 \r
4179 Writes the current value of LID. The 64-bit value written to the LID is returned. \r
4180 No parameter checking is performed on Value. All bits of Value corresponding to\r
4181 reserved fields of LID must be 0 or a Reserved Register/Field fault may occur.\r
4182 The caller must either guarantee that Value is valid, or the caller must set up\r
4183 fault handlers to catch the faults.\r
4184 This function is only available on Itanium processors.\r
4185\r
4186 @param Value The 64-bit value to write to LID.\r
4187\r
4188 @return The 64-bit value written to the LID.\r
4189\r
4190**/\r
4191UINT64\r
4192EFIAPI\r
4193AsmWriteLid (\r
4194 IN UINT64 Value\r
4195 );\r
4196\r
4197\r
4198/**\r
4199 Writes the current value of 64-bit Task Priority Register (TPR).\r
4200 \r
4201 Writes the current value of TPR. The 64-bit value written to the TPR is returned. \r
4202 No parameter checking is performed on Value. All bits of Value corresponding to\r
4203 reserved fields of TPR must be 0 or a Reserved Register/Field fault may occur.\r
4204 The caller must either guarantee that Value is valid, or the caller must set up\r
4205 fault handlers to catch the faults.\r
4206 This function is only available on Itanium processors.\r
4207\r
4208 @param Value The 64-bit value to write to TPR.\r
4209\r
4210 @return The 64-bit value written to the TPR.\r
4211\r
4212**/\r
4213UINT64\r
4214EFIAPI\r
4215AsmWriteTpr (\r
4216 IN UINT64 Value\r
4217 );\r
4218\r
4219\r
4220/**\r
4221 Performs a write operation on End OF External Interrupt Register (EOI).\r
4222 \r
4223 Writes a value of 0 to the EOI Register. This function is only available on Itanium processors.\r
4224\r
4225**/\r
4226VOID\r
4227EFIAPI\r
4228AsmWriteEoi (\r
4229 VOID\r
4230 );\r
4231\r
4232\r
4233/**\r
4234 Writes the current value of 64-bit Performance Monitor Vector Register (PMV).\r
4235 \r
4236 Writes the current value of PMV. The 64-bit value written to the PMV is returned. \r
4237 No parameter checking is performed on Value. All bits of Value corresponding\r
4238 to reserved fields of PMV must be 0 or a Reserved Register/Field fault may occur.\r
4239 The caller must either guarantee that Value is valid, or the caller must set up\r
4240 fault handlers to catch the faults.\r
4241 This function is only available on Itanium processors.\r
4242\r
4243 @param Value The 64-bit value to write to PMV.\r
4244\r
4245 @return The 64-bit value written to the PMV.\r
4246\r
4247**/\r
4248UINT64\r
4249EFIAPI\r
4250AsmWritePmv (\r
4251 IN UINT64 Value\r
4252 );\r
4253\r
4254\r
4255/**\r
4256 Writes the current value of 64-bit Corrected Machine Check Vector Register (CMCV).\r
4257 \r
4258 Writes the current value of CMCV. The 64-bit value written to the CMCV is returned. \r
4259 No parameter checking is performed on Value. All bits of Value corresponding\r
4260 to reserved fields of CMCV must be 0 or a Reserved Register/Field fault may occur.\r
4261 The caller must either guarantee that Value is valid, or the caller must set up\r
4262 fault handlers to catch the faults.\r
4263 This function is only available on Itanium processors.\r
4264\r
4265 @param Value The 64-bit value to write to CMCV.\r
4266\r
4267 @return The 64-bit value written to the CMCV.\r
4268\r
4269**/\r
4270UINT64\r
4271EFIAPI\r
4272AsmWriteCmcv (\r
4273 IN UINT64 Value\r
4274 );\r
4275\r
4276\r
4277/**\r
4278 Writes the current value of 64-bit Local Redirection Register #0 (LRR0).\r
4279 \r
4280 Writes the current value of LRR0. The 64-bit value written to the LRR0 is returned. \r
4281 No parameter checking is performed on Value. All bits of Value corresponding\r
4282 to reserved fields of LRR0 must be 0 or a Reserved Register/Field fault may occur.\r
4283 The caller must either guarantee that Value is valid, or the caller must set up\r
4284 fault handlers to catch the faults.\r
4285 This function is only available on Itanium processors.\r
4286\r
4287 @param Value The 64-bit value to write to LRR0.\r
4288\r
4289 @return The 64-bit value written to the LRR0.\r
4290\r
4291**/\r
4292UINT64\r
4293EFIAPI\r
4294AsmWriteLrr0 (\r
4295 IN UINT64 Value\r
4296 );\r
4297\r
4298\r
4299/**\r
4300 Writes the current value of 64-bit Local Redirection Register #1 (LRR1).\r
4301 \r
4302 Writes the current value of LRR1. The 64-bit value written to the LRR1 is returned. \r
4303 No parameter checking is performed on Value. All bits of Value corresponding\r
4304 to reserved fields of LRR1 must be 0 or a Reserved Register/Field fault may occur.\r
4305 The caller must either guarantee that Value is valid, or the caller must\r
4306 set up fault handlers to catch the faults.\r
4307 This function is only available on Itanium processors.\r
4308\r
4309 @param Value The 64-bit value to write to LRR1.\r
4310\r
4311 @return The 64-bit value written to the LRR1.\r
4312\r
4313**/\r
4314UINT64\r
4315EFIAPI\r
4316AsmWriteLrr1 (\r
4317 IN UINT64 Value\r
4318 );\r
4319\r
4320\r
4321/**\r
4322 Reads the current value of Instruction Breakpoint Register (IBR).\r
4323 \r
4324 The Instruction Breakpoint Registers are used in pairs. The even numbered\r
4325 registers contain breakpoint addresses, and the odd numbered registers contain\r
4326 breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r
4327 on all processor models. Implemented registers are contiguous starting with\r
4328 register 0. No parameter checking is performed on Index, and if the Index value\r
4329 is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
4330 occur. The caller must either guarantee that Index is valid, or the caller must\r
4331 set up fault handlers to catch the faults.\r
4332 This function is only available on Itanium processors.\r
4333\r
4334 @param Index The 8-bit Instruction Breakpoint Register index to read.\r
4335\r
4336 @return The current value of Instruction Breakpoint Register specified by Index.\r
4337\r
4338**/\r
4339UINT64\r
4340EFIAPI\r
4341AsmReadIbr (\r
4342 IN UINT8 Index\r
4343 );\r
4344\r
4345\r
4346/**\r
4347 Reads the current value of Data Breakpoint Register (DBR).\r
4348\r
4349 The Data Breakpoint Registers are used in pairs. The even numbered registers\r
4350 contain breakpoint addresses, and odd numbered registers contain breakpoint\r
4351 mask conditions. At least 4 data registers pairs are implemented on all processor\r
4352 models. Implemented registers are contiguous starting with register 0.\r
4353 No parameter checking is performed on Index. If the Index value is beyond\r
4354 the implemented DBR register range, a Reserved Register/Field fault may occur.\r
4355 The caller must either guarantee that Index is valid, or the caller must set up\r
4356 fault handlers to catch the faults.\r
4357 This function is only available on Itanium processors.\r
4358\r
4359 @param Index The 8-bit Data Breakpoint Register index to read.\r
4360\r
4361 @return The current value of Data Breakpoint Register specified by Index.\r
4362\r
4363**/\r
4364UINT64\r
4365EFIAPI\r
4366AsmReadDbr (\r
4367 IN UINT8 Index\r
4368 );\r
4369\r
4370\r
4371/**\r
4372 Reads the current value of Performance Monitor Configuration Register (PMC).\r
4373\r
4374 All processor implementations provide at least 4 performance counters\r
4375 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
4376 status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
4377 additional implementation-dependent PMC and PMD to increase the number of\r
4378 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
4379 register set is implementation dependent. No parameter checking is performed\r
4380 on Index. If the Index value is beyond the implemented PMC register range,\r
4381 zero value will be returned.\r
4382 This function is only available on Itanium processors.\r
4383\r
4384 @param Index The 8-bit Performance Monitor Configuration Register index to read.\r
4385\r
4386 @return The current value of Performance Monitor Configuration Register\r
4387 specified by Index.\r
4388\r
4389**/\r
4390UINT64\r
4391EFIAPI\r
4392AsmReadPmc (\r
4393 IN UINT8 Index\r
4394 );\r
4395\r
4396\r
4397/**\r
4398 Reads the current value of Performance Monitor Data Register (PMD).\r
4399\r
4400 All processor implementations provide at least 4 performance counters\r
4401 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter\r
4402 overflow status registers (PMC [0]... PMC [3]). Processor implementations may\r
4403 provide additional implementation-dependent PMC and PMD to increase the number\r
4404 of 'generic' performance counters (PMC/PMD pairs). The remainder of PMC and PMD\r
4405 register set is implementation dependent. No parameter checking is performed\r
4406 on Index. If the Index value is beyond the implemented PMD register range,\r
4407 zero value will be returned.\r
4408 This function is only available on Itanium processors.\r
4409\r
4410 @param Index The 8-bit Performance Monitor Data Register index to read.\r
4411\r
4412 @return The current value of Performance Monitor Data Register specified by Index.\r
4413\r
4414**/\r
4415UINT64\r
4416EFIAPI\r
4417AsmReadPmd (\r
4418 IN UINT8 Index\r
4419 );\r
4420\r
4421\r
4422/**\r
4423 Writes the current value of 64-bit Instruction Breakpoint Register (IBR).\r
4424\r
4425 Writes current value of Instruction Breakpoint Register specified by Index.\r
4426 The Instruction Breakpoint Registers are used in pairs. The even numbered\r
4427 registers contain breakpoint addresses, and odd numbered registers contain\r
4428 breakpoint mask conditions. At least 4 instruction registers pairs are implemented\r
4429 on all processor models. Implemented registers are contiguous starting with\r
4430 register 0. No parameter checking is performed on Index. If the Index value\r
4431 is beyond the implemented IBR register range, a Reserved Register/Field fault may\r
4432 occur. The caller must either guarantee that Index is valid, or the caller must\r
4433 set up fault handlers to catch the faults.\r
4434 This function is only available on Itanium processors.\r
4435\r
4436 @param Index The 8-bit Instruction Breakpoint Register index to write.\r
4437 @param Value The 64-bit value to write to IBR.\r
4438\r
4439 @return The 64-bit value written to the IBR.\r
4440\r
4441**/\r
4442UINT64\r
4443EFIAPI\r
4444AsmWriteIbr (\r
4445 IN UINT8 Index,\r
4446 IN UINT64 Value\r
4447 );\r
4448\r
4449\r
4450/**\r
4451 Writes the current value of 64-bit Data Breakpoint Register (DBR).\r
4452\r
4453 Writes current value of Data Breakpoint Register specified by Index.\r
4454 The Data Breakpoint Registers are used in pairs. The even numbered registers\r
4455 contain breakpoint addresses, and odd numbered registers contain breakpoint\r
4456 mask conditions. At least 4 data registers pairs are implemented on all processor\r
4457 models. Implemented registers are contiguous starting with register 0. No parameter\r
4458 checking is performed on Index. If the Index value is beyond the implemented\r
4459 DBR register range, a Reserved Register/Field fault may occur. The caller must\r
4460 either guarantee that Index is valid, or the caller must set up fault handlers to\r
4461 catch the faults.\r
4462 This function is only available on Itanium processors.\r
4463\r
4464 @param Index The 8-bit Data Breakpoint Register index to write.\r
4465 @param Value The 64-bit value to write to DBR.\r
4466\r
4467 @return The 64-bit value written to the DBR.\r
4468\r
4469**/\r
4470UINT64\r
4471EFIAPI\r
4472AsmWriteDbr (\r
4473 IN UINT8 Index,\r
4474 IN UINT64 Value\r
4475 );\r
4476\r
4477\r
4478/**\r
4479 Writes the current value of 64-bit Performance Monitor Configuration Register (PMC).\r
4480\r
4481 Writes current value of Performance Monitor Configuration Register specified by Index.\r
4482 All processor implementations provide at least 4 performance counters\r
4483 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow status\r
4484 registers (PMC [0]... PMC [3]). Processor implementations may provide additional\r
4485 implementation-dependent PMC and PMD to increase the number of 'generic' performance\r
4486 counters (PMC/PMD pairs). The remainder of PMC and PMD register set is implementation\r
4487 dependent. No parameter checking is performed on Index. If the Index value is\r
4488 beyond the implemented PMC register range, the write is ignored.\r
4489 This function is only available on Itanium processors.\r
4490\r
4491 @param Index The 8-bit Performance Monitor Configuration Register index to write.\r
4492 @param Value The 64-bit value to write to PMC.\r
4493\r
4494 @return The 64-bit value written to the PMC.\r
4495\r
4496**/\r
4497UINT64\r
4498EFIAPI\r
4499AsmWritePmc (\r
4500 IN UINT8 Index,\r
4501 IN UINT64 Value\r
4502 );\r
4503\r
4504\r
4505/**\r
4506 Writes the current value of 64-bit Performance Monitor Data Register (PMD).\r
4507\r
4508 Writes current value of Performance Monitor Data Register specified by Index.\r
4509 All processor implementations provide at least 4 performance counters\r
4510 (PMC/PMD [4]...PMC/PMD [7] pairs), and 4 performance monitor counter overflow\r
4511 status registers (PMC [0]... PMC [3]). Processor implementations may provide\r
4512 additional implementation-dependent PMC and PMD to increase the number of 'generic'\r
4513 performance counters (PMC/PMD pairs). The remainder of PMC and PMD register set\r
4514 is implementation dependent. No parameter checking is performed on Index. If the\r
4515 Index value is beyond the implemented PMD register range, the write is ignored.\r
4516 This function is only available on Itanium processors.\r
4517\r
4518 @param Index The 8-bit Performance Monitor Data Register index to write.\r
4519 @param Value The 64-bit value to write to PMD.\r
4520\r
4521 @return The 64-bit value written to the PMD.\r
4522\r
4523**/\r
4524UINT64\r
4525EFIAPI\r
4526AsmWritePmd (\r
4527 IN UINT8 Index,\r
4528 IN UINT64 Value\r
4529 );\r
4530\r
4531\r
4532/**\r
4533 Reads the current value of 64-bit Global Pointer (GP).\r
4534\r
4535 Reads and returns the current value of GP.\r
4536 This function is only available on Itanium processors.\r
4537\r
4538 @return The current value of GP.\r
4539\r
4540**/\r
4541UINT64\r
4542EFIAPI\r
4543AsmReadGp (\r
4544 VOID\r
4545 );\r
4546\r
4547\r
4548/**\r
4549 Write the current value of 64-bit Global Pointer (GP).\r
4550\r
4551 Writes the current value of GP. The 64-bit value written to the GP is returned.\r
4552 No parameter checking is performed on Value.\r
4553 This function is only available on Itanium processors.\r
4554\r
4555 @param Value The 64-bit value to write to GP.\r
4556\r
4557 @return The 64-bit value written to the GP.\r
4558\r
4559**/\r
4560UINT64\r
4561EFIAPI\r
4562AsmWriteGp (\r
4563 IN UINT64 Value\r
4564 );\r
4565\r
4566\r
4567/**\r
4568 Reads the current value of 64-bit Stack Pointer (SP).\r
4569\r
4570 Reads and returns the current value of SP.\r
4571 This function is only available on Itanium processors.\r
4572\r
4573 @return The current value of SP.\r
4574\r
4575**/\r
4576UINT64\r
4577EFIAPI\r
4578AsmReadSp (\r
4579 VOID\r
4580 );\r
4581\r
4582\r
4583///\r
4584/// Valid Index value for AsmReadControlRegister()\r
4585///\r
4586#define IPF_CONTROL_REGISTER_DCR 0\r
4587#define IPF_CONTROL_REGISTER_ITM 1\r
4588#define IPF_CONTROL_REGISTER_IVA 2\r
4589#define IPF_CONTROL_REGISTER_PTA 8\r
4590#define IPF_CONTROL_REGISTER_IPSR 16\r
4591#define IPF_CONTROL_REGISTER_ISR 17\r
4592#define IPF_CONTROL_REGISTER_IIP 19\r
4593#define IPF_CONTROL_REGISTER_IFA 20\r
4594#define IPF_CONTROL_REGISTER_ITIR 21\r
4595#define IPF_CONTROL_REGISTER_IIPA 22\r
4596#define IPF_CONTROL_REGISTER_IFS 23\r
4597#define IPF_CONTROL_REGISTER_IIM 24\r
4598#define IPF_CONTROL_REGISTER_IHA 25\r
4599#define IPF_CONTROL_REGISTER_LID 64\r
4600#define IPF_CONTROL_REGISTER_IVR 65\r
4601#define IPF_CONTROL_REGISTER_TPR 66\r
4602#define IPF_CONTROL_REGISTER_EOI 67\r
4603#define IPF_CONTROL_REGISTER_IRR0 68\r
4604#define IPF_CONTROL_REGISTER_IRR1 69\r
4605#define IPF_CONTROL_REGISTER_IRR2 70\r
4606#define IPF_CONTROL_REGISTER_IRR3 71\r
4607#define IPF_CONTROL_REGISTER_ITV 72\r
4608#define IPF_CONTROL_REGISTER_PMV 73\r
4609#define IPF_CONTROL_REGISTER_CMCV 74\r
4610#define IPF_CONTROL_REGISTER_LRR0 80\r
4611#define IPF_CONTROL_REGISTER_LRR1 81\r
4612\r
4613/**\r
4614 Reads a 64-bit control register.\r
4615\r
4616 Reads and returns the control register specified by Index. The valid Index valued are defined\r
4617 above in "Related Definitions".\r
4618 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.\r
4619\r
4620 @param Index The index of the control register to read.\r
4621\r
4622 @return The control register specified by Index.\r
4623\r
4624**/\r
4625UINT64\r
4626EFIAPI\r
4627AsmReadControlRegister (\r
4628 IN UINT64 Index\r
4629 );\r
4630\r
4631\r
4632///\r
4633/// Valid Index value for AsmReadApplicationRegister()\r
4634///\r
4635#define IPF_APPLICATION_REGISTER_K0 0\r
4636#define IPF_APPLICATION_REGISTER_K1 1\r
4637#define IPF_APPLICATION_REGISTER_K2 2\r
4638#define IPF_APPLICATION_REGISTER_K3 3\r
4639#define IPF_APPLICATION_REGISTER_K4 4\r
4640#define IPF_APPLICATION_REGISTER_K5 5\r
4641#define IPF_APPLICATION_REGISTER_K6 6\r
4642#define IPF_APPLICATION_REGISTER_K7 7\r
4643#define IPF_APPLICATION_REGISTER_RSC 16\r
4644#define IPF_APPLICATION_REGISTER_BSP 17\r
4645#define IPF_APPLICATION_REGISTER_BSPSTORE 18\r
4646#define IPF_APPLICATION_REGISTER_RNAT 19\r
4647#define IPF_APPLICATION_REGISTER_FCR 21\r
4648#define IPF_APPLICATION_REGISTER_EFLAG 24\r
4649#define IPF_APPLICATION_REGISTER_CSD 25\r
4650#define IPF_APPLICATION_REGISTER_SSD 26\r
4651#define IPF_APPLICATION_REGISTER_CFLG 27\r
4652#define IPF_APPLICATION_REGISTER_FSR 28\r
4653#define IPF_APPLICATION_REGISTER_FIR 29\r
4654#define IPF_APPLICATION_REGISTER_FDR 30\r
4655#define IPF_APPLICATION_REGISTER_CCV 32\r
4656#define IPF_APPLICATION_REGISTER_UNAT 36\r
4657#define IPF_APPLICATION_REGISTER_FPSR 40\r
4658#define IPF_APPLICATION_REGISTER_ITC 44\r
4659#define IPF_APPLICATION_REGISTER_PFS 64\r
4660#define IPF_APPLICATION_REGISTER_LC 65\r
4661#define IPF_APPLICATION_REGISTER_EC 66\r
4662\r
4663/**\r
4664 Reads a 64-bit application register.\r
4665\r
4666 Reads and returns the application register specified by Index. The valid Index valued are defined\r
4667 above in "Related Definitions".\r
4668 If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned. This function is only available on Itanium processors.\r
4669\r
4670 @param Index The index of the application register to read.\r
4671\r
4672 @return The application register specified by Index.\r
4673\r
4674**/\r
4675UINT64\r
4676EFIAPI\r
4677AsmReadApplicationRegister (\r
4678 IN UINT64 Index\r
4679 );\r
4680\r
4681\r
4682/**\r
4683 Reads the current value of a Machine Specific Register (MSR).\r
4684\r
4685 Reads and returns the current value of the Machine Specific Register specified by Index. No\r
4686 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r
4687 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r
4688 Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r
4689 only available on Itanium processors.\r
4690\r
4691 @param Index The 8-bit Machine Specific Register index to read.\r
4692\r
4693 @return The current value of the Machine Specific Register specified by Index. \r
4694\r
4695**/\r
4696UINT64\r
4697EFIAPI\r
4698AsmReadMsr (\r
4699 IN UINT8 Index \r
4700 );\r
4701\r
4702\r
4703/**\r
4704 Writes the current value of a Machine Specific Register (MSR).\r
4705\r
4706 Writes Value to the Machine Specific Register specified by Index. Value is returned. No\r
4707 parameter checking is performed on Index, and if the Index value is beyond the implemented MSR\r
4708 register range, a Reserved Register/Field fault may occur. The caller must either guarantee that\r
4709 Index is valid, or the caller must set up fault handlers to catch the faults. This function is\r
4710 only available on Itanium processors.\r
4711\r
4712 @param Index The 8-bit Machine Specific Register index to write.\r
4713 @param Value The 64-bit value to write to the Machine Specific Register.\r
4714\r
4715 @return The 64-bit value to write to the Machine Specific Register. \r
4716\r
4717**/\r
4718UINT64\r
4719EFIAPI\r
4720AsmWriteMsr (\r
4721 IN UINT8 Index, \r
4722 IN UINT64 Value \r
4723 );\r
4724\r
4725\r
4726/**\r
4727 Determines if the CPU is currently executing in virtual, physical, or mixed mode.\r
4728\r
4729 Determines the current execution mode of the CPU.\r
4730 If the CPU is in virtual mode(PSR.RT=1, PSR.DT=1, PSR.IT=1), then 1 is returned.\r
4731 If the CPU is in physical mode(PSR.RT=0, PSR.DT=0, PSR.IT=0), then 0 is returned.\r
4732 If the CPU is not in physical mode or virtual mode, then it is in mixed mode,\r
4733 and -1 is returned.\r
4734 This function is only available on Itanium processors.\r
4735\r
4736 @retval 1 The CPU is in virtual mode.\r
4737 @retval 0 The CPU is in physical mode.\r
4738 @retval -1 The CPU is in mixed mode.\r
4739\r
4740**/\r
4741INT64\r
4742EFIAPI\r
4743AsmCpuVirtual (\r
4744 VOID\r
4745 );\r
4746\r
4747\r
4748/**\r
4749 Makes a PAL procedure call.\r
4750\r
4751 This is a wrapper function to make a PAL procedure call. Based on the Index\r
4752 value this API will make static or stacked PAL call. The following table\r
4753 describes the usage of PAL Procedure Index Assignment. Architected procedures\r
4754 may be designated as required or optional. If a PAL procedure is specified\r
4755 as optional, a unique return code of 0xFFFFFFFFFFFFFFFF is returned in the\r
4756 Status field of the PAL_CALL_RETURN structure.\r
4757 This indicates that the procedure is not present in this PAL implementation.\r
4758 It is the caller's responsibility to check for this return code after calling\r
4759 any optional PAL procedure.\r
4760 No parameter checking is performed on the 5 input parameters, but there are\r
4761 some common rules that the caller should follow when making a PAL call. Any\r
4762 address passed to PAL as buffers for return parameters must be 8-byte aligned.\r
4763 Unaligned addresses may cause undefined results. For those parameters defined\r
4764 as reserved or some fields defined as reserved must be zero filled or the invalid\r
4765 argument return value may be returned or undefined result may occur during the\r
4766 execution of the procedure. If the PalEntryPoint does not point to a valid\r
4767 PAL entry point then the system behavior is undefined. This function is only\r
4768 available on Itanium processors.\r
4769\r
4770 @param PalEntryPoint The PAL procedure calls entry point.\r
4771 @param Index The PAL procedure Index number.\r
4772 @param Arg2 The 2nd parameter for PAL procedure calls.\r
4773 @param Arg3 The 3rd parameter for PAL procedure calls.\r
4774 @param Arg4 The 4th parameter for PAL procedure calls.\r
4775\r
4776 @return structure returned from the PAL Call procedure, including the status and return value.\r
4777\r
4778**/\r
4779PAL_CALL_RETURN\r
4780EFIAPI\r
4781AsmPalCall (\r
4782 IN UINT64 PalEntryPoint,\r
4783 IN UINT64 Index,\r
4784 IN UINT64 Arg2,\r
4785 IN UINT64 Arg3,\r
4786 IN UINT64 Arg4\r
4787 );\r
4788#endif\r
4789\r
4790#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64)\r
4791///\r
4792/// IA32 and x64 Specific Functions\r
4793/// Byte packed structure for 16-bit Real Mode EFLAGS\r
4794///\r
4795typedef union {\r
4796 struct {\r
4797 UINT32 CF:1; ///< Carry Flag\r
4798 UINT32 Reserved_0:1; ///< Reserved\r
4799 UINT32 PF:1; ///< Parity Flag\r
4800 UINT32 Reserved_1:1; ///< Reserved\r
4801 UINT32 AF:1; ///< Auxiliary Carry Flag\r
4802 UINT32 Reserved_2:1; ///< Reserved\r
4803 UINT32 ZF:1; ///< Zero Flag\r
4804 UINT32 SF:1; ///< Sign Flag\r
4805 UINT32 TF:1; ///< Trap Flag\r
4806 UINT32 IF:1; ///< Interrupt Enable Flag\r
4807 UINT32 DF:1; ///< Direction Flag\r
4808 UINT32 OF:1; ///< Overflow Flag\r
4809 UINT32 IOPL:2; ///< I/O Privilege Level\r
4810 UINT32 NT:1; ///< Nested Task\r
4811 UINT32 Reserved_3:1; ///< Reserved\r
4812 } Bits;\r
4813 UINT16 Uint16;\r
4814} IA32_FLAGS16;\r
4815\r
4816///\r
4817/// Byte packed structure for EFLAGS/RFLAGS\r
4818/// 32-bits on IA-32\r
4819/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
4820///\r
4821typedef union {\r
4822 struct {\r
4823 UINT32 CF:1; ///< Carry Flag\r
4824 UINT32 Reserved_0:1; ///< Reserved\r
4825 UINT32 PF:1; ///< Parity Flag\r
4826 UINT32 Reserved_1:1; ///< Reserved\r
4827 UINT32 AF:1; ///< Auxiliary Carry Flag\r
4828 UINT32 Reserved_2:1; ///< Reserved\r
4829 UINT32 ZF:1; ///< Zero Flag\r
4830 UINT32 SF:1; ///< Sign Flag\r
4831 UINT32 TF:1; ///< Trap Flag\r
4832 UINT32 IF:1; ///< Interrupt Enable Flag\r
4833 UINT32 DF:1; ///< Direction Flag\r
4834 UINT32 OF:1; ///< Overflow Flag\r
4835 UINT32 IOPL:2; ///< I/O Privilege Level\r
4836 UINT32 NT:1; ///< Nested Task\r
4837 UINT32 Reserved_3:1; ///< Reserved\r
4838 UINT32 RF:1; ///< Resume Flag\r
4839 UINT32 VM:1; ///< Virtual 8086 Mode\r
4840 UINT32 AC:1; ///< Alignment Check\r
4841 UINT32 VIF:1; ///< Virtual Interrupt Flag\r
4842 UINT32 VIP:1; ///< Virtual Interrupt Pending\r
4843 UINT32 ID:1; ///< ID Flag\r
4844 UINT32 Reserved_4:10; ///< Reserved\r
4845 } Bits;\r
4846 UINTN UintN;\r
4847} IA32_EFLAGS32;\r
4848\r
4849///\r
4850/// Byte packed structure for Control Register 0 (CR0)\r
4851/// 32-bits on IA-32\r
4852/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
4853///\r
4854typedef union {\r
4855 struct {\r
4856 UINT32 PE:1; ///< Protection Enable\r
4857 UINT32 MP:1; ///< Monitor Coprocessor\r
4858 UINT32 EM:1; ///< Emulation\r
4859 UINT32 TS:1; ///< Task Switched\r
4860 UINT32 ET:1; ///< Extension Type\r
4861 UINT32 NE:1; ///< Numeric Error\r
4862 UINT32 Reserved_0:10; ///< Reserved\r
4863 UINT32 WP:1; ///< Write Protect\r
4864 UINT32 Reserved_1:1; ///< Reserved\r
4865 UINT32 AM:1; ///< Alignment Mask\r
4866 UINT32 Reserved_2:10; ///< Reserved\r
4867 UINT32 NW:1; ///< Mot Write-through\r
4868 UINT32 CD:1; ///< Cache Disable\r
4869 UINT32 PG:1; ///< Paging\r
4870 } Bits;\r
4871 UINTN UintN;\r
4872} IA32_CR0;\r
4873\r
4874///\r
4875/// Byte packed structure for Control Register 4 (CR4)\r
4876/// 32-bits on IA-32\r
4877/// 64-bits on x64. The upper 32-bits on x64 are reserved\r
4878///\r
4879typedef union {\r
4880 struct {\r
4881 UINT32 VME:1; ///< Virtual-8086 Mode Extensions\r
4882 UINT32 PVI:1; ///< Protected-Mode Virtual Interrupts\r
4883 UINT32 TSD:1; ///< Time Stamp Disable\r
4884 UINT32 DE:1; ///< Debugging Extensions\r
4885 UINT32 PSE:1; ///< Page Size Extensions\r
4886 UINT32 PAE:1; ///< Physical Address Extension\r
4887 UINT32 MCE:1; ///< Machine Check Enable\r
4888 UINT32 PGE:1; ///< Page Global Enable\r
4889 UINT32 PCE:1; ///< Performance Monitoring Counter\r
4890 ///< Enable\r
4891 UINT32 OSFXSR:1; ///< Operating System Support for\r
4892 ///< FXSAVE and FXRSTOR instructions\r
4893 UINT32 OSXMMEXCPT:1; ///< Operating System Support for\r
4894 ///< Unmasked SIMD Floating Point\r
4895 ///< Exceptions\r
4896 UINT32 Reserved_0:2; ///< Reserved\r
4897 UINT32 VMXE:1; ///< VMX Enable\r
4898 UINT32 Reserved_1:18; ///< Reserved\r
4899 } Bits;\r
4900 UINTN UintN;\r
4901} IA32_CR4;\r
4902\r
4903///\r
4904/// Byte packed structure for an IDTR, GDTR, LDTR descriptor\r
4905///\r
4906#pragma pack (1)\r
4907typedef struct {\r
4908 UINT16 Limit;\r
4909 UINTN Base;\r
4910} IA32_DESCRIPTOR;\r
4911#pragma pack ()\r
4912\r
4913#define IA32_IDT_GATE_TYPE_TASK 0x85\r
4914#define IA32_IDT_GATE_TYPE_INTERRUPT_16 0x86\r
4915#define IA32_IDT_GATE_TYPE_TRAP_16 0x87\r
4916#define IA32_IDT_GATE_TYPE_INTERRUPT_32 0x8E\r
4917#define IA32_IDT_GATE_TYPE_TRAP_32 0x8F\r
4918\r
4919\r
4920#if defined (MDE_CPU_IA32)\r
4921///\r
4922/// Byte packed structure for an IA-32 Interrupt Gate Descriptor\r
4923///\r
4924typedef union {\r
4925 struct {\r
4926 UINT32 OffsetLow:16; ///< Offset bits 15..0\r
4927 UINT32 Selector:16; ///< Selector\r
4928 UINT32 Reserved_0:8; ///< Reserved\r
4929 UINT32 GateType:8; ///< Gate Type. See #defines above\r
4930 UINT32 OffsetHigh:16; ///< Offset bits 31..16\r
4931 } Bits;\r
4932 UINT64 Uint64;\r
4933} IA32_IDT_GATE_DESCRIPTOR;\r
4934\r
4935#endif\r
4936\r
4937#if defined (MDE_CPU_X64)\r
4938///\r
4939/// Byte packed structure for an x64 Interrupt Gate Descriptor\r
4940///\r
4941typedef union {\r
4942 struct {\r
4943 UINT32 OffsetLow:16; ///< Offset bits 15..0\r
4944 UINT32 Selector:16; ///< Selector\r
4945 UINT32 Reserved_0:8; ///< Reserved\r
4946 UINT32 GateType:8; ///< Gate Type. See #defines above\r
4947 UINT32 OffsetHigh:16; ///< Offset bits 31..16\r
4948 UINT32 OffsetUpper:32; ///< Offset bits 63..32\r
4949 UINT32 Reserved_1:32; ///< Reserved\r
4950 } Bits;\r
4951 struct {\r
4952 UINT64 Uint64;\r
4953 UINT64 Uint64_1;\r
4954 } Uint128; \r
4955} IA32_IDT_GATE_DESCRIPTOR;\r
4956\r
4957#endif\r
4958\r
4959///\r
4960/// Byte packed structure for an FP/SSE/SSE2 context\r
4961///\r
4962typedef struct {\r
4963 UINT8 Buffer[512];\r
4964} IA32_FX_BUFFER;\r
4965\r
4966///\r
4967/// Structures for the 16-bit real mode thunks\r
4968///\r
4969typedef struct {\r
4970 UINT32 Reserved1;\r
4971 UINT32 Reserved2;\r
4972 UINT32 Reserved3;\r
4973 UINT32 Reserved4;\r
4974 UINT8 BL;\r
4975 UINT8 BH;\r
4976 UINT16 Reserved5;\r
4977 UINT8 DL;\r
4978 UINT8 DH;\r
4979 UINT16 Reserved6;\r
4980 UINT8 CL;\r
4981 UINT8 CH;\r
4982 UINT16 Reserved7;\r
4983 UINT8 AL;\r
4984 UINT8 AH;\r
4985 UINT16 Reserved8;\r
4986} IA32_BYTE_REGS;\r
4987\r
4988typedef struct {\r
4989 UINT16 DI;\r
4990 UINT16 Reserved1;\r
4991 UINT16 SI;\r
4992 UINT16 Reserved2;\r
4993 UINT16 BP;\r
4994 UINT16 Reserved3;\r
4995 UINT16 SP;\r
4996 UINT16 Reserved4;\r
4997 UINT16 BX;\r
4998 UINT16 Reserved5;\r
4999 UINT16 DX;\r
5000 UINT16 Reserved6;\r
5001 UINT16 CX;\r
5002 UINT16 Reserved7;\r
5003 UINT16 AX;\r
5004 UINT16 Reserved8;\r
5005} IA32_WORD_REGS;\r
5006\r
5007typedef struct {\r
5008 UINT32 EDI;\r
5009 UINT32 ESI;\r
5010 UINT32 EBP;\r
5011 UINT32 ESP;\r
5012 UINT32 EBX;\r
5013 UINT32 EDX;\r
5014 UINT32 ECX;\r
5015 UINT32 EAX;\r
5016 UINT16 DS;\r
5017 UINT16 ES;\r
5018 UINT16 FS;\r
5019 UINT16 GS;\r
5020 IA32_EFLAGS32 EFLAGS;\r
5021 UINT32 Eip;\r
5022 UINT16 CS;\r
5023 UINT16 SS;\r
5024} IA32_DWORD_REGS;\r
5025\r
5026typedef union {\r
5027 IA32_DWORD_REGS E;\r
5028 IA32_WORD_REGS X;\r
5029 IA32_BYTE_REGS H;\r
5030} IA32_REGISTER_SET;\r
5031\r
5032///\r
5033/// Byte packed structure for an 16-bit real mode thunks\r
5034///\r
5035typedef struct {\r
5036 IA32_REGISTER_SET *RealModeState;\r
5037 VOID *RealModeBuffer;\r
5038 UINT32 RealModeBufferSize;\r
5039 UINT32 ThunkAttributes;\r
5040} THUNK_CONTEXT;\r
5041\r
5042#define THUNK_ATTRIBUTE_BIG_REAL_MODE 0x00000001\r
5043#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 0x00000002\r
5044#define THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL 0x00000004\r
5045\r
5046/**\r
5047 Retrieves CPUID information.\r
5048\r
5049 Executes the CPUID instruction with EAX set to the value specified by Index.\r
5050 This function always returns Index.\r
5051 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
5052 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
5053 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
5054 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
5055 This function is only available on IA-32 and x64.\r
5056\r
5057 @param Index The 32-bit value to load into EAX prior to invoking the CPUID\r
5058 instruction.\r
5059 @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
5060 instruction. This is an optional parameter that may be NULL.\r
5061 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
5062 instruction. This is an optional parameter that may be NULL.\r
5063 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
5064 instruction. This is an optional parameter that may be NULL.\r
5065 @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
5066 instruction. This is an optional parameter that may be NULL.\r
5067\r
5068 @return Index.\r
5069\r
5070**/\r
5071UINT32\r
5072EFIAPI\r
5073AsmCpuid (\r
5074 IN UINT32 Index,\r
5075 OUT UINT32 *Eax, OPTIONAL\r
5076 OUT UINT32 *Ebx, OPTIONAL\r
5077 OUT UINT32 *Ecx, OPTIONAL\r
5078 OUT UINT32 *Edx OPTIONAL\r
5079 );\r
5080\r
5081\r
5082/**\r
5083 Retrieves CPUID information using an extended leaf identifier.\r
5084\r
5085 Executes the CPUID instruction with EAX set to the value specified by Index\r
5086 and ECX set to the value specified by SubIndex. This function always returns\r
5087 Index. This function is only available on IA-32 and x64.\r
5088\r
5089 If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.\r
5090 If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.\r
5091 If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.\r
5092 If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.\r
5093\r
5094 @param Index The 32-bit value to load into EAX prior to invoking the\r
5095 CPUID instruction.\r
5096 @param SubIndex The 32-bit value to load into ECX prior to invoking the\r
5097 CPUID instruction.\r
5098 @param Eax Pointer to the 32-bit EAX value returned by the CPUID\r
5099 instruction. This is an optional parameter that may be\r
5100 NULL.\r
5101 @param Ebx Pointer to the 32-bit EBX value returned by the CPUID\r
5102 instruction. This is an optional parameter that may be\r
5103 NULL.\r
5104 @param Ecx Pointer to the 32-bit ECX value returned by the CPUID\r
5105 instruction. This is an optional parameter that may be\r
5106 NULL.\r
5107 @param Edx Pointer to the 32-bit EDX value returned by the CPUID\r
5108 instruction. This is an optional parameter that may be\r
5109 NULL.\r
5110\r
5111 @return Index.\r
5112\r
5113**/\r
5114UINT32\r
5115EFIAPI\r
5116AsmCpuidEx (\r
5117 IN UINT32 Index,\r
5118 IN UINT32 SubIndex,\r
5119 OUT UINT32 *Eax, OPTIONAL\r
5120 OUT UINT32 *Ebx, OPTIONAL\r
5121 OUT UINT32 *Ecx, OPTIONAL\r
5122 OUT UINT32 *Edx OPTIONAL\r
5123 );\r
5124\r
5125\r
5126/**\r
5127 Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
5128\r
5129 Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
5130 and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r
5131\r
5132**/\r
5133VOID\r
5134EFIAPI\r
5135AsmDisableCache (\r
5136 VOID\r
5137 );\r
5138\r
5139\r
5140/**\r
5141 Perform a WBINVD and clear both the CD and NW bits of CR0.\r
5142\r
5143 Enables the caches by executing a WBINVD instruction and then clear both the CD and NW\r
5144 bits of CR0 to 0. This function is only available on IA-32 and x64.\r
5145\r
5146**/\r
5147VOID\r
5148EFIAPI\r
5149AsmEnableCache (\r
5150 VOID\r
5151 );\r
5152\r
5153\r
5154/**\r
5155 Returns the lower 32-bits of a Machine Specific Register(MSR).\r
5156\r
5157 Reads and returns the lower 32-bits of the MSR specified by Index.\r
5158 No parameter checking is performed on Index, and some Index values may cause\r
5159 CPU exceptions. The caller must either guarantee that Index is valid, or the\r
5160 caller must set up exception handlers to catch the exceptions. This function\r
5161 is only available on IA-32 and x64.\r
5162\r
5163 @param Index The 32-bit MSR index to read.\r
5164\r
5165 @return The lower 32 bits of the MSR identified by Index.\r
5166\r
5167**/\r
5168UINT32\r
5169EFIAPI\r
5170AsmReadMsr32 (\r
5171 IN UINT32 Index\r
5172 );\r
5173\r
5174\r
5175/**\r
5176 Writes a 32-bit value to a Machine Specific Register(MSR), and returns the value.\r
5177 The upper 32-bits of the MSR are set to zero.\r
5178\r
5179 Writes the 32-bit value specified by Value to the MSR specified by Index. The\r
5180 upper 32-bits of the MSR write are set to zero. The 32-bit value written to\r
5181 the MSR is returned. No parameter checking is performed on Index or Value,\r
5182 and some of these may cause CPU exceptions. The caller must either guarantee\r
5183 that Index and Value are valid, or the caller must establish proper exception\r
5184 handlers. This function is only available on IA-32 and x64.\r
5185\r
5186 @param Index The 32-bit MSR index to write.\r
5187 @param Value The 32-bit value to write to the MSR.\r
5188\r
5189 @return Value\r
5190\r
5191**/\r
5192UINT32\r
5193EFIAPI\r
5194AsmWriteMsr32 (\r
5195 IN UINT32 Index,\r
5196 IN UINT32 Value\r
5197 );\r
5198\r
5199\r
5200/**\r
5201 Reads a 64-bit MSR, performs a bitwise OR on the lower 32-bits, and\r
5202 writes the result back to the 64-bit MSR.\r
5203\r
5204 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
5205 between the lower 32-bits of the read result and the value specified by\r
5206 OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
5207 32-bits of the value written to the MSR is returned. No parameter checking is\r
5208 performed on Index or OrData, and some of these may cause CPU exceptions. The\r
5209 caller must either guarantee that Index and OrData are valid, or the caller\r
5210 must establish proper exception handlers. This function is only available on\r
5211 IA-32 and x64.\r
5212\r
5213 @param Index The 32-bit MSR index to write.\r
5214 @param OrData The value to OR with the read value from the MSR.\r
5215\r
5216 @return The lower 32-bit value written to the MSR.\r
5217\r
5218**/\r
5219UINT32\r
5220EFIAPI\r
5221AsmMsrOr32 (\r
5222 IN UINT32 Index,\r
5223 IN UINT32 OrData\r
5224 );\r
5225\r
5226\r
5227/**\r
5228 Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r
5229 the result back to the 64-bit MSR.\r
5230\r
5231 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5232 lower 32-bits of the read result and the value specified by AndData, and\r
5233 writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r
5234 the value written to the MSR is returned. No parameter checking is performed\r
5235 on Index or AndData, and some of these may cause CPU exceptions. The caller\r
5236 must either guarantee that Index and AndData are valid, or the caller must\r
5237 establish proper exception handlers. This function is only available on IA-32\r
5238 and x64.\r
5239\r
5240 @param Index The 32-bit MSR index to write.\r
5241 @param AndData The value to AND with the read value from the MSR.\r
5242\r
5243 @return The lower 32-bit value written to the MSR.\r
5244\r
5245**/\r
5246UINT32\r
5247EFIAPI\r
5248AsmMsrAnd32 (\r
5249 IN UINT32 Index,\r
5250 IN UINT32 AndData\r
5251 );\r
5252\r
5253\r
5254/**\r
5255 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise OR\r
5256 on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
5257\r
5258 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5259 lower 32-bits of the read result and the value specified by AndData\r
5260 preserving the upper 32-bits, performs a bitwise OR between the\r
5261 result of the AND operation and the value specified by OrData, and writes the\r
5262 result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
5263 written to the MSR is returned. No parameter checking is performed on Index,\r
5264 AndData, or OrData, and some of these may cause CPU exceptions. The caller\r
5265 must either guarantee that Index, AndData, and OrData are valid, or the\r
5266 caller must establish proper exception handlers. This function is only\r
5267 available on IA-32 and x64.\r
5268\r
5269 @param Index The 32-bit MSR index to write.\r
5270 @param AndData The value to AND with the read value from the MSR.\r
5271 @param OrData The value to OR with the result of the AND operation.\r
5272\r
5273 @return The lower 32-bit value written to the MSR.\r
5274\r
5275**/\r
5276UINT32\r
5277EFIAPI\r
5278AsmMsrAndThenOr32 (\r
5279 IN UINT32 Index,\r
5280 IN UINT32 AndData,\r
5281 IN UINT32 OrData\r
5282 );\r
5283\r
5284\r
5285/**\r
5286 Reads a bit field of an MSR.\r
5287\r
5288 Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r
5289 specified by the StartBit and the EndBit. The value of the bit field is\r
5290 returned. The caller must either guarantee that Index is valid, or the caller\r
5291 must set up exception handlers to catch the exceptions. This function is only\r
5292 available on IA-32 and x64.\r
5293\r
5294 If StartBit is greater than 31, then ASSERT().\r
5295 If EndBit is greater than 31, then ASSERT().\r
5296 If EndBit is less than StartBit, then ASSERT().\r
5297\r
5298 @param Index The 32-bit MSR index to read.\r
5299 @param StartBit The ordinal of the least significant bit in the bit field.\r
5300 Range 0..31.\r
5301 @param EndBit The ordinal of the most significant bit in the bit field.\r
5302 Range 0..31.\r
5303\r
5304 @return The bit field read from the MSR.\r
5305\r
5306**/\r
5307UINT32\r
5308EFIAPI\r
5309AsmMsrBitFieldRead32 (\r
5310 IN UINT32 Index,\r
5311 IN UINTN StartBit,\r
5312 IN UINTN EndBit\r
5313 );\r
5314\r
5315\r
5316/**\r
5317 Writes a bit field to an MSR.\r
5318\r
5319 Writes Value to a bit field in the lower 32-bits of a 64-bit MSR. The bit\r
5320 field is specified by the StartBit and the EndBit. All other bits in the\r
5321 destination MSR are preserved. The lower 32-bits of the MSR written is\r
5322 returned. The caller must either guarantee that Index and the data written \r
5323 is valid, or the caller must set up exception handlers to catch the exceptions. \r
5324 This function is only available on IA-32 and x64.\r
5325\r
5326 If StartBit is greater than 31, then ASSERT().\r
5327 If EndBit is greater than 31, then ASSERT().\r
5328 If EndBit is less than StartBit, then ASSERT().\r
5329\r
5330 @param Index The 32-bit MSR index to write.\r
5331 @param StartBit The ordinal of the least significant bit in the bit field.\r
5332 Range 0..31.\r
5333 @param EndBit The ordinal of the most significant bit in the bit field.\r
5334 Range 0..31.\r
5335 @param Value New value of the bit field.\r
5336\r
5337 @return The lower 32-bit of the value written to the MSR.\r
5338\r
5339**/\r
5340UINT32\r
5341EFIAPI\r
5342AsmMsrBitFieldWrite32 (\r
5343 IN UINT32 Index,\r
5344 IN UINTN StartBit,\r
5345 IN UINTN EndBit,\r
5346 IN UINT32 Value\r
5347 );\r
5348\r
5349\r
5350/**\r
5351 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
5352 result back to the bit field in the 64-bit MSR.\r
5353\r
5354 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
5355 between the read result and the value specified by OrData, and writes the\r
5356 result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
5357 written to the MSR are returned. Extra left bits in OrData are stripped. The\r
5358 caller must either guarantee that Index and the data written is valid, or\r
5359 the caller must set up exception handlers to catch the exceptions. This\r
5360 function is only available on IA-32 and x64.\r
5361\r
5362 If StartBit is greater than 31, then ASSERT().\r
5363 If EndBit is greater than 31, then ASSERT().\r
5364 If EndBit is less than StartBit, then ASSERT().\r
5365\r
5366 @param Index The 32-bit MSR index to write.\r
5367 @param StartBit The ordinal of the least significant bit in the bit field.\r
5368 Range 0..31.\r
5369 @param EndBit The ordinal of the most significant bit in the bit field.\r
5370 Range 0..31.\r
5371 @param OrData The value to OR with the read value from the MSR.\r
5372\r
5373 @return The lower 32-bit of the value written to the MSR.\r
5374\r
5375**/\r
5376UINT32\r
5377EFIAPI\r
5378AsmMsrBitFieldOr32 (\r
5379 IN UINT32 Index,\r
5380 IN UINTN StartBit,\r
5381 IN UINTN EndBit,\r
5382 IN UINT32 OrData\r
5383 );\r
5384\r
5385\r
5386/**\r
5387 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
5388 result back to the bit field in the 64-bit MSR.\r
5389\r
5390 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5391 read result and the value specified by AndData, and writes the result to the\r
5392 64-bit MSR specified by Index. The lower 32-bits of the value written to the\r
5393 MSR are returned. Extra left bits in AndData are stripped. The caller must\r
5394 either guarantee that Index and the data written is valid, or the caller must\r
5395 set up exception handlers to catch the exceptions. This function is only\r
5396 available on IA-32 and x64.\r
5397\r
5398 If StartBit is greater than 31, then ASSERT().\r
5399 If EndBit is greater than 31, then ASSERT().\r
5400 If EndBit is less than StartBit, then ASSERT().\r
5401\r
5402 @param Index The 32-bit MSR index to write.\r
5403 @param StartBit The ordinal of the least significant bit in the bit field.\r
5404 Range 0..31.\r
5405 @param EndBit The ordinal of the most significant bit in the bit field.\r
5406 Range 0..31.\r
5407 @param AndData The value to AND with the read value from the MSR.\r
5408\r
5409 @return The lower 32-bit of the value written to the MSR.\r
5410\r
5411**/\r
5412UINT32\r
5413EFIAPI\r
5414AsmMsrBitFieldAnd32 (\r
5415 IN UINT32 Index,\r
5416 IN UINTN StartBit,\r
5417 IN UINTN EndBit,\r
5418 IN UINT32 AndData\r
5419 );\r
5420\r
5421\r
5422/**\r
5423 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
5424 bitwise OR, and writes the result back to the bit field in the\r
5425 64-bit MSR.\r
5426\r
5427 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
5428 bitwise OR between the read result and the value specified by\r
5429 AndData, and writes the result to the 64-bit MSR specified by Index. The\r
5430 lower 32-bits of the value written to the MSR are returned. Extra left bits\r
5431 in both AndData and OrData are stripped. The caller must either guarantee\r
5432 that Index and the data written is valid, or the caller must set up exception\r
5433 handlers to catch the exceptions. This function is only available on IA-32\r
5434 and x64.\r
5435\r
5436 If StartBit is greater than 31, then ASSERT().\r
5437 If EndBit is greater than 31, then ASSERT().\r
5438 If EndBit is less than StartBit, then ASSERT().\r
5439\r
5440 @param Index The 32-bit MSR index to write.\r
5441 @param StartBit The ordinal of the least significant bit in the bit field.\r
5442 Range 0..31.\r
5443 @param EndBit The ordinal of the most significant bit in the bit field.\r
5444 Range 0..31.\r
5445 @param AndData The value to AND with the read value from the MSR.\r
5446 @param OrData The value to OR with the result of the AND operation.\r
5447\r
5448 @return The lower 32-bit of the value written to the MSR.\r
5449\r
5450**/\r
5451UINT32\r
5452EFIAPI\r
5453AsmMsrBitFieldAndThenOr32 (\r
5454 IN UINT32 Index,\r
5455 IN UINTN StartBit,\r
5456 IN UINTN EndBit,\r
5457 IN UINT32 AndData,\r
5458 IN UINT32 OrData\r
5459 );\r
5460\r
5461\r
5462/**\r
5463 Returns a 64-bit Machine Specific Register(MSR).\r
5464\r
5465 Reads and returns the 64-bit MSR specified by Index. No parameter checking is\r
5466 performed on Index, and some Index values may cause CPU exceptions. The\r
5467 caller must either guarantee that Index is valid, or the caller must set up\r
5468 exception handlers to catch the exceptions. This function is only available\r
5469 on IA-32 and x64.\r
5470\r
5471 @param Index The 32-bit MSR index to read.\r
5472\r
5473 @return The value of the MSR identified by Index.\r
5474\r
5475**/\r
5476UINT64\r
5477EFIAPI\r
5478AsmReadMsr64 (\r
5479 IN UINT32 Index\r
5480 );\r
5481\r
5482\r
5483/**\r
5484 Writes a 64-bit value to a Machine Specific Register(MSR), and returns the\r
5485 value.\r
5486\r
5487 Writes the 64-bit value specified by Value to the MSR specified by Index. The\r
5488 64-bit value written to the MSR is returned. No parameter checking is\r
5489 performed on Index or Value, and some of these may cause CPU exceptions. The\r
5490 caller must either guarantee that Index and Value are valid, or the caller\r
5491 must establish proper exception handlers. This function is only available on\r
5492 IA-32 and x64.\r
5493\r
5494 @param Index The 32-bit MSR index to write.\r
5495 @param Value The 64-bit value to write to the MSR.\r
5496\r
5497 @return Value\r
5498\r
5499**/\r
5500UINT64\r
5501EFIAPI\r
5502AsmWriteMsr64 (\r
5503 IN UINT32 Index,\r
5504 IN UINT64 Value\r
5505 );\r
5506\r
5507\r
5508/**\r
5509 Reads a 64-bit MSR, performs a bitwise OR, and writes the result\r
5510 back to the 64-bit MSR.\r
5511\r
5512 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
5513 between the read result and the value specified by OrData, and writes the\r
5514 result to the 64-bit MSR specified by Index. The value written to the MSR is\r
5515 returned. No parameter checking is performed on Index or OrData, and some of\r
5516 these may cause CPU exceptions. The caller must either guarantee that Index\r
5517 and OrData are valid, or the caller must establish proper exception handlers.\r
5518 This function is only available on IA-32 and x64.\r
5519\r
5520 @param Index The 32-bit MSR index to write.\r
5521 @param OrData The value to OR with the read value from the MSR.\r
5522\r
5523 @return The value written back to the MSR.\r
5524\r
5525**/\r
5526UINT64\r
5527EFIAPI\r
5528AsmMsrOr64 (\r
5529 IN UINT32 Index,\r
5530 IN UINT64 OrData\r
5531 );\r
5532\r
5533\r
5534/**\r
5535 Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r
5536 64-bit MSR.\r
5537\r
5538 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5539 read result and the value specified by OrData, and writes the result to the\r
5540 64-bit MSR specified by Index. The value written to the MSR is returned. No\r
5541 parameter checking is performed on Index or OrData, and some of these may\r
5542 cause CPU exceptions. The caller must either guarantee that Index and OrData\r
5543 are valid, or the caller must establish proper exception handlers. This\r
5544 function is only available on IA-32 and x64.\r
5545\r
5546 @param Index The 32-bit MSR index to write.\r
5547 @param AndData The value to AND with the read value from the MSR.\r
5548\r
5549 @return The value written back to the MSR.\r
5550\r
5551**/\r
5552UINT64\r
5553EFIAPI\r
5554AsmMsrAnd64 (\r
5555 IN UINT32 Index,\r
5556 IN UINT64 AndData\r
5557 );\r
5558\r
5559\r
5560/**\r
5561 Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise \r
5562 OR, and writes the result back to the 64-bit MSR.\r
5563\r
5564 Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
5565 result and the value specified by AndData, performs a bitwise OR\r
5566 between the result of the AND operation and the value specified by OrData,\r
5567 and writes the result to the 64-bit MSR specified by Index. The value written\r
5568 to the MSR is returned. No parameter checking is performed on Index, AndData,\r
5569 or OrData, and some of these may cause CPU exceptions. The caller must either\r
5570 guarantee that Index, AndData, and OrData are valid, or the caller must\r
5571 establish proper exception handlers. This function is only available on IA-32\r
5572 and x64.\r
5573\r
5574 @param Index The 32-bit MSR index to write.\r
5575 @param AndData The value to AND with the read value from the MSR.\r
5576 @param OrData The value to OR with the result of the AND operation.\r
5577\r
5578 @return The value written back to the MSR.\r
5579\r
5580**/\r
5581UINT64\r
5582EFIAPI\r
5583AsmMsrAndThenOr64 (\r
5584 IN UINT32 Index,\r
5585 IN UINT64 AndData,\r
5586 IN UINT64 OrData\r
5587 );\r
5588\r
5589\r
5590/**\r
5591 Reads a bit field of an MSR.\r
5592\r
5593 Reads the bit field in the 64-bit MSR. The bit field is specified by the\r
5594 StartBit and the EndBit. The value of the bit field is returned. The caller\r
5595 must either guarantee that Index is valid, or the caller must set up\r
5596 exception handlers to catch the exceptions. This function is only available\r
5597 on IA-32 and x64.\r
5598\r
5599 If StartBit is greater than 63, then ASSERT().\r
5600 If EndBit is greater than 63, then ASSERT().\r
5601 If EndBit is less than StartBit, then ASSERT().\r
5602\r
5603 @param Index The 32-bit MSR index to read.\r
5604 @param StartBit The ordinal of the least significant bit in the bit field.\r
5605 Range 0..63.\r
5606 @param EndBit The ordinal of the most significant bit in the bit field.\r
5607 Range 0..63.\r
5608\r
5609 @return The value read from the MSR.\r
5610\r
5611**/\r
5612UINT64\r
5613EFIAPI\r
5614AsmMsrBitFieldRead64 (\r
5615 IN UINT32 Index,\r
5616 IN UINTN StartBit,\r
5617 IN UINTN EndBit\r
5618 );\r
5619\r
5620\r
5621/**\r
5622 Writes a bit field to an MSR.\r
5623\r
5624 Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
5625 the StartBit and the EndBit. All other bits in the destination MSR are\r
5626 preserved. The MSR written is returned. The caller must either guarantee \r
5627 that Index and the data written is valid, or the caller must set up exception \r
5628 handlers to catch the exceptions. This function is only available on IA-32 and x64.\r
5629\r
5630 If StartBit is greater than 63, then ASSERT().\r
5631 If EndBit is greater than 63, then ASSERT().\r
5632 If EndBit is less than StartBit, then ASSERT().\r
5633\r
5634 @param Index The 32-bit MSR index to write.\r
5635 @param StartBit The ordinal of the least significant bit in the bit field.\r
5636 Range 0..63.\r
5637 @param EndBit The ordinal of the most significant bit in the bit field.\r
5638 Range 0..63.\r
5639 @param Value New value of the bit field.\r
5640\r
5641 @return The value written back to the MSR.\r
5642\r
5643**/\r
5644UINT64\r
5645EFIAPI\r
5646AsmMsrBitFieldWrite64 (\r
5647 IN UINT32 Index,\r
5648 IN UINTN StartBit,\r
5649 IN UINTN EndBit,\r
5650 IN UINT64 Value\r
5651 );\r
5652\r
5653\r
5654/**\r
5655 Reads a bit field in a 64-bit MSR, performs a bitwise OR, and\r
5656 writes the result back to the bit field in the 64-bit MSR.\r
5657\r
5658 Reads the 64-bit MSR specified by Index, performs a bitwise OR\r
5659 between the read result and the value specified by OrData, and writes the\r
5660 result to the 64-bit MSR specified by Index. The value written to the MSR is\r
5661 returned. Extra left bits in OrData are stripped. The caller must either\r
5662 guarantee that Index and the data written is valid, or the caller must set up\r
5663 exception handlers to catch the exceptions. This function is only available\r
5664 on IA-32 and x64.\r
5665\r
5666 If StartBit is greater than 63, then ASSERT().\r
5667 If EndBit is greater than 63, then ASSERT().\r
5668 If EndBit is less than StartBit, then ASSERT().\r
5669\r
5670 @param Index The 32-bit MSR index to write.\r
5671 @param StartBit The ordinal of the least significant bit in the bit field.\r
5672 Range 0..63.\r
5673 @param EndBit The ordinal of the most significant bit in the bit field.\r
5674 Range 0..63.\r
5675 @param OrData The value to OR with the read value from the bit field.\r
5676\r
5677 @return The value written back to the MSR.\r
5678\r
5679**/\r
5680UINT64\r
5681EFIAPI\r
5682AsmMsrBitFieldOr64 (\r
5683 IN UINT32 Index,\r
5684 IN UINTN StartBit,\r
5685 IN UINTN EndBit,\r
5686 IN UINT64 OrData\r
5687 );\r
5688\r
5689\r
5690/**\r
5691 Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
5692 result back to the bit field in the 64-bit MSR.\r
5693\r
5694 Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
5695 read result and the value specified by AndData, and writes the result to the\r
5696 64-bit MSR specified by Index. The value written to the MSR is returned.\r
5697 Extra left bits in AndData are stripped. The caller must either guarantee\r
5698 that Index and the data written is valid, or the caller must set up exception\r
5699 handlers to catch the exceptions. This function is only available on IA-32\r
5700 and x64.\r
5701\r
5702 If StartBit is greater than 63, then ASSERT().\r
5703 If EndBit is greater than 63, then ASSERT().\r
5704 If EndBit is less than StartBit, then ASSERT().\r
5705\r
5706 @param Index The 32-bit MSR index to write.\r
5707 @param StartBit The ordinal of the least significant bit in the bit field.\r
5708 Range 0..63.\r
5709 @param EndBit The ordinal of the most significant bit in the bit field.\r
5710 Range 0..63.\r
5711 @param AndData The value to AND with the read value from the bit field.\r
5712\r
5713 @return The value written back to the MSR.\r
5714\r
5715**/\r
5716UINT64\r
5717EFIAPI\r
5718AsmMsrBitFieldAnd64 (\r
5719 IN UINT32 Index,\r
5720 IN UINTN StartBit,\r
5721 IN UINTN EndBit,\r
5722 IN UINT64 AndData\r
5723 );\r
5724\r
5725\r
5726/**\r
5727 Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
5728 bitwise OR, and writes the result back to the bit field in the\r
5729 64-bit MSR.\r
5730\r
5731 Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
5732 a bitwise OR between the read result and the value specified by\r
5733 AndData, and writes the result to the 64-bit MSR specified by Index. The\r
5734 value written to the MSR is returned. Extra left bits in both AndData and\r
5735 OrData are stripped. The caller must either guarantee that Index and the data\r
5736 written is valid, or the caller must set up exception handlers to catch the\r
5737 exceptions. This function is only available on IA-32 and x64.\r
5738\r
5739 If StartBit is greater than 63, then ASSERT().\r
5740 If EndBit is greater than 63, then ASSERT().\r
5741 If EndBit is less than StartBit, then ASSERT().\r
5742\r
5743 @param Index The 32-bit MSR index to write.\r
5744 @param StartBit The ordinal of the least significant bit in the bit field.\r
5745 Range 0..63.\r
5746 @param EndBit The ordinal of the most significant bit in the bit field.\r
5747 Range 0..63.\r
5748 @param AndData The value to AND with the read value from the bit field.\r
5749 @param OrData The value to OR with the result of the AND operation.\r
5750\r
5751 @return The value written back to the MSR.\r
5752\r
5753**/\r
5754UINT64\r
5755EFIAPI\r
5756AsmMsrBitFieldAndThenOr64 (\r
5757 IN UINT32 Index,\r
5758 IN UINTN StartBit,\r
5759 IN UINTN EndBit,\r
5760 IN UINT64 AndData,\r
5761 IN UINT64 OrData\r
5762 );\r
5763\r
5764\r
5765/**\r
5766 Reads the current value of the EFLAGS register.\r
5767\r
5768 Reads and returns the current value of the EFLAGS register. This function is\r
5769 only available on IA-32 and x64. This returns a 32-bit value on IA-32 and a\r
5770 64-bit value on x64.\r
5771\r
5772 @return EFLAGS on IA-32 or RFLAGS on x64.\r
5773\r
5774**/\r
5775UINTN\r
5776EFIAPI\r
5777AsmReadEflags (\r
5778 VOID\r
5779 );\r
5780\r
5781\r
5782/**\r
5783 Reads the current value of the Control Register 0 (CR0).\r
5784\r
5785 Reads and returns the current value of CR0. This function is only available\r
5786 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5787 x64.\r
5788\r
5789 @return The value of the Control Register 0 (CR0).\r
5790\r
5791**/\r
5792UINTN\r
5793EFIAPI\r
5794AsmReadCr0 (\r
5795 VOID\r
5796 );\r
5797\r
5798\r
5799/**\r
5800 Reads the current value of the Control Register 2 (CR2).\r
5801\r
5802 Reads and returns the current value of CR2. This function is only available\r
5803 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5804 x64.\r
5805\r
5806 @return The value of the Control Register 2 (CR2).\r
5807\r
5808**/\r
5809UINTN\r
5810EFIAPI\r
5811AsmReadCr2 (\r
5812 VOID\r
5813 );\r
5814\r
5815\r
5816/**\r
5817 Reads the current value of the Control Register 3 (CR3).\r
5818\r
5819 Reads and returns the current value of CR3. This function is only available\r
5820 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5821 x64.\r
5822\r
5823 @return The value of the Control Register 3 (CR3).\r
5824\r
5825**/\r
5826UINTN\r
5827EFIAPI\r
5828AsmReadCr3 (\r
5829 VOID\r
5830 );\r
5831\r
5832\r
5833/**\r
5834 Reads the current value of the Control Register 4 (CR4).\r
5835\r
5836 Reads and returns the current value of CR4. This function is only available\r
5837 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5838 x64.\r
5839\r
5840 @return The value of the Control Register 4 (CR4).\r
5841\r
5842**/\r
5843UINTN\r
5844EFIAPI\r
5845AsmReadCr4 (\r
5846 VOID\r
5847 );\r
5848\r
5849\r
5850/**\r
5851 Writes a value to Control Register 0 (CR0).\r
5852\r
5853 Writes and returns a new value to CR0. This function is only available on\r
5854 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
5855\r
5856 @param Cr0 The value to write to CR0.\r
5857\r
5858 @return The value written to CR0.\r
5859\r
5860**/\r
5861UINTN\r
5862EFIAPI\r
5863AsmWriteCr0 (\r
5864 UINTN Cr0\r
5865 );\r
5866\r
5867\r
5868/**\r
5869 Writes a value to Control Register 2 (CR2).\r
5870\r
5871 Writes and returns a new value to CR2. This function is only available on\r
5872 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
5873\r
5874 @param Cr2 The value to write to CR2.\r
5875\r
5876 @return The value written to CR2.\r
5877\r
5878**/\r
5879UINTN\r
5880EFIAPI\r
5881AsmWriteCr2 (\r
5882 UINTN Cr2\r
5883 );\r
5884\r
5885\r
5886/**\r
5887 Writes a value to Control Register 3 (CR3).\r
5888\r
5889 Writes and returns a new value to CR3. This function is only available on\r
5890 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
5891\r
5892 @param Cr3 The value to write to CR3.\r
5893\r
5894 @return The value written to CR3.\r
5895\r
5896**/\r
5897UINTN\r
5898EFIAPI\r
5899AsmWriteCr3 (\r
5900 UINTN Cr3\r
5901 );\r
5902\r
5903\r
5904/**\r
5905 Writes a value to Control Register 4 (CR4).\r
5906\r
5907 Writes and returns a new value to CR4. This function is only available on\r
5908 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
5909\r
5910 @param Cr4 The value to write to CR4.\r
5911\r
5912 @return The value written to CR4.\r
5913\r
5914**/\r
5915UINTN\r
5916EFIAPI\r
5917AsmWriteCr4 (\r
5918 UINTN Cr4\r
5919 );\r
5920\r
5921\r
5922/**\r
5923 Reads the current value of Debug Register 0 (DR0).\r
5924\r
5925 Reads and returns the current value of DR0. This function is only available\r
5926 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5927 x64.\r
5928\r
5929 @return The value of Debug Register 0 (DR0).\r
5930\r
5931**/\r
5932UINTN\r
5933EFIAPI\r
5934AsmReadDr0 (\r
5935 VOID\r
5936 );\r
5937\r
5938\r
5939/**\r
5940 Reads the current value of Debug Register 1 (DR1).\r
5941\r
5942 Reads and returns the current value of DR1. This function is only available\r
5943 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5944 x64.\r
5945\r
5946 @return The value of Debug Register 1 (DR1).\r
5947\r
5948**/\r
5949UINTN\r
5950EFIAPI\r
5951AsmReadDr1 (\r
5952 VOID\r
5953 );\r
5954\r
5955\r
5956/**\r
5957 Reads the current value of Debug Register 2 (DR2).\r
5958\r
5959 Reads and returns the current value of DR2. This function is only available\r
5960 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5961 x64.\r
5962\r
5963 @return The value of Debug Register 2 (DR2).\r
5964\r
5965**/\r
5966UINTN\r
5967EFIAPI\r
5968AsmReadDr2 (\r
5969 VOID\r
5970 );\r
5971\r
5972\r
5973/**\r
5974 Reads the current value of Debug Register 3 (DR3).\r
5975\r
5976 Reads and returns the current value of DR3. This function is only available\r
5977 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5978 x64.\r
5979\r
5980 @return The value of Debug Register 3 (DR3).\r
5981\r
5982**/\r
5983UINTN\r
5984EFIAPI\r
5985AsmReadDr3 (\r
5986 VOID\r
5987 );\r
5988\r
5989\r
5990/**\r
5991 Reads the current value of Debug Register 4 (DR4).\r
5992\r
5993 Reads and returns the current value of DR4. This function is only available\r
5994 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
5995 x64.\r
5996\r
5997 @return The value of Debug Register 4 (DR4).\r
5998\r
5999**/\r
6000UINTN\r
6001EFIAPI\r
6002AsmReadDr4 (\r
6003 VOID\r
6004 );\r
6005\r
6006\r
6007/**\r
6008 Reads the current value of Debug Register 5 (DR5).\r
6009\r
6010 Reads and returns the current value of DR5. This function is only available\r
6011 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6012 x64.\r
6013\r
6014 @return The value of Debug Register 5 (DR5).\r
6015\r
6016**/\r
6017UINTN\r
6018EFIAPI\r
6019AsmReadDr5 (\r
6020 VOID\r
6021 );\r
6022\r
6023\r
6024/**\r
6025 Reads the current value of Debug Register 6 (DR6).\r
6026\r
6027 Reads and returns the current value of DR6. This function is only available\r
6028 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6029 x64.\r
6030\r
6031 @return The value of Debug Register 6 (DR6).\r
6032\r
6033**/\r
6034UINTN\r
6035EFIAPI\r
6036AsmReadDr6 (\r
6037 VOID\r
6038 );\r
6039\r
6040\r
6041/**\r
6042 Reads the current value of Debug Register 7 (DR7).\r
6043\r
6044 Reads and returns the current value of DR7. This function is only available\r
6045 on IA-32 and x64. This returns a 32-bit value on IA-32 and a 64-bit value on\r
6046 x64.\r
6047\r
6048 @return The value of Debug Register 7 (DR7).\r
6049\r
6050**/\r
6051UINTN\r
6052EFIAPI\r
6053AsmReadDr7 (\r
6054 VOID\r
6055 );\r
6056\r
6057\r
6058/**\r
6059 Writes a value to Debug Register 0 (DR0).\r
6060\r
6061 Writes and returns a new value to DR0. This function is only available on\r
6062 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6063\r
6064 @param Dr0 The value to write to Dr0.\r
6065\r
6066 @return The value written to Debug Register 0 (DR0).\r
6067\r
6068**/\r
6069UINTN\r
6070EFIAPI\r
6071AsmWriteDr0 (\r
6072 UINTN Dr0\r
6073 );\r
6074\r
6075\r
6076/**\r
6077 Writes a value to Debug Register 1 (DR1).\r
6078\r
6079 Writes and returns a new value to DR1. This function is only available on\r
6080 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6081\r
6082 @param Dr1 The value to write to Dr1.\r
6083\r
6084 @return The value written to Debug Register 1 (DR1).\r
6085\r
6086**/\r
6087UINTN\r
6088EFIAPI\r
6089AsmWriteDr1 (\r
6090 UINTN Dr1\r
6091 );\r
6092\r
6093\r
6094/**\r
6095 Writes a value to Debug Register 2 (DR2).\r
6096\r
6097 Writes and returns a new value to DR2. This function is only available on\r
6098 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6099\r
6100 @param Dr2 The value to write to Dr2.\r
6101\r
6102 @return The value written to Debug Register 2 (DR2).\r
6103\r
6104**/\r
6105UINTN\r
6106EFIAPI\r
6107AsmWriteDr2 (\r
6108 UINTN Dr2\r
6109 );\r
6110\r
6111\r
6112/**\r
6113 Writes a value to Debug Register 3 (DR3).\r
6114\r
6115 Writes and returns a new value to DR3. This function is only available on\r
6116 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6117\r
6118 @param Dr3 The value to write to Dr3.\r
6119\r
6120 @return The value written to Debug Register 3 (DR3).\r
6121\r
6122**/\r
6123UINTN\r
6124EFIAPI\r
6125AsmWriteDr3 (\r
6126 UINTN Dr3\r
6127 );\r
6128\r
6129\r
6130/**\r
6131 Writes a value to Debug Register 4 (DR4).\r
6132\r
6133 Writes and returns a new value to DR4. This function is only available on\r
6134 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6135\r
6136 @param Dr4 The value to write to Dr4.\r
6137\r
6138 @return The value written to Debug Register 4 (DR4).\r
6139\r
6140**/\r
6141UINTN\r
6142EFIAPI\r
6143AsmWriteDr4 (\r
6144 UINTN Dr4\r
6145 );\r
6146\r
6147\r
6148/**\r
6149 Writes a value to Debug Register 5 (DR5).\r
6150\r
6151 Writes and returns a new value to DR5. This function is only available on\r
6152 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6153\r
6154 @param Dr5 The value to write to Dr5.\r
6155\r
6156 @return The value written to Debug Register 5 (DR5).\r
6157\r
6158**/\r
6159UINTN\r
6160EFIAPI\r
6161AsmWriteDr5 (\r
6162 UINTN Dr5\r
6163 );\r
6164\r
6165\r
6166/**\r
6167 Writes a value to Debug Register 6 (DR6).\r
6168\r
6169 Writes and returns a new value to DR6. This function is only available on\r
6170 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6171\r
6172 @param Dr6 The value to write to Dr6.\r
6173\r
6174 @return The value written to Debug Register 6 (DR6).\r
6175\r
6176**/\r
6177UINTN\r
6178EFIAPI\r
6179AsmWriteDr6 (\r
6180 UINTN Dr6\r
6181 );\r
6182\r
6183\r
6184/**\r
6185 Writes a value to Debug Register 7 (DR7).\r
6186\r
6187 Writes and returns a new value to DR7. This function is only available on\r
6188 IA-32 and x64. This writes a 32-bit value on IA-32 and a 64-bit value on x64.\r
6189\r
6190 @param Dr7 The value to write to Dr7.\r
6191\r
6192 @return The value written to Debug Register 7 (DR7).\r
6193\r
6194**/\r
6195UINTN\r
6196EFIAPI\r
6197AsmWriteDr7 (\r
6198 UINTN Dr7\r
6199 );\r
6200\r
6201\r
6202/**\r
6203 Reads the current value of Code Segment Register (CS).\r
6204\r
6205 Reads and returns the current value of CS. This function is only available on\r
6206 IA-32 and x64.\r
6207\r
6208 @return The current value of CS.\r
6209\r
6210**/\r
6211UINT16\r
6212EFIAPI\r
6213AsmReadCs (\r
6214 VOID\r
6215 );\r
6216\r
6217\r
6218/**\r
6219 Reads the current value of Data Segment Register (DS).\r
6220\r
6221 Reads and returns the current value of DS. This function is only available on\r
6222 IA-32 and x64.\r
6223\r
6224 @return The current value of DS.\r
6225\r
6226**/\r
6227UINT16\r
6228EFIAPI\r
6229AsmReadDs (\r
6230 VOID\r
6231 );\r
6232\r
6233\r
6234/**\r
6235 Reads the current value of Extra Segment Register (ES).\r
6236\r
6237 Reads and returns the current value of ES. This function is only available on\r
6238 IA-32 and x64.\r
6239\r
6240 @return The current value of ES.\r
6241\r
6242**/\r
6243UINT16\r
6244EFIAPI\r
6245AsmReadEs (\r
6246 VOID\r
6247 );\r
6248\r
6249\r
6250/**\r
6251 Reads the current value of FS Data Segment Register (FS).\r
6252\r
6253 Reads and returns the current value of FS. This function is only available on\r
6254 IA-32 and x64.\r
6255\r
6256 @return The current value of FS.\r
6257\r
6258**/\r
6259UINT16\r
6260EFIAPI\r
6261AsmReadFs (\r
6262 VOID\r
6263 );\r
6264\r
6265\r
6266/**\r
6267 Reads the current value of GS Data Segment Register (GS).\r
6268\r
6269 Reads and returns the current value of GS. This function is only available on\r
6270 IA-32 and x64.\r
6271\r
6272 @return The current value of GS.\r
6273\r
6274**/\r
6275UINT16\r
6276EFIAPI\r
6277AsmReadGs (\r
6278 VOID\r
6279 );\r
6280\r
6281\r
6282/**\r
6283 Reads the current value of Stack Segment Register (SS).\r
6284\r
6285 Reads and returns the current value of SS. This function is only available on\r
6286 IA-32 and x64.\r
6287\r
6288 @return The current value of SS.\r
6289\r
6290**/\r
6291UINT16\r
6292EFIAPI\r
6293AsmReadSs (\r
6294 VOID\r
6295 );\r
6296\r
6297\r
6298/**\r
6299 Reads the current value of Task Register (TR).\r
6300\r
6301 Reads and returns the current value of TR. This function is only available on\r
6302 IA-32 and x64.\r
6303\r
6304 @return The current value of TR.\r
6305\r
6306**/\r
6307UINT16\r
6308EFIAPI\r
6309AsmReadTr (\r
6310 VOID\r
6311 );\r
6312\r
6313\r
6314/**\r
6315 Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
6316\r
6317 Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
6318 function is only available on IA-32 and x64.\r
6319\r
6320 If Gdtr is NULL, then ASSERT().\r
6321\r
6322 @param Gdtr Pointer to a GDTR descriptor.\r
6323\r
6324**/\r
6325VOID\r
6326EFIAPI\r
6327AsmReadGdtr (\r
6328 OUT IA32_DESCRIPTOR *Gdtr\r
6329 );\r
6330\r
6331\r
6332/**\r
6333 Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
6334\r
6335 Writes and the current GDTR descriptor specified by Gdtr. This function is\r
6336 only available on IA-32 and x64.\r
6337\r
6338 If Gdtr is NULL, then ASSERT().\r
6339\r
6340 @param Gdtr Pointer to a GDTR descriptor.\r
6341\r
6342**/\r
6343VOID\r
6344EFIAPI\r
6345AsmWriteGdtr (\r
6346 IN CONST IA32_DESCRIPTOR *Gdtr\r
6347 );\r
6348\r
6349\r
6350/**\r
6351 Reads the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
6352\r
6353 Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
6354 function is only available on IA-32 and x64.\r
6355\r
6356 If Idtr is NULL, then ASSERT().\r
6357\r
6358 @param Idtr Pointer to a IDTR descriptor.\r
6359\r
6360**/\r
6361VOID\r
6362EFIAPI\r
6363AsmReadIdtr (\r
6364 OUT IA32_DESCRIPTOR *Idtr\r
6365 );\r
6366\r
6367\r
6368/**\r
6369 Writes the current Interrupt Descriptor Table Register(IDTR) descriptor.\r
6370\r
6371 Writes the current IDTR descriptor and returns it in Idtr. This function is\r
6372 only available on IA-32 and x64.\r
6373\r
6374 If Idtr is NULL, then ASSERT().\r
6375\r
6376 @param Idtr Pointer to a IDTR descriptor.\r
6377\r
6378**/\r
6379VOID\r
6380EFIAPI\r
6381AsmWriteIdtr (\r
6382 IN CONST IA32_DESCRIPTOR *Idtr\r
6383 );\r
6384\r
6385\r
6386/**\r
6387 Reads the current Local Descriptor Table Register(LDTR) selector.\r
6388\r
6389 Reads and returns the current 16-bit LDTR descriptor value. This function is\r
6390 only available on IA-32 and x64.\r
6391\r
6392 @return The current selector of LDT.\r
6393\r
6394**/\r
6395UINT16\r
6396EFIAPI\r
6397AsmReadLdtr (\r
6398 VOID\r
6399 );\r
6400\r
6401\r
6402/**\r
6403 Writes the current Local Descriptor Table Register (LDTR) selector.\r
6404\r
6405 Writes and the current LDTR descriptor specified by Ldtr. This function is\r
6406 only available on IA-32 and x64.\r
6407\r
6408 @param Ldtr 16-bit LDTR selector value.\r
6409\r
6410**/\r
6411VOID\r
6412EFIAPI\r
6413AsmWriteLdtr (\r
6414 IN UINT16 Ldtr\r
6415 );\r
6416\r
6417\r
6418/**\r
6419 Save the current floating point/SSE/SSE2 context to a buffer.\r
6420\r
6421 Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
6422 Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
6423 available on IA-32 and x64.\r
6424\r
6425 If Buffer is NULL, then ASSERT().\r
6426 If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
6427\r
6428 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
6429\r
6430**/\r
6431VOID\r
6432EFIAPI\r
6433AsmFxSave (\r
6434 OUT IA32_FX_BUFFER *Buffer\r
6435 );\r
6436\r
6437\r
6438/**\r
6439 Restores the current floating point/SSE/SSE2 context from a buffer.\r
6440\r
6441 Restores the current floating point/SSE/SSE2 state from the buffer specified\r
6442 by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
6443 only available on IA-32 and x64.\r
6444\r
6445 If Buffer is NULL, then ASSERT().\r
6446 If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
6447 If Buffer was not saved with AsmFxSave(), then ASSERT().\r
6448\r
6449 @param Buffer Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
6450\r
6451**/\r
6452VOID\r
6453EFIAPI\r
6454AsmFxRestore (\r
6455 IN CONST IA32_FX_BUFFER *Buffer\r
6456 );\r
6457\r
6458\r
6459/**\r
6460 Reads the current value of 64-bit MMX Register #0 (MM0).\r
6461\r
6462 Reads and returns the current value of MM0. This function is only available\r
6463 on IA-32 and x64.\r
6464\r
6465 @return The current value of MM0.\r
6466\r
6467**/\r
6468UINT64\r
6469EFIAPI\r
6470AsmReadMm0 (\r
6471 VOID\r
6472 );\r
6473\r
6474\r
6475/**\r
6476 Reads the current value of 64-bit MMX Register #1 (MM1).\r
6477\r
6478 Reads and returns the current value of MM1. This function is only available\r
6479 on IA-32 and x64.\r
6480\r
6481 @return The current value of MM1.\r
6482\r
6483**/\r
6484UINT64\r
6485EFIAPI\r
6486AsmReadMm1 (\r
6487 VOID\r
6488 );\r
6489\r
6490\r
6491/**\r
6492 Reads the current value of 64-bit MMX Register #2 (MM2).\r
6493\r
6494 Reads and returns the current value of MM2. This function is only available\r
6495 on IA-32 and x64.\r
6496\r
6497 @return The current value of MM2.\r
6498\r
6499**/\r
6500UINT64\r
6501EFIAPI\r
6502AsmReadMm2 (\r
6503 VOID\r
6504 );\r
6505\r
6506\r
6507/**\r
6508 Reads the current value of 64-bit MMX Register #3 (MM3).\r
6509\r
6510 Reads and returns the current value of MM3. This function is only available\r
6511 on IA-32 and x64.\r
6512\r
6513 @return The current value of MM3.\r
6514\r
6515**/\r
6516UINT64\r
6517EFIAPI\r
6518AsmReadMm3 (\r
6519 VOID\r
6520 );\r
6521\r
6522\r
6523/**\r
6524 Reads the current value of 64-bit MMX Register #4 (MM4).\r
6525\r
6526 Reads and returns the current value of MM4. This function is only available\r
6527 on IA-32 and x64.\r
6528\r
6529 @return The current value of MM4.\r
6530\r
6531**/\r
6532UINT64\r
6533EFIAPI\r
6534AsmReadMm4 (\r
6535 VOID\r
6536 );\r
6537\r
6538\r
6539/**\r
6540 Reads the current value of 64-bit MMX Register #5 (MM5).\r
6541\r
6542 Reads and returns the current value of MM5. This function is only available\r
6543 on IA-32 and x64.\r
6544\r
6545 @return The current value of MM5.\r
6546\r
6547**/\r
6548UINT64\r
6549EFIAPI\r
6550AsmReadMm5 (\r
6551 VOID\r
6552 );\r
6553\r
6554\r
6555/**\r
6556 Reads the current value of 64-bit MMX Register #6 (MM6).\r
6557\r
6558 Reads and returns the current value of MM6. This function is only available\r
6559 on IA-32 and x64.\r
6560\r
6561 @return The current value of MM6.\r
6562\r
6563**/\r
6564UINT64\r
6565EFIAPI\r
6566AsmReadMm6 (\r
6567 VOID\r
6568 );\r
6569\r
6570\r
6571/**\r
6572 Reads the current value of 64-bit MMX Register #7 (MM7).\r
6573\r
6574 Reads and returns the current value of MM7. This function is only available\r
6575 on IA-32 and x64.\r
6576\r
6577 @return The current value of MM7.\r
6578\r
6579**/\r
6580UINT64\r
6581EFIAPI\r
6582AsmReadMm7 (\r
6583 VOID\r
6584 );\r
6585\r
6586\r
6587/**\r
6588 Writes the current value of 64-bit MMX Register #0 (MM0).\r
6589\r
6590 Writes the current value of MM0. This function is only available on IA32 and\r
6591 x64.\r
6592\r
6593 @param Value The 64-bit value to write to MM0.\r
6594\r
6595**/\r
6596VOID\r
6597EFIAPI\r
6598AsmWriteMm0 (\r
6599 IN UINT64 Value\r
6600 );\r
6601\r
6602\r
6603/**\r
6604 Writes the current value of 64-bit MMX Register #1 (MM1).\r
6605\r
6606 Writes the current value of MM1. This function is only available on IA32 and\r
6607 x64.\r
6608\r
6609 @param Value The 64-bit value to write to MM1.\r
6610\r
6611**/\r
6612VOID\r
6613EFIAPI\r
6614AsmWriteMm1 (\r
6615 IN UINT64 Value\r
6616 );\r
6617\r
6618\r
6619/**\r
6620 Writes the current value of 64-bit MMX Register #2 (MM2).\r
6621\r
6622 Writes the current value of MM2. This function is only available on IA32 and\r
6623 x64.\r
6624\r
6625 @param Value The 64-bit value to write to MM2.\r
6626\r
6627**/\r
6628VOID\r
6629EFIAPI\r
6630AsmWriteMm2 (\r
6631 IN UINT64 Value\r
6632 );\r
6633\r
6634\r
6635/**\r
6636 Writes the current value of 64-bit MMX Register #3 (MM3).\r
6637\r
6638 Writes the current value of MM3. This function is only available on IA32 and\r
6639 x64.\r
6640\r
6641 @param Value The 64-bit value to write to MM3.\r
6642\r
6643**/\r
6644VOID\r
6645EFIAPI\r
6646AsmWriteMm3 (\r
6647 IN UINT64 Value\r
6648 );\r
6649\r
6650\r
6651/**\r
6652 Writes the current value of 64-bit MMX Register #4 (MM4).\r
6653\r
6654 Writes the current value of MM4. This function is only available on IA32 and\r
6655 x64.\r
6656\r
6657 @param Value The 64-bit value to write to MM4.\r
6658\r
6659**/\r
6660VOID\r
6661EFIAPI\r
6662AsmWriteMm4 (\r
6663 IN UINT64 Value\r
6664 );\r
6665\r
6666\r
6667/**\r
6668 Writes the current value of 64-bit MMX Register #5 (MM5).\r
6669\r
6670 Writes the current value of MM5. This function is only available on IA32 and\r
6671 x64.\r
6672\r
6673 @param Value The 64-bit value to write to MM5.\r
6674\r
6675**/\r
6676VOID\r
6677EFIAPI\r
6678AsmWriteMm5 (\r
6679 IN UINT64 Value\r
6680 );\r
6681\r
6682\r
6683/**\r
6684 Writes the current value of 64-bit MMX Register #6 (MM6).\r
6685\r
6686 Writes the current value of MM6. This function is only available on IA32 and\r
6687 x64.\r
6688\r
6689 @param Value The 64-bit value to write to MM6.\r
6690\r
6691**/\r
6692VOID\r
6693EFIAPI\r
6694AsmWriteMm6 (\r
6695 IN UINT64 Value\r
6696 );\r
6697\r
6698\r
6699/**\r
6700 Writes the current value of 64-bit MMX Register #7 (MM7).\r
6701\r
6702 Writes the current value of MM7. This function is only available on IA32 and\r
6703 x64.\r
6704\r
6705 @param Value The 64-bit value to write to MM7.\r
6706\r
6707**/\r
6708VOID\r
6709EFIAPI\r
6710AsmWriteMm7 (\r
6711 IN UINT64 Value\r
6712 );\r
6713\r
6714\r
6715/**\r
6716 Reads the current value of Time Stamp Counter (TSC).\r
6717\r
6718 Reads and returns the current value of TSC. This function is only available\r
6719 on IA-32 and x64.\r
6720\r
6721 @return The current value of TSC\r
6722\r
6723**/\r
6724UINT64\r
6725EFIAPI\r
6726AsmReadTsc (\r
6727 VOID\r
6728 );\r
6729\r
6730\r
6731/**\r
6732 Reads the current value of a Performance Counter (PMC).\r
6733\r
6734 Reads and returns the current value of performance counter specified by\r
6735 Index. This function is only available on IA-32 and x64.\r
6736\r
6737 @param Index The 32-bit Performance Counter index to read.\r
6738\r
6739 @return The value of the PMC specified by Index.\r
6740\r
6741**/\r
6742UINT64\r
6743EFIAPI\r
6744AsmReadPmc (\r
6745 IN UINT32 Index\r
6746 );\r
6747\r
6748\r
6749/**\r
6750 Sets up a monitor buffer that is used by AsmMwait().\r
6751\r
6752 Executes a MONITOR instruction with the register state specified by Eax, Ecx\r
6753 and Edx. Returns Eax. This function is only available on IA-32 and x64.\r
6754\r
6755 @param Eax The value to load into EAX or RAX before executing the MONITOR\r
6756 instruction.\r
6757 @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
6758 instruction.\r
6759 @param Edx The value to load into EDX or RDX before executing the MONITOR\r
6760 instruction.\r
6761\r
6762 @return Eax\r
6763\r
6764**/\r
6765UINTN\r
6766EFIAPI\r
6767AsmMonitor (\r
6768 IN UINTN Eax,\r
6769 IN UINTN Ecx,\r
6770 IN UINTN Edx\r
6771 );\r
6772\r
6773\r
6774/**\r
6775 Executes an MWAIT instruction.\r
6776\r
6777 Executes an MWAIT instruction with the register state specified by Eax and\r
6778 Ecx. Returns Eax. This function is only available on IA-32 and x64.\r
6779\r
6780 @param Eax The value to load into EAX or RAX before executing the MONITOR\r
6781 instruction.\r
6782 @param Ecx The value to load into ECX or RCX before executing the MONITOR\r
6783 instruction.\r
6784\r
6785 @return Eax\r
6786\r
6787**/\r
6788UINTN\r
6789EFIAPI\r
6790AsmMwait (\r
6791 IN UINTN Eax,\r
6792 IN UINTN Ecx\r
6793 );\r
6794\r
6795\r
6796/**\r
6797 Executes a WBINVD instruction.\r
6798\r
6799 Executes a WBINVD instruction. This function is only available on IA-32 and\r
6800 x64.\r
6801\r
6802**/\r
6803VOID\r
6804EFIAPI\r
6805AsmWbinvd (\r
6806 VOID\r
6807 );\r
6808\r
6809\r
6810/**\r
6811 Executes a INVD instruction.\r
6812\r
6813 Executes a INVD instruction. This function is only available on IA-32 and\r
6814 x64.\r
6815\r
6816**/\r
6817VOID\r
6818EFIAPI\r
6819AsmInvd (\r
6820 VOID\r
6821 );\r
6822\r
6823\r
6824/**\r
6825 Flushes a cache line from all the instruction and data caches within the\r
6826 coherency domain of the CPU.\r
6827\r
6828 Flushed the cache line specified by LinearAddress, and returns LinearAddress.\r
6829 This function is only available on IA-32 and x64.\r
6830\r
6831 @param LinearAddress The address of the cache line to flush. If the CPU is\r
6832 in a physical addressing mode, then LinearAddress is a\r
6833 physical address. If the CPU is in a virtual\r
6834 addressing mode, then LinearAddress is a virtual\r
6835 address.\r
6836\r
6837 @return LinearAddress\r
6838**/\r
6839VOID *\r
6840EFIAPI\r
6841AsmFlushCacheLine (\r
6842 IN VOID *LinearAddress\r
6843 );\r
6844\r
6845\r
6846/**\r
6847 Enables the 32-bit paging mode on the CPU.\r
6848\r
6849 Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
6850 must be properly initialized prior to calling this service. This function\r
6851 assumes the current execution mode is 32-bit protected mode. This function is\r
6852 only available on IA-32. After the 32-bit paging mode is enabled, control is\r
6853 transferred to the function specified by EntryPoint using the new stack\r
6854 specified by NewStack and passing in the parameters specified by Context1 and\r
6855 Context2. Context1 and Context2 are optional and may be NULL. The function\r
6856 EntryPoint must never return.\r
6857\r
6858 If the current execution mode is not 32-bit protected mode, then ASSERT().\r
6859 If EntryPoint is NULL, then ASSERT().\r
6860 If NewStack is NULL, then ASSERT().\r
6861\r
6862 There are a number of constraints that must be followed before calling this\r
6863 function:\r
6864 1) Interrupts must be disabled.\r
6865 2) The caller must be in 32-bit protected mode with flat descriptors. This\r
6866 means all descriptors must have a base of 0 and a limit of 4GB.\r
6867 3) CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
6868 descriptors.\r
6869 4) CR3 must point to valid page tables that will be used once the transition\r
6870 is complete, and those page tables must guarantee that the pages for this\r
6871 function and the stack are identity mapped.\r
6872\r
6873 @param EntryPoint A pointer to function to call with the new stack after\r
6874 paging is enabled.\r
6875 @param Context1 A pointer to the context to pass into the EntryPoint\r
6876 function as the first parameter after paging is enabled.\r
6877 @param Context2 A pointer to the context to pass into the EntryPoint\r
6878 function as the second parameter after paging is enabled.\r
6879 @param NewStack A pointer to the new stack to use for the EntryPoint\r
6880 function after paging is enabled.\r
6881\r
6882**/\r
6883VOID\r
6884EFIAPI\r
6885AsmEnablePaging32 (\r
6886 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
6887 IN VOID *Context1, OPTIONAL\r
6888 IN VOID *Context2, OPTIONAL\r
6889 IN VOID *NewStack\r
6890 );\r
6891\r
6892\r
6893/**\r
6894 Disables the 32-bit paging mode on the CPU.\r
6895\r
6896 Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
6897 mode. This function assumes the current execution mode is 32-paged protected\r
6898 mode. This function is only available on IA-32. After the 32-bit paging mode\r
6899 is disabled, control is transferred to the function specified by EntryPoint\r
6900 using the new stack specified by NewStack and passing in the parameters\r
6901 specified by Context1 and Context2. Context1 and Context2 are optional and\r
6902 may be NULL. The function EntryPoint must never return.\r
6903\r
6904 If the current execution mode is not 32-bit paged mode, then ASSERT().\r
6905 If EntryPoint is NULL, then ASSERT().\r
6906 If NewStack is NULL, then ASSERT().\r
6907\r
6908 There are a number of constraints that must be followed before calling this\r
6909 function:\r
6910 1) Interrupts must be disabled.\r
6911 2) The caller must be in 32-bit paged mode.\r
6912 3) CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
6913 4) CR3 must point to valid page tables that guarantee that the pages for\r
6914 this function and the stack are identity mapped.\r
6915\r
6916 @param EntryPoint A pointer to function to call with the new stack after\r
6917 paging is disabled.\r
6918 @param Context1 A pointer to the context to pass into the EntryPoint\r
6919 function as the first parameter after paging is disabled.\r
6920 @param Context2 A pointer to the context to pass into the EntryPoint\r
6921 function as the second parameter after paging is\r
6922 disabled.\r
6923 @param NewStack A pointer to the new stack to use for the EntryPoint\r
6924 function after paging is disabled.\r
6925\r
6926**/\r
6927VOID\r
6928EFIAPI\r
6929AsmDisablePaging32 (\r
6930 IN SWITCH_STACK_ENTRY_POINT EntryPoint,\r
6931 IN VOID *Context1, OPTIONAL\r
6932 IN VOID *Context2, OPTIONAL\r
6933 IN VOID *NewStack\r
6934 );\r
6935\r
6936\r
6937/**\r
6938 Enables the 64-bit paging mode on the CPU.\r
6939\r
6940 Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
6941 must be properly initialized prior to calling this service. This function\r
6942 assumes the current execution mode is 32-bit protected mode with flat\r
6943 descriptors. This function is only available on IA-32. After the 64-bit\r
6944 paging mode is enabled, control is transferred to the function specified by\r
6945 EntryPoint using the new stack specified by NewStack and passing in the\r
6946 parameters specified by Context1 and Context2. Context1 and Context2 are\r
6947 optional and may be 0. The function EntryPoint must never return.\r
6948\r
6949 If the current execution mode is not 32-bit protected mode with flat\r
6950 descriptors, then ASSERT().\r
6951 If EntryPoint is 0, then ASSERT().\r
6952 If NewStack is 0, then ASSERT().\r
6953\r
6954 @param Cs The 16-bit selector to load in the CS before EntryPoint\r
6955 is called. The descriptor in the GDT that this selector\r
6956 references must be setup for long mode.\r
6957 @param EntryPoint The 64-bit virtual address of the function to call with\r
6958 the new stack after paging is enabled.\r
6959 @param Context1 The 64-bit virtual address of the context to pass into\r
6960 the EntryPoint function as the first parameter after\r
6961 paging is enabled.\r
6962 @param Context2 The 64-bit virtual address of the context to pass into\r
6963 the EntryPoint function as the second parameter after\r
6964 paging is enabled.\r
6965 @param NewStack The 64-bit virtual address of the new stack to use for\r
6966 the EntryPoint function after paging is enabled.\r
6967\r
6968**/\r
6969VOID\r
6970EFIAPI\r
6971AsmEnablePaging64 (\r
6972 IN UINT16 Cs,\r
6973 IN UINT64 EntryPoint,\r
6974 IN UINT64 Context1, OPTIONAL\r
6975 IN UINT64 Context2, OPTIONAL\r
6976 IN UINT64 NewStack\r
6977 );\r
6978\r
6979\r
6980/**\r
6981 Disables the 64-bit paging mode on the CPU.\r
6982\r
6983 Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
6984 mode. This function assumes the current execution mode is 64-paging mode.\r
6985 This function is only available on x64. After the 64-bit paging mode is\r
6986 disabled, control is transferred to the function specified by EntryPoint\r
6987 using the new stack specified by NewStack and passing in the parameters\r
6988 specified by Context1 and Context2. Context1 and Context2 are optional and\r
6989 may be 0. The function EntryPoint must never return.\r
6990\r
6991 If the current execution mode is not 64-bit paged mode, then ASSERT().\r
6992 If EntryPoint is 0, then ASSERT().\r
6993 If NewStack is 0, then ASSERT().\r
6994\r
6995 @param Cs The 16-bit selector to load in the CS before EntryPoint\r
6996 is called. The descriptor in the GDT that this selector\r
6997 references must be setup for 32-bit protected mode.\r
6998 @param EntryPoint The 64-bit virtual address of the function to call with\r
6999 the new stack after paging is disabled.\r
7000 @param Context1 The 64-bit virtual address of the context to pass into\r
7001 the EntryPoint function as the first parameter after\r
7002 paging is disabled.\r
7003 @param Context2 The 64-bit virtual address of the context to pass into\r
7004 the EntryPoint function as the second parameter after\r
7005 paging is disabled.\r
7006 @param NewStack The 64-bit virtual address of the new stack to use for\r
7007 the EntryPoint function after paging is disabled.\r
7008\r
7009**/\r
7010VOID\r
7011EFIAPI\r
7012AsmDisablePaging64 (\r
7013 IN UINT16 Cs,\r
7014 IN UINT32 EntryPoint,\r
7015 IN UINT32 Context1, OPTIONAL\r
7016 IN UINT32 Context2, OPTIONAL\r
7017 IN UINT32 NewStack\r
7018 );\r
7019\r
7020\r
7021//\r
7022// 16-bit thunking services\r
7023//\r
7024\r
7025/**\r
7026 Retrieves the properties for 16-bit thunk functions.\r
7027\r
7028 Computes the size of the buffer and stack below 1MB required to use the\r
7029 AsmPrepareThunk16(), AsmThunk16() and AsmPrepareAndThunk16() functions. This\r
7030 buffer size is returned in RealModeBufferSize, and the stack size is returned\r
7031 in ExtraStackSize. If parameters are passed to the 16-bit real mode code,\r
7032 then the actual minimum stack size is ExtraStackSize plus the maximum number\r
7033 of bytes that need to be passed to the 16-bit real mode code.\r
7034 \r
7035 If RealModeBufferSize is NULL, then ASSERT().\r
7036 If ExtraStackSize is NULL, then ASSERT().\r
7037\r
7038 @param RealModeBufferSize A pointer to the size of the buffer below 1MB\r
7039 required to use the 16-bit thunk functions.\r
7040 @param ExtraStackSize A pointer to the extra size of stack below 1MB\r
7041 that the 16-bit thunk functions require for\r
7042 temporary storage in the transition to and from\r
7043 16-bit real mode.\r
7044\r
7045**/\r
7046VOID\r
7047EFIAPI\r
7048AsmGetThunk16Properties (\r
7049 OUT UINT32 *RealModeBufferSize,\r
7050 OUT UINT32 *ExtraStackSize\r
7051 );\r
7052\r
7053\r
7054/**\r
7055 Prepares all structures a code required to use AsmThunk16().\r
7056\r
7057 Prepares all structures and code required to use AsmThunk16().\r
7058 \r
7059 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
7060 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
7061\r
7062 If ThunkContext is NULL, then ASSERT().\r
7063\r
7064 @param ThunkContext A pointer to the context structure that describes the\r
7065 16-bit real mode code to call.\r
7066\r
7067**/\r
7068VOID\r
7069EFIAPI\r
7070AsmPrepareThunk16 (\r
7071 OUT THUNK_CONTEXT *ThunkContext\r
7072 );\r
7073\r
7074\r
7075/**\r
7076 Transfers control to a 16-bit real mode entry point and returns the results.\r
7077\r
7078 Transfers control to a 16-bit real mode entry point and returns the results.\r
7079 AsmPrepareThunk16() must be called with ThunkContext before this function is used.\r
7080 This function must be called with interrupts disabled.\r
7081\r
7082 The register state from the RealModeState field of ThunkContext is restored just prior \r
7083 to calling the 16-bit real mode entry point. This includes the EFLAGS field of RealModeState, \r
7084 which is used to set the interrupt state when a 16-bit real mode entry point is called.\r
7085 Control is transferred to the 16-bit real mode entry point specified by the CS and Eip fields of RealModeState.\r
7086 The stack is initialized to the SS and ESP fields of RealModeState. Any parameters passed to \r
7087 the 16-bit real mode code must be populated by the caller at SS:ESP prior to calling this function. \r
7088 The 16-bit real mode entry point is invoked with a 16-bit CALL FAR instruction,\r
7089 so when accessing stack contents, the 16-bit real mode code must account for the 16-bit segment \r
7090 and 16-bit offset of the return address that were pushed onto the stack. The 16-bit real mode entry \r
7091 point must exit with a RETF instruction. The register state is captured into RealModeState immediately \r
7092 after the RETF instruction is executed.\r
7093 \r
7094 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
7095 or any of the 16-bit real mode code makes a SW interrupt, then the caller is responsible for making sure \r
7096 the IDT at address 0 is initialized to handle any HW or SW interrupts that may occur while in 16-bit real mode. \r
7097 \r
7098 If EFLAGS specifies interrupts enabled, or any of the 16-bit real mode code enables interrupts, \r
7099 then the caller is responsible for making sure the 8259 PIC is in a state compatible with 16-bit real mode. \r
7100 This includes the base vectors, the interrupt masks, and the edge/level trigger mode.\r
7101 \r
7102 If THUNK_ATTRIBUTE_BIG_REAL_MODE is set in the ThunkAttributes field of ThunkContext, then the user code \r
7103 is invoked in big real mode. Otherwise, the user code is invoked in 16-bit real mode with 64KB segment limits.\r
7104 \r
7105 If neither THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 nor THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
7106 ThunkAttributes, then it is assumed that the user code did not enable the A20 mask, and no attempt is made to \r
7107 disable the A20 mask.\r
7108 \r
7109 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is set and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is clear in \r
7110 ThunkAttributes, then attempt to use the INT 15 service to disable the A20 mask. If this INT 15 call fails, \r
7111 then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
7112 \r
7113 If THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 is clear and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL is set in \r
7114 ThunkAttributes, then attempt to disable the A20 mask by directly accessing the 8042 keyboard controller I/O ports.\r
7115 \r
7116 If ThunkContext is NULL, then ASSERT().\r
7117 If AsmPrepareThunk16() was not previously called with ThunkContext, then ASSERT().\r
7118 If both THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15 and THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL are set in \r
7119 ThunkAttributes, then ASSERT().\r
7120\r
7121 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
7122 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
7123\r
7124 @param ThunkContext A pointer to the context structure that describes the\r
7125 16-bit real mode code to call.\r
7126\r
7127**/\r
7128VOID\r
7129EFIAPI\r
7130AsmThunk16 (\r
7131 IN OUT THUNK_CONTEXT *ThunkContext\r
7132 );\r
7133\r
7134\r
7135/**\r
7136 Prepares all structures and code for a 16-bit real mode thunk, transfers\r
7137 control to a 16-bit real mode entry point, and returns the results.\r
7138\r
7139 Prepares all structures and code for a 16-bit real mode thunk, transfers\r
7140 control to a 16-bit real mode entry point, and returns the results. If the\r
7141 caller only need to perform a single 16-bit real mode thunk, then this\r
7142 service should be used. If the caller intends to make more than one 16-bit\r
7143 real mode thunk, then it is more efficient if AsmPrepareThunk16() is called\r
7144 once and AsmThunk16() can be called for each 16-bit real mode thunk.\r
7145\r
7146 This interface is limited to be used in either physical mode or virtual modes with paging enabled where the\r
7147 virtual to physical mappings for ThunkContext.RealModeBuffer is mapped 1:1.\r
7148\r
7149 See AsmPrepareThunk16() and AsmThunk16() for the detailed description and ASSERT() conditions.\r
7150\r
7151 @param ThunkContext A pointer to the context structure that describes the\r
7152 16-bit real mode code to call.\r
7153\r
7154**/\r
7155VOID\r
7156EFIAPI\r
7157AsmPrepareAndThunk16 (\r
7158 IN OUT THUNK_CONTEXT *ThunkContext\r
7159 );\r
7160\r
7161#endif\r
7162#endif\r
7163\r
7164\r
EFI Development Kit II mirror for PVE