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Commit | Line | Data |
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1 | ## @file\r | |
2 | # Base Library implementation.\r | |
3 | #\r | |
4 | # Copyright (c) 2007 - 2020, Intel Corporation. All rights reserved.<BR>\r | |
5 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r | |
6 | # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r | |
7 | # Copyright (c) 2020, Hewlett Packard Enterprise Development LP. All rights reserved.<BR>\r | |
8 | #\r | |
9 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
10 | #\r | |
11 | #\r | |
12 | ##\r | |
13 | \r | |
14 | [Defines]\r | |
15 | INF_VERSION = 0x00010005\r | |
16 | BASE_NAME = BaseLib\r | |
17 | MODULE_UNI_FILE = BaseLib.uni\r | |
18 | FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30\r | |
19 | MODULE_TYPE = BASE\r | |
20 | VERSION_STRING = 1.1\r | |
21 | LIBRARY_CLASS = BaseLib\r | |
22 | \r | |
23 | #\r | |
24 | # VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64 RISCV64\r | |
25 | #\r | |
26 | \r | |
27 | [Sources]\r | |
28 | CheckSum.c\r | |
29 | SwitchStack.c\r | |
30 | SwapBytes64.c\r | |
31 | SwapBytes32.c\r | |
32 | SwapBytes16.c\r | |
33 | LongJump.c\r | |
34 | SetJump.c\r | |
35 | RShiftU64.c\r | |
36 | RRotU64.c\r | |
37 | RRotU32.c\r | |
38 | MultU64x64.c\r | |
39 | MultU64x32.c\r | |
40 | MultS64x64.c\r | |
41 | ModU64x32.c\r | |
42 | LShiftU64.c\r | |
43 | LRotU64.c\r | |
44 | LRotU32.c\r | |
45 | LowBitSet64.c\r | |
46 | LowBitSet32.c\r | |
47 | HighBitSet64.c\r | |
48 | HighBitSet32.c\r | |
49 | GetPowerOfTwo64.c\r | |
50 | GetPowerOfTwo32.c\r | |
51 | DivU64x64Remainder.c\r | |
52 | DivU64x32Remainder.c\r | |
53 | DivU64x32.c\r | |
54 | DivS64x64Remainder.c\r | |
55 | ARShiftU64.c\r | |
56 | BitField.c\r | |
57 | CpuDeadLoop.c\r | |
58 | Cpu.c\r | |
59 | LinkedList.c\r | |
60 | SafeString.c\r | |
61 | String.c\r | |
62 | FilePaths.c\r | |
63 | BaseLibInternals.h\r | |
64 | \r | |
65 | [Sources.Ia32]\r | |
66 | Ia32/WriteTr.nasm\r | |
67 | Ia32/Lfence.nasm\r | |
68 | \r | |
69 | Ia32/Wbinvd.c | MSFT\r | |
70 | Ia32/WriteMm7.c | MSFT\r | |
71 | Ia32/WriteMm6.c | MSFT\r | |
72 | Ia32/WriteMm5.c | MSFT\r | |
73 | Ia32/WriteMm4.c | MSFT\r | |
74 | Ia32/WriteMm3.c | MSFT\r | |
75 | Ia32/WriteMm2.c | MSFT\r | |
76 | Ia32/WriteMm1.c | MSFT\r | |
77 | Ia32/WriteMm0.c | MSFT\r | |
78 | Ia32/WriteLdtr.c | MSFT\r | |
79 | Ia32/WriteIdtr.c | MSFT\r | |
80 | Ia32/WriteGdtr.c | MSFT\r | |
81 | Ia32/WriteDr7.c | MSFT\r | |
82 | Ia32/WriteDr6.c | MSFT\r | |
83 | Ia32/WriteDr5.c | MSFT\r | |
84 | Ia32/WriteDr4.c | MSFT\r | |
85 | Ia32/WriteDr3.c | MSFT\r | |
86 | Ia32/WriteDr2.c | MSFT\r | |
87 | Ia32/WriteDr1.c | MSFT\r | |
88 | Ia32/WriteDr0.c | MSFT\r | |
89 | Ia32/WriteCr4.c | MSFT\r | |
90 | Ia32/WriteCr3.c | MSFT\r | |
91 | Ia32/WriteCr2.c | MSFT\r | |
92 | Ia32/WriteCr0.c | MSFT\r | |
93 | Ia32/WriteMsr64.c | MSFT\r | |
94 | Ia32/SwapBytes64.c | MSFT\r | |
95 | Ia32/RRotU64.c | MSFT\r | |
96 | Ia32/RShiftU64.c | MSFT\r | |
97 | Ia32/ReadPmc.c | MSFT\r | |
98 | Ia32/ReadTsc.c | MSFT\r | |
99 | Ia32/ReadLdtr.c | MSFT\r | |
100 | Ia32/ReadIdtr.c | MSFT\r | |
101 | Ia32/ReadGdtr.c | MSFT\r | |
102 | Ia32/ReadTr.c | MSFT\r | |
103 | Ia32/ReadSs.c | MSFT\r | |
104 | Ia32/ReadGs.c | MSFT\r | |
105 | Ia32/ReadFs.c | MSFT\r | |
106 | Ia32/ReadEs.c | MSFT\r | |
107 | Ia32/ReadDs.c | MSFT\r | |
108 | Ia32/ReadCs.c | MSFT\r | |
109 | Ia32/ReadMsr64.c | MSFT\r | |
110 | Ia32/ReadMm7.c | MSFT\r | |
111 | Ia32/ReadMm6.c | MSFT\r | |
112 | Ia32/ReadMm5.c | MSFT\r | |
113 | Ia32/ReadMm4.c | MSFT\r | |
114 | Ia32/ReadMm3.c | MSFT\r | |
115 | Ia32/ReadMm2.c | MSFT\r | |
116 | Ia32/ReadMm1.c | MSFT\r | |
117 | Ia32/ReadMm0.c | MSFT\r | |
118 | Ia32/ReadEflags.c | MSFT\r | |
119 | Ia32/ReadDr7.c | MSFT\r | |
120 | Ia32/ReadDr6.c | MSFT\r | |
121 | Ia32/ReadDr5.c | MSFT\r | |
122 | Ia32/ReadDr4.c | MSFT\r | |
123 | Ia32/ReadDr3.c | MSFT\r | |
124 | Ia32/ReadDr2.c | MSFT\r | |
125 | Ia32/ReadDr1.c | MSFT\r | |
126 | Ia32/ReadDr0.c | MSFT\r | |
127 | Ia32/ReadCr4.c | MSFT\r | |
128 | Ia32/ReadCr3.c | MSFT\r | |
129 | Ia32/ReadCr2.c | MSFT\r | |
130 | Ia32/ReadCr0.c | MSFT\r | |
131 | Ia32/Mwait.c | MSFT\r | |
132 | Ia32/Monitor.c | MSFT\r | |
133 | Ia32/ModU64x32.c | MSFT\r | |
134 | Ia32/MultU64x64.c | MSFT\r | |
135 | Ia32/MultU64x32.c | MSFT\r | |
136 | Ia32/LShiftU64.c | MSFT\r | |
137 | Ia32/LRotU64.c | MSFT\r | |
138 | Ia32/Invd.c | MSFT\r | |
139 | Ia32/FxRestore.c | MSFT\r | |
140 | Ia32/FxSave.c | MSFT\r | |
141 | Ia32/FlushCacheLine.c | MSFT\r | |
142 | Ia32/EnablePaging32.c | MSFT\r | |
143 | Ia32/EnableInterrupts.c | MSFT\r | |
144 | Ia32/EnableDisableInterrupts.c | MSFT\r | |
145 | Ia32/DivU64x32Remainder.c | MSFT\r | |
146 | Ia32/DivU64x32.c | MSFT\r | |
147 | Ia32/DisablePaging32.c | MSFT\r | |
148 | Ia32/DisableInterrupts.c | MSFT\r | |
149 | Ia32/CpuPause.c | MSFT\r | |
150 | Ia32/CpuIdEx.c | MSFT\r | |
151 | Ia32/CpuId.c | MSFT\r | |
152 | Ia32/CpuBreakpoint.c | MSFT\r | |
153 | Ia32/ARShiftU64.c | MSFT\r | |
154 | Ia32/EnableCache.c | MSFT\r | |
155 | Ia32/DisableCache.c | MSFT\r | |
156 | \r | |
157 | \r | |
158 | Ia32/GccInline.c | GCC\r | |
159 | Ia32/GccInlinePriv.c | GCC\r | |
160 | Ia32/Thunk16.nasm\r | |
161 | Ia32/EnableDisableInterrupts.nasm| GCC\r | |
162 | Ia32/EnablePaging64.nasm\r | |
163 | Ia32/DisablePaging32.nasm| GCC\r | |
164 | Ia32/EnablePaging32.nasm| GCC\r | |
165 | Ia32/Mwait.nasm| GCC\r | |
166 | Ia32/Monitor.nasm| GCC\r | |
167 | Ia32/CpuIdEx.nasm| GCC\r | |
168 | Ia32/CpuId.nasm| GCC\r | |
169 | Ia32/LongJump.nasm\r | |
170 | Ia32/SetJump.nasm\r | |
171 | Ia32/SwapBytes64.nasm| GCC\r | |
172 | Ia32/DivU64x64Remainder.nasm\r | |
173 | Ia32/DivU64x32Remainder.nasm| GCC\r | |
174 | Ia32/ModU64x32.nasm| GCC\r | |
175 | Ia32/DivU64x32.nasm| GCC\r | |
176 | Ia32/MultU64x64.nasm| GCC\r | |
177 | Ia32/MultU64x32.nasm| GCC\r | |
178 | Ia32/RRotU64.nasm| GCC\r | |
179 | Ia32/LRotU64.nasm| GCC\r | |
180 | Ia32/ARShiftU64.nasm| GCC\r | |
181 | Ia32/RShiftU64.nasm| GCC\r | |
182 | Ia32/LShiftU64.nasm| GCC\r | |
183 | Ia32/EnableCache.nasm| GCC\r | |
184 | Ia32/DisableCache.nasm| GCC\r | |
185 | Ia32/RdRand.nasm\r | |
186 | Ia32/XGetBv.nasm\r | |
187 | \r | |
188 | Ia32/DivS64x64Remainder.c\r | |
189 | Ia32/InternalSwitchStack.c | MSFT\r | |
190 | Ia32/InternalSwitchStack.nasm | GCC\r | |
191 | Ia32/Non-existing.c\r | |
192 | Unaligned.c\r | |
193 | X86WriteIdtr.c\r | |
194 | X86WriteGdtr.c\r | |
195 | X86Thunk.c\r | |
196 | X86ReadIdtr.c\r | |
197 | X86ReadGdtr.c\r | |
198 | X86Msr.c\r | |
199 | X86MemoryFence.c | MSFT\r | |
200 | X86GetInterruptState.c\r | |
201 | X86FxSave.c\r | |
202 | X86FxRestore.c\r | |
203 | X86EnablePaging64.c\r | |
204 | X86EnablePaging32.c\r | |
205 | X86DisablePaging64.c\r | |
206 | X86DisablePaging32.c\r | |
207 | X86RdRand.c\r | |
208 | X86PatchInstruction.c\r | |
209 | X86SpeculationBarrier.c\r | |
210 | \r | |
211 | [Sources.X64]\r | |
212 | X64/Thunk16.nasm\r | |
213 | X64/CpuIdEx.nasm\r | |
214 | X64/CpuId.nasm\r | |
215 | X64/LongJump.nasm\r | |
216 | X64/SetJump.nasm\r | |
217 | X64/SwitchStack.nasm\r | |
218 | X64/EnableCache.nasm\r | |
219 | X64/DisableCache.nasm\r | |
220 | X64/WriteTr.nasm\r | |
221 | X64/Lfence.nasm\r | |
222 | \r | |
223 | X64/CpuBreakpoint.c | MSFT\r | |
224 | X64/WriteMsr64.c | MSFT\r | |
225 | X64/ReadMsr64.c | MSFT\r | |
226 | X64/CpuPause.nasm| MSFT\r | |
227 | X64/DisableInterrupts.nasm| MSFT\r | |
228 | X64/EnableInterrupts.nasm| MSFT\r | |
229 | X64/FlushCacheLine.nasm| MSFT\r | |
230 | X64/Invd.nasm| MSFT\r | |
231 | X64/Wbinvd.nasm| MSFT\r | |
232 | X64/Mwait.nasm| MSFT\r | |
233 | X64/Monitor.nasm| MSFT\r | |
234 | X64/ReadPmc.nasm| MSFT\r | |
235 | X64/ReadTsc.nasm| MSFT\r | |
236 | X64/WriteMm7.nasm| MSFT\r | |
237 | X64/WriteMm6.nasm| MSFT\r | |
238 | X64/WriteMm5.nasm| MSFT\r | |
239 | X64/WriteMm4.nasm| MSFT\r | |
240 | X64/WriteMm3.nasm| MSFT\r | |
241 | X64/WriteMm2.nasm| MSFT\r | |
242 | X64/WriteMm1.nasm| MSFT\r | |
243 | X64/WriteMm0.nasm| MSFT\r | |
244 | X64/ReadMm7.nasm| MSFT\r | |
245 | X64/ReadMm6.nasm| MSFT\r | |
246 | X64/ReadMm5.nasm| MSFT\r | |
247 | X64/ReadMm4.nasm| MSFT\r | |
248 | X64/ReadMm3.nasm| MSFT\r | |
249 | X64/ReadMm2.nasm| MSFT\r | |
250 | X64/ReadMm1.nasm| MSFT\r | |
251 | X64/ReadMm0.nasm| MSFT\r | |
252 | X64/FxRestore.nasm| MSFT\r | |
253 | X64/FxSave.nasm| MSFT\r | |
254 | X64/WriteLdtr.nasm| MSFT\r | |
255 | X64/ReadLdtr.nasm| MSFT\r | |
256 | X64/WriteIdtr.nasm| MSFT\r | |
257 | X64/ReadIdtr.nasm| MSFT\r | |
258 | X64/WriteGdtr.nasm| MSFT\r | |
259 | X64/ReadGdtr.nasm| MSFT\r | |
260 | X64/ReadTr.nasm| MSFT\r | |
261 | X64/ReadSs.nasm| MSFT\r | |
262 | X64/ReadGs.nasm| MSFT\r | |
263 | X64/ReadFs.nasm| MSFT\r | |
264 | X64/ReadEs.nasm| MSFT\r | |
265 | X64/ReadDs.nasm| MSFT\r | |
266 | X64/ReadCs.nasm| MSFT\r | |
267 | X64/WriteDr7.nasm| MSFT\r | |
268 | X64/WriteDr6.nasm| MSFT\r | |
269 | X64/WriteDr5.nasm| MSFT\r | |
270 | X64/WriteDr4.nasm| MSFT\r | |
271 | X64/WriteDr3.nasm| MSFT\r | |
272 | X64/WriteDr2.nasm| MSFT\r | |
273 | X64/WriteDr1.nasm| MSFT\r | |
274 | X64/WriteDr0.nasm| MSFT\r | |
275 | X64/ReadDr7.nasm| MSFT\r | |
276 | X64/ReadDr6.nasm| MSFT\r | |
277 | X64/ReadDr5.nasm| MSFT\r | |
278 | X64/ReadDr4.nasm| MSFT\r | |
279 | X64/ReadDr3.nasm| MSFT\r | |
280 | X64/ReadDr2.nasm| MSFT\r | |
281 | X64/ReadDr1.nasm| MSFT\r | |
282 | X64/ReadDr0.nasm| MSFT\r | |
283 | X64/WriteCr4.nasm| MSFT\r | |
284 | X64/WriteCr3.nasm| MSFT\r | |
285 | X64/WriteCr2.nasm| MSFT\r | |
286 | X64/WriteCr0.nasm| MSFT\r | |
287 | X64/ReadCr4.nasm| MSFT\r | |
288 | X64/ReadCr3.nasm| MSFT\r | |
289 | X64/ReadCr2.nasm| MSFT\r | |
290 | X64/ReadCr0.nasm| MSFT\r | |
291 | X64/ReadEflags.nasm| MSFT\r | |
292 | \r | |
293 | \r | |
294 | X64/Non-existing.c\r | |
295 | Math64.c\r | |
296 | Unaligned.c\r | |
297 | X86WriteIdtr.c\r | |
298 | X86WriteGdtr.c\r | |
299 | X86Thunk.c\r | |
300 | X86ReadIdtr.c\r | |
301 | X86ReadGdtr.c\r | |
302 | X86Msr.c\r | |
303 | X86MemoryFence.c | MSFT\r | |
304 | X86GetInterruptState.c\r | |
305 | X86FxSave.c\r | |
306 | X86FxRestore.c\r | |
307 | X86EnablePaging64.c\r | |
308 | X86EnablePaging32.c\r | |
309 | X86DisablePaging64.c\r | |
310 | X86DisablePaging32.c\r | |
311 | X86RdRand.c\r | |
312 | X86PatchInstruction.c\r | |
313 | X86SpeculationBarrier.c\r | |
314 | X64/GccInline.c | GCC\r | |
315 | X64/GccInlinePriv.c | GCC\r | |
316 | X64/EnableDisableInterrupts.nasm\r | |
317 | X64/DisablePaging64.nasm\r | |
318 | X64/RdRand.nasm\r | |
319 | X64/XGetBv.nasm\r | |
320 | ChkStkGcc.c | GCC\r | |
321 | \r | |
322 | [Sources.EBC]\r | |
323 | Ebc/CpuBreakpoint.c\r | |
324 | Ebc/SetJumpLongJump.c\r | |
325 | Ebc/SwitchStack.c\r | |
326 | Ebc/SpeculationBarrier.c\r | |
327 | Unaligned.c\r | |
328 | Math64.c\r | |
329 | \r | |
330 | [Sources.ARM]\r | |
331 | Arm/InternalSwitchStack.c\r | |
332 | Arm/Unaligned.c\r | |
333 | Math64.c | RVCT\r | |
334 | Math64.c | MSFT\r | |
335 | \r | |
336 | Arm/SwitchStack.asm | RVCT\r | |
337 | Arm/SetJumpLongJump.asm | RVCT\r | |
338 | Arm/DisableInterrupts.asm | RVCT\r | |
339 | Arm/EnableInterrupts.asm | RVCT\r | |
340 | Arm/GetInterruptsState.asm | RVCT\r | |
341 | Arm/CpuPause.asm | RVCT\r | |
342 | Arm/CpuBreakpoint.asm | RVCT\r | |
343 | Arm/MemoryFence.asm | RVCT\r | |
344 | Arm/SpeculationBarrier.S | RVCT\r | |
345 | \r | |
346 | Arm/SwitchStack.asm | MSFT\r | |
347 | Arm/SetJumpLongJump.asm | MSFT\r | |
348 | Arm/DisableInterrupts.asm | MSFT\r | |
349 | Arm/EnableInterrupts.asm | MSFT\r | |
350 | Arm/GetInterruptsState.asm | MSFT\r | |
351 | Arm/CpuPause.asm | MSFT\r | |
352 | Arm/CpuBreakpoint.asm | MSFT\r | |
353 | Arm/MemoryFence.asm | MSFT\r | |
354 | Arm/SpeculationBarrier.asm | MSFT\r | |
355 | \r | |
356 | Arm/Math64.S | GCC\r | |
357 | Arm/SwitchStack.S | GCC\r | |
358 | Arm/EnableInterrupts.S | GCC\r | |
359 | Arm/DisableInterrupts.S | GCC\r | |
360 | Arm/GetInterruptsState.S | GCC\r | |
361 | Arm/SetJumpLongJump.S | GCC\r | |
362 | Arm/CpuBreakpoint.S | GCC\r | |
363 | Arm/MemoryFence.S | GCC\r | |
364 | Arm/SpeculationBarrier.S | GCC\r | |
365 | \r | |
366 | [Sources.AARCH64]\r | |
367 | Arm/InternalSwitchStack.c\r | |
368 | Arm/Unaligned.c\r | |
369 | Math64.c\r | |
370 | \r | |
371 | AArch64/MemoryFence.S | GCC\r | |
372 | AArch64/SwitchStack.S | GCC\r | |
373 | AArch64/EnableInterrupts.S | GCC\r | |
374 | AArch64/DisableInterrupts.S | GCC\r | |
375 | AArch64/GetInterruptsState.S | GCC\r | |
376 | AArch64/SetJumpLongJump.S | GCC\r | |
377 | AArch64/CpuBreakpoint.S | GCC\r | |
378 | AArch64/SpeculationBarrier.S | GCC\r | |
379 | \r | |
380 | AArch64/MemoryFence.asm | MSFT\r | |
381 | AArch64/SwitchStack.asm | MSFT\r | |
382 | AArch64/EnableInterrupts.asm | MSFT\r | |
383 | AArch64/DisableInterrupts.asm | MSFT\r | |
384 | AArch64/GetInterruptsState.asm | MSFT\r | |
385 | AArch64/SetJumpLongJump.asm | MSFT\r | |
386 | AArch64/CpuBreakpoint.asm | MSFT\r | |
387 | AArch64/SpeculationBarrier.asm | MSFT\r | |
388 | \r | |
389 | [Sources.RISCV64]\r | |
390 | Math64.c\r | |
391 | Unaligned.c\r | |
392 | RiscV64/InternalSwitchStack.c\r | |
393 | RiscV64/CpuBreakpoint.c\r | |
394 | RiscV64/GetInterruptState.c\r | |
395 | RiscV64/DisableInterrupts.c\r | |
396 | RiscV64/EnableInterrupts.c\r | |
397 | RiscV64/CpuPause.c\r | |
398 | RiscV64/RiscVSetJumpLongJump.S | GCC\r | |
399 | RiscV64/RiscVCpuBreakpoint.S | GCC\r | |
400 | RiscV64/RiscVCpuPause.S | GCC\r | |
401 | RiscV64/RiscVInterrupt.S | GCC\r | |
402 | RiscV64/FlushCache.S | GCC\r | |
403 | \r | |
404 | [Packages]\r | |
405 | MdePkg/MdePkg.dec\r | |
406 | \r | |
407 | [LibraryClasses]\r | |
408 | PcdLib\r | |
409 | DebugLib\r | |
410 | BaseMemoryLib\r | |
411 | \r | |
412 | [Pcd]\r | |
413 | gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength ## SOMETIMES_CONSUMES\r | |
414 | gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength ## SOMETIMES_CONSUMES\r | |
415 | gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength ## SOMETIMES_CONSUMES\r | |
416 | gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask ## SOMETIMES_CONSUMES\r | |
417 | gEfiMdePkgTokenSpaceGuid.PcdSpeculationBarrierType ## SOMETIMES_CONSUMES\r | |
418 | \r | |
419 | [FeaturePcd]\r | |
420 | gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList ## CONSUMES\r |