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UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm
[mirror_edk2.git] / SecurityPkg / Include / Ppi / FirmwareVolumeInfoPrehashedFV.h
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1/** @file\r
2PPI to describe all hash digests for a given FV\r
3\r
4Copyright (c) 2017, Microsoft Corporation\r
5Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
6\r
7SPDX-License-Identifier: BSD-2-Clause-Patent\r
8\r
9**/\r
10\r
11#ifndef __PEI_FIRMWARE_VOLUME_INFO_PREHASHED_FV_H__\r
12#define __PEI_FIRMWARE_VOLUME_INFO_PREHASHED_FV_H__\r
13\r
14#define EDKII_PEI_FIRMWARE_VOLUME_INFO_PREHASHED_FV_PPI_GUID \\r
15 { 0x3ce1e631, 0x7008, 0x477c, { 0xad, 0xa7, 0x5d, 0xcf, 0xc7, 0xc1, 0x49, 0x4b } }\r
16\r
17//\r
18// HashAlgoId is TPM_ALG_ID in Tpm20.h\r
19//\r
20typedef struct _HASH_INFO {\r
21 UINT16 HashAlgoId;\r
22 UINT16 HashSize;\r
23 // UINT8 Hash[];\r
24} HASH_INFO;\r
25\r
26//\r
27// This PPI carries prehashsed data for one FV. Platform should ensure 1:1 mapping between pre-hashed PPI and corresponding FV.\r
28// The Count field in PPI is followed by Count number of FV hash info entries, which can be extended to PCR and logged to TCG event log directly by TCG modules.\r
29// TCG module checks TPM required hash algorithms(PcdTpm2HashMask) with each pre-hashed PPIs\r
30// For each pre-hashed PPI\r
31// If PPI carries hash generated by equivalent or larger algorithm set than TPM required, directly use PPI\r
32// else, drops PPI data and calculate all hash again\r
33//\r
34typedef struct {\r
35 UINT32 FvBase;\r
36 UINT32 FvLength;\r
37 UINT32 Count;\r
38 // HASH_INFO HashInfo[];\r
39} EDKII_PEI_FIRMWARE_VOLUME_INFO_PREHASHED_FV_PPI;\r
40\r
41extern EFI_GUID gEdkiiPeiFirmwareVolumeInfoPrehashedFvPpiGuid;\r
42\r
43#endif\r