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SecurityPkg/Tcg: Fix Warnings and Remarks reported by IASL
[mirror_edk2.git] / SecurityPkg / Tcg / Tcg2Smm / Tpm.asl
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1/** @file\r
2 The TPM2 definition block in ACPI table for TCG2 physical presence\r
3 and MemoryClear.\r
4\r
5Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
6(c)Copyright 2016 HP Development Company, L.P.<BR>\r
7Copyright (c) 2017, Microsoft Corporation. All rights reserved. <BR>\r
8This program and the accompanying materials\r
9are licensed and made available under the terms and conditions of the BSD License\r
10which accompanies this distribution. The full text of the license may be found at\r
11http://opensource.org/licenses/bsd-license.php\r
12\r
13THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
14WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
15\r
16**/\r
17\r
18DefinitionBlock (\r
19 "Tpm.aml",\r
20 "SSDT",\r
21 2,\r
22 "INTEL ",\r
23 "Tpm2Tabl",\r
24 0x1000\r
25 )\r
26{\r
27 Scope (\_SB)\r
28 {\r
29 Device (TPM)\r
30 {\r
31 //\r
32 // TCG2\r
33 //\r
34\r
35 //\r
36 // TAG for patching TPM2.0 _HID\r
37 //\r
38 Name (_HID, "NNNN0000")\r
39\r
40 Name (_CID, "MSFT0101")\r
41\r
42 //\r
43 // Readable name of this device, don't know if this way is correct yet\r
44 //\r
45 Name (_STR, Unicode ("TPM 2.0 Device"))\r
46\r
47 //\r
48 // Operational region for Smi port access\r
49 //\r
50 OperationRegion (SMIP, SystemIO, 0xB2, 1)\r
51 Field (SMIP, ByteAcc, NoLock, Preserve)\r
52 {\r
53 IOB2, 8\r
54 }\r
55\r
56 //\r
57 // Operational region for TPM access\r
58 //\r
59 OperationRegion (TPMR, SystemMemory, 0xfed40000, 0x5000)\r
60 Field (TPMR, AnyAcc, NoLock, Preserve)\r
61 {\r
62 ACC0, 8, // TPM_ACCESS_0\r
63 Offset(0x8),\r
64 INTE, 32, // TPM_INT_ENABLE_0\r
65 INTV, 8, // TPM_INT_VECTOR_0\r
66 Offset(0x10),\r
67 INTS, 32, // TPM_INT_STATUS_0\r
68 INTF, 32, // TPM_INTF_CAPABILITY_0\r
69 STS0, 32, // TPM_STS_0\r
70 Offset(0x24),\r
71 FIFO, 32, // TPM_DATA_FIFO_0\r
72 Offset(0x30),\r
73 TID0, 32, // TPM_INTERFACE_ID_0\r
74 // ignore the rest\r
75 }\r
76\r
77 //\r
78 // Operational region for TPM support, TPM Physical Presence and TPM Memory Clear\r
79 // Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.\r
80 //\r
81 OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)\r
82 Field (TNVS, AnyAcc, NoLock, Preserve)\r
83 {\r
84 PPIN, 8, // Software SMI for Physical Presence Interface\r
85 PPIP, 32, // Used for save physical presence paramter\r
86 PPRP, 32, // Physical Presence request operation response\r
87 PPRQ, 32, // Physical Presence request operation\r
88 PPRM, 32, // Physical Presence request operation parameter\r
89 LPPR, 32, // Last Physical Presence request operation\r
90 FRET, 32, // Physical Presence function return code\r
91 MCIN, 8, // Software SMI for Memory Clear Interface\r
92 MCIP, 32, // Used for save the Mor paramter\r
93 MORD, 32, // Memory Overwrite Request Data\r
94 MRET, 32, // Memory Overwrite function return code\r
95 UCRQ, 32, // Phyical Presence request operation to Get User Confirmation Status\r
96 IRQN, 32, // IRQ Number for _CRS\r
97 SFRB, 8 // Is shortformed Pkglength for resource buffer\r
98 }\r
99\r
100 //\r
101 // Possible resource settings returned by _PRS method\r
102 // RESS : ResourceTemplate with PkgLength <=63\r
103 // RESL : ResourceTemplate with PkgLength > 63\r
104 //\r
105 // The format of the data has to follow the same format as\r
106 // _CRS (according to ACPI spec).\r
107 //\r
108 Name (RESS, ResourceTemplate() {\r
109 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)\r
110 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {1,2,3,4,5,6,7,8,9,10}\r
111 })\r
112\r
113 Name (RESL, ResourceTemplate() {\r
114 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)\r
115 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}\r
116 })\r
117\r
118 //\r
119 // Current resource settings for _CRS method\r
120 //\r
121 Name(RES0, ResourceTemplate () {\r
122 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000, REG0)\r
123 Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , INTR) {12}\r
124 })\r
125\r
126 Name(RES1, ResourceTemplate () {\r
127 Memory32Fixed (ReadWrite, 0xfed40000, 0x5000, REG1)\r
128 })\r
129\r
130\r
131 //\r
132 // Return the resource consumed by TPM device.\r
133 //\r
134 Method(_CRS,0,Serialized)\r
135 {\r
136 //\r
137 // IRQNum = 0 means disable IRQ support\r
138 //\r
139 If (LEqual(IRQN, 0)) {\r
140 Return (RES1)\r
141 }\r
142 Else\r
143 {\r
144 CreateDWordField(RES0, ^INTR._INT, LIRQ)\r
145 Store(IRQN, LIRQ)\r
146 Return (RES0)\r
147 }\r
148 }\r
149\r
150 //\r
151 // Set resources consumed by the TPM device. This is used to\r
152 // assign an interrupt number to the device. The input byte stream\r
153 // has to be the same as returned by _CRS (according to ACPI spec).\r
154 //\r
155 // Platform may choose to override this function with specific interrupt\r
156 // programing logic to replace FIFO/TIS SIRQ registers programing\r
157 //\r
158 Method(_SRS,1,Serialized)\r
159 {\r
160 //\r
161 // Do not configure Interrupt if IRQ Num is configured 0 by default\r
162 //\r
163 If (LNotEqual(IRQN, 0)) {\r
164 //\r
165 // Update resource descriptor\r
166 // Use the field name to identify the offsets in the argument\r
167 // buffer and RES0 buffer.\r
168 //\r
169 CreateDWordField(Arg0, ^INTR._INT, IRQ0)\r
170 CreateDWordField(RES0, ^INTR._INT, LIRQ)\r
171 Store(IRQ0, LIRQ)\r
172 Store(IRQ0, IRQN)\r
173\r
174 CreateBitField(Arg0, ^INTR._HE, ITRG)\r
175 CreateBitField(RES0, ^INTR._HE, LTRG)\r
176 Store(ITRG, LTRG)\r
177\r
178 CreateBitField(Arg0, ^INTR._LL, ILVL)\r
179 CreateBitField(RES0, ^INTR._LL, LLVL)\r
180 Store(ILVL, LLVL)\r
181\r
182 //\r
183 // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest\r
184 // nibble.\r
185 // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active\r
186 // 1111 - FIFO interface as defined in TIS1.3 is active\r
187 //\r
188 If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) {\r
189 //\r
190 // If FIFO interface, interrupt vector register is\r
191 // available. TCG PTP specification allows only\r
192 // values 1..15 in this field. For other interrupts\r
193 // the field should stay 0.\r
194 //\r
195 If (LLess (IRQ0, 16)) {\r
196 Store (And(IRQ0, 0xF), INTV)\r
197 }\r
198 //\r
199 // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4\r
200 // contains settings for interrupt polarity.\r
201 // The other bits of the byte enable individual interrupts.\r
202 // They should be all be zero, but to avoid changing the\r
203 // configuration, the other bits are be preserved.\r
204 // 00 - high level\r
205 // 01 - low level\r
206 // 10 - rising edge\r
207 // 11 - falling edge\r
208 //\r
209 // ACPI spec definitions:\r
210 // _HE: '1' is Edge, '0' is Level\r
211 // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec)\r
212 //\r
213 If (LEqual (ITRG, 1)) {\r
214 Or(INTE, 0x00000010, INTE)\r
215 } Else {\r
216 And(INTE, 0xFFFFFFEF, INTE)\r
217 }\r
218 if (LEqual (ILVL, 0)) {\r
219 Or(INTE, 0x00000008, INTE)\r
220 } Else {\r
221 And(INTE, 0xFFFFFFF7, INTE)\r
222 }\r
223 }\r
224 }\r
225 }\r
226\r
227 Method(_PRS,0,Serialized)\r
228 {\r
229 //\r
230 // IRQNum = 0 means disable IRQ support\r
231 //\r
232 If (LEqual(IRQN, 0)) {\r
233 Return (RES1)\r
234 } ElseIf(LEqual(SFRB, 0)) {\r
235 //\r
236 // Long format. Possible resources PkgLength > 63\r
237 //\r
238 Return (RESL)\r
239 } Else {\r
240 //\r
241 // Short format. Possible resources PkgLength <=63\r
242 //\r
243 Return (RESS)\r
244 }\r
245 }\r
246\r
247 Method (PTS, 1, Serialized)\r
248 {\r
249 //\r
250 // Detect Sx state for MOR, only S4, S5 need to handle\r
251 //\r
252 If (LAnd (LLess (Arg0, 6), LGreater (Arg0, 3)))\r
253 {\r
254 //\r
255 // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.\r
256 //\r
257 If (LNot (And (MORD, 0x10)))\r
258 {\r
259 //\r
260 // Trigger the SMI through ACPI _PTS method.\r
261 //\r
262 Store (0x02, MCIP)\r
263\r
264 //\r
265 // Trigger the SMI interrupt\r
266 //\r
267 Store (MCIN, IOB2)\r
268 }\r
269 }\r
270 Return (0)\r
271 }\r
272\r
273 Method (_STA, 0)\r
274 {\r
275 if (LEqual (ACC0, 0xff))\r
276 {\r
277 Return (0)\r
278 }\r
279 Return (0x0f)\r
280 }\r
281\r
282 //\r
283 // TCG Hardware Information\r
284 //\r
285 Method (HINF, 1, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj}) // IntObj\r
286 {\r
287 //\r
288 // Switch by function index\r
289 //\r
290 Switch (ToInteger(Arg0))\r
291 {\r
292 Case (0)\r
293 {\r
294 //\r
295 // Standard query\r
296 //\r
297 Return (Buffer () {0x03})\r
298 }\r
299 Case (1)\r
300 {\r
301 //\r
302 // Return failure if no TPM present\r
303 //\r
304 Name(TPMV, Package () {0x01, Package () {0x2, 0x0}})\r
305 if (LEqual (_STA (), 0x00))\r
306 {\r
307 Return (Package () {0x00})\r
308 }\r
309\r
310 //\r
311 // Return TPM version\r
312 //\r
313 Return (TPMV)\r
314 }\r
315 Default {BreakPoint}\r
316 }\r
317 Return (Buffer () {0})\r
318 }\r
319\r
320 Name(TPM2, Package (0x02){\r
321 Zero,\r
322 Zero\r
323 })\r
324\r
325 Name(TPM3, Package (0x03){\r
326 Zero,\r
327 Zero,\r
328 Zero\r
329 })\r
330\r
331 //\r
332 // TCG Physical Presence Interface\r
333 //\r
334 Method (TPPI, 2, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj}) // IntObj, PkgObj\r
335 {\r
336 //\r
337 // Switch by function index\r
338 //\r
339 Switch (ToInteger(Arg0))\r
340 {\r
341 Case (0)\r
342 {\r
343 //\r
344 // Standard query, supports function 1-8\r
345 //\r
346 Return (Buffer () {0xFF, 0x01})\r
347 }\r
348 Case (1)\r
349 {\r
350 //\r
351 // a) Get Physical Presence Interface Version\r
352 //\r
353 Return ("$PV")\r
354 }\r
355 Case (2)\r
356 {\r
357 //\r
358 // b) Submit TPM Operation Request to Pre-OS Environment\r
359 //\r
360\r
361 Store (DerefOf (Index (Arg1, 0x00)), PPRQ)\r
362 Store (0, PPRM)\r
363 Store (0x02, PPIP)\r
364\r
365 //\r
366 // Trigger the SMI interrupt\r
367 //\r
368 Store (PPIN, IOB2)\r
369 Return (FRET)\r
370\r
371\r
372 }\r
373 Case (3)\r
374 {\r
375 //\r
376 // c) Get Pending TPM Operation Requested By the OS\r
377 //\r
378\r
379 Store (PPRQ, Index (TPM2, 0x01))\r
380 Return (TPM2)\r
381 }\r
382 Case (4)\r
383 {\r
384 //\r
385 // d) Get Platform-Specific Action to Transition to Pre-OS Environment\r
386 //\r
387 Return (2)\r
388 }\r
389 Case (5)\r
390 {\r
391 //\r
392 // e) Return TPM Operation Response to OS Environment\r
393 //\r
394 Store (0x05, PPIP)\r
395\r
396 //\r
397 // Trigger the SMI interrupt\r
398 //\r
399 Store (PPIN, IOB2)\r
400\r
401 Store (LPPR, Index (TPM3, 0x01))\r
402 Store (PPRP, Index (TPM3, 0x02))\r
403\r
404 Return (TPM3)\r
405 }\r
406 Case (6)\r
407 {\r
408\r
409 //\r
410 // f) Submit preferred user language (Not implemented)\r
411 //\r
412\r
413 Return (3)\r
414\r
415 }\r
416 Case (7)\r
417 {\r
418 //\r
419 // g) Submit TPM Operation Request to Pre-OS Environment 2\r
420 //\r
421 Store (7, PPIP)\r
422 Store (DerefOf (Index (Arg1, 0x00)), PPRQ)\r
423 Store (0, PPRM)\r
424 If (LEqual (PPRQ, 23)) {\r
425 Store (DerefOf (Index (Arg1, 0x01)), PPRM)\r
426 }\r
427\r
428 //\r
429 // Trigger the SMI interrupt\r
430 //\r
431 Store (PPIN, IOB2)\r
432 Return (FRET)\r
433 }\r
434 Case (8)\r
435 {\r
436 //\r
437 // e) Get User Confirmation Status for Operation\r
438 //\r
439 Store (8, PPIP)\r
440 Store (DerefOf (Index (Arg1, 0x00)), UCRQ)\r
441\r
442 //\r
443 // Trigger the SMI interrupt\r
444 //\r
445 Store (PPIN, IOB2)\r
446\r
447 Return (FRET)\r
448 }\r
449\r
450 Default {BreakPoint}\r
451 }\r
452 Return (1)\r
453 }\r
454\r
455 Method (TMCI, 2, Serialized, 0, IntObj, {UnknownObj, UnknownObj}) // IntObj, PkgObj\r
456 {\r
457 //\r
458 // Switch by function index\r
459 //\r
460 Switch (ToInteger (Arg0))\r
461 {\r
462 Case (0)\r
463 {\r
464 //\r
465 // Standard query, supports function 1-1\r
466 //\r
467 Return (Buffer () {0x03})\r
468 }\r
469 Case (1)\r
470 {\r
471 //\r
472 // Save the Operation Value of the Request to MORD (reserved memory)\r
473 //\r
474 Store (DerefOf (Index (Arg1, 0x00)), MORD)\r
475\r
476 //\r
477 // Trigger the SMI through ACPI _DSM method.\r
478 //\r
479 Store (0x01, MCIP)\r
480\r
481 //\r
482 // Trigger the SMI interrupt\r
483 //\r
484 Store (MCIN, IOB2)\r
485 Return (MRET)\r
486 }\r
487 Default {BreakPoint}\r
488 }\r
489 Return (1)\r
490 }\r
491\r
492 Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})\r
493 {\r
494\r
495 //\r
496 // TCG Hardware Information\r
497 //\r
498 If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))\r
499 {\r
500 Return (HINF (Arg2))\r
501 }\r
502\r
503 //\r
504 // TCG Physical Presence Interface\r
505 //\r
506 If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))\r
507 {\r
508 Return (TPPI (Arg2, Arg3))\r
509 }\r
510\r
511 //\r
512 // TCG Memory Clear Interface\r
513 //\r
514 If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))\r
515 {\r
516 Return (TMCI (Arg2, Arg3))\r
517 }\r
518\r
519 Return (Buffer () {0})\r
520 }\r
521 }\r
522 }\r
523}\r
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