SecurityPkg/Tcg/Tcg2Smm/Tpm.asl

   1 /** @file
   2   The TPM2 definition block in ACPI table for TCG2 physical presence
   3   and MemoryClear.
   4
   5 Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>
   6 (c)Copyright 2016 HP Development Company, L.P.<BR>
   7 Copyright (c) 2017, Microsoft Corporation.  All rights reserved. <BR>
   8 This program and the accompanying materials
   9 are licensed and made available under the terms and conditions of the BSD License
  10 which accompanies this distribution.  The full text of the license may be found at
  11 http://opensource.org/licenses/bsd-license.php
  12
  13 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  14 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  15
  16 **/
  17
  18 DefinitionBlock (
  19   "Tpm.aml",
  20   "SSDT",
  21   2,
  22   "INTEL ",
  23   "Tpm2Tabl",
  24   0x1000
  25   )
  26 {
  27   Scope (\_SB)
  28   {
  29     Device (TPM)
  30     {
  31       //
  32       // TCG2
  33       //
  34
  35       //
  36       //  TAG for patching TPM2.0 _HID
  37       //
  38       Name (_HID, "NNNN0000")
  39
  40       Name (_CID, "MSFT0101")
  41
  42       //
  43       // Readable name of this device, don't know if this way is correct yet
  44       //
  45       Name (_STR, Unicode ("TPM 2.0 Device"))
  46
  47       //
  48       // Operational region for Smi port access
  49       //
  50       OperationRegion (SMIP, SystemIO, 0xB2, 1)
  51       Field (SMIP, ByteAcc, NoLock, Preserve)
  52       {
  53           IOB2, 8
  54       }
  55
  56       //
  57       // Operational region for TPM access
  58       //
  59       OperationRegion (TPMR, SystemMemory, 0xfed40000, 0x5000)
  60       Field (TPMR, AnyAcc, NoLock, Preserve)
  61       {
  62         ACC0, 8,  // TPM_ACCESS_0
  63         Offset(0x8),
  64         INTE, 32, // TPM_INT_ENABLE_0
  65         INTV, 8,  // TPM_INT_VECTOR_0
  66         Offset(0x10),
  67         INTS, 32, // TPM_INT_STATUS_0
  68         INTF, 32, // TPM_INTF_CAPABILITY_0
  69         STS0, 32, // TPM_STS_0
  70         Offset(0x24),
  71         FIFO, 32, // TPM_DATA_FIFO_0
  72         Offset(0x30),
  73         TID0, 32, // TPM_INTERFACE_ID_0
  74                   // ignore the rest
  75       }
  76
  77       //
  78       // Operational region for TPM support, TPM Physical Presence and TPM Memory Clear
  79       // Region Offset 0xFFFF0000 and Length 0xF0 will be fixed in C code.
  80       //
  81       OperationRegion (TNVS, SystemMemory, 0xFFFF0000, 0xF0)
  82       Field (TNVS, AnyAcc, NoLock, Preserve)
  83       {
  84         PPIN,   8,  //   Software SMI for Physical Presence Interface
  85         PPIP,   32, //   Used for save physical presence paramter
  86         PPRP,   32, //   Physical Presence request operation response
  87         PPRQ,   32, //   Physical Presence request operation
  88         PPRM,   32, //   Physical Presence request operation parameter
  89         LPPR,   32, //   Last Physical Presence request operation
  90         FRET,   32, //   Physical Presence function return code
  91         MCIN,   8,  //   Software SMI for Memory Clear Interface
  92         MCIP,   32, //   Used for save the Mor paramter
  93         MORD,   32, //   Memory Overwrite Request Data
  94         MRET,   32, //   Memory Overwrite function return code
  95         UCRQ,   32, //   Phyical Presence request operation to Get User Confirmation Status
  96         IRQN,   32, //   IRQ Number for _CRS
  97         SFRB,   8   //   Is shortformed Pkglength for resource buffer
  98       }
  99
 100       //
 101       // Possible resource settings returned by  _PRS method
 102       //   RESS : ResourceTemplate with PkgLength <=63
 103       //   RESL : ResourceTemplate with PkgLength > 63
 104       //
 105       // The format of the data has to follow the same format as
 106       // _CRS (according to ACPI spec).
 107       //
 108       Name (RESS, ResourceTemplate() {
 109         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
 110         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {1,2,3,4,5,6,7,8,9,10}
 111       })
 112
 113       Name (RESL, ResourceTemplate() {
 114         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000)
 115         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , ) {1,2,3,4,5,6,7,8,9,10,11,12,13,14,15}
 116       })
 117
 118       //
 119       // Current resource settings for _CRS method
 120       //
 121       Name(RES0, ResourceTemplate () {
 122         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000, REG0)
 123         Interrupt(ResourceConsumer, Level, ActiveLow, Shared, , , INTR) {12}
 124       })
 125
 126       Name(RES1, ResourceTemplate () {
 127         Memory32Fixed (ReadWrite, 0xfed40000, 0x5000, REG1)
 128       })
 129
 130
 131       //
 132       // Return the resource consumed by TPM device.
 133       //
 134       Method(_CRS,0,Serialized)
 135       {
 136         //
 137         // IRQNum = 0 means disable IRQ support
 138         //
 139         If (LEqual(IRQN, 0)) {
 140           Return (RES1)
 141         }
 142         Else
 143         {
 144           CreateDWordField(RES0, ^INTR._INT, LIRQ)
 145           Store(IRQN, LIRQ)
 146           Return (RES0)
 147         }
 148       }
 149
 150       //
 151       // Set resources consumed by the TPM device. This is used to
 152       // assign an interrupt number to the device. The input byte stream
 153       // has to be the same as returned by _CRS (according to ACPI spec).
 154       //
 155       // Platform may choose to override this function with specific interrupt
 156       // programing logic to replace FIFO/TIS SIRQ registers programing
 157       //
 158       Method(_SRS,1,Serialized)
 159       {
 160         //
 161         // Do not configure Interrupt if IRQ Num is configured 0 by default
 162         //
 163         If (LNotEqual(IRQN, 0)) {
 164           //
 165           // Update resource descriptor
 166           // Use the field name to identify the offsets in the argument
 167           // buffer and RES0 buffer.
 168           //
 169           CreateDWordField(Arg0, ^INTR._INT, IRQ0)
 170           CreateDWordField(RES0, ^INTR._INT, LIRQ)
 171           Store(IRQ0, LIRQ)
 172           Store(IRQ0, IRQN)
 173
 174           CreateBitField(Arg0, ^INTR._HE, ITRG)
 175           CreateBitField(RES0, ^INTR._HE, LTRG)
 176           Store(ITRG, LTRG)
 177
 178           CreateBitField(Arg0, ^INTR._LL, ILVL)
 179           CreateBitField(RES0, ^INTR._LL, LLVL)
 180           Store(ILVL, LLVL)
 181
 182           //
 183           // Update TPM FIFO PTP/TIS interface only, identified by TPM_INTERFACE_ID_x lowest
 184           // nibble.
 185           // 0000 - FIFO interface as defined in PTP for TPM 2.0 is active
 186           // 1111 - FIFO interface as defined in TIS1.3 is active
 187           //
 188           If (LOr(LEqual (And (TID0, 0x0F), 0x00), LEqual (And (TID0, 0x0F), 0x0F))) {
 189             //
 190             // If FIFO interface, interrupt vector register is
 191             // available. TCG PTP specification allows only
 192             // values 1..15 in this field. For other interrupts
 193             // the field should stay 0.
 194             //
 195             If (LLess (IRQ0, 16)) {
 196               Store (And(IRQ0, 0xF), INTV)
 197             }
 198             //
 199             // Interrupt enable register (TPM_INT_ENABLE_x) bits 3:4
 200             // contains settings for interrupt polarity.
 201             // The other bits of the byte enable individual interrupts.
 202             // They should be all be zero, but to avoid changing the
 203             // configuration, the other bits are be preserved.
 204             // 00 - high level
 205             // 01 - low level
 206             // 10 - rising edge
 207             // 11 - falling edge
 208             //
 209             // ACPI spec definitions:
 210             // _HE: '1' is Edge, '0' is Level
 211             // _LL: '1' is ActiveHigh, '0' is ActiveLow (inverted from TCG spec)
 212             //
 213             If (LEqual (ITRG, 1)) {
 214               Or(INTE, 0x00000010, INTE)
 215             } Else {
 216               And(INTE, 0xFFFFFFEF, INTE)
 217             }
 218             if (LEqual (ILVL, 0)) {
 219               Or(INTE, 0x00000008, INTE)
 220             } Else {
 221               And(INTE, 0xFFFFFFF7, INTE)
 222             }
 223           }
 224         }
 225       }
 226
 227       Method(_PRS,0,Serialized)
 228       {
 229         //
 230         // IRQNum = 0 means disable IRQ support
 231         //
 232         If (LEqual(IRQN, 0)) {
 233           Return (RES1)
 234         } ElseIf(LEqual(SFRB, 0)) {
 235           //
 236           // Long format. Possible resources PkgLength > 63
 237           //
 238           Return (RESL)
 239         } Else {
 240           //
 241           // Short format. Possible resources PkgLength <=63
 242           //
 243           Return (RESS)
 244         }
 245       }
 246
 247       Method (PTS, 1, Serialized)
 248       {
 249         //
 250         // Detect Sx state for MOR, only S4, S5 need to handle
 251         //
 252         If (LAnd (LLess (Arg0, 6), LGreater (Arg0, 3)))
 253         {
 254           //
 255           // Bit4 -- DisableAutoDetect. 0 -- Firmware MAY autodetect.
 256           //
 257           If (LNot (And (MORD, 0x10)))
 258           {
 259             //
 260             // Trigger the SMI through ACPI _PTS method.
 261             //
 262             Store (0x02, MCIP)
 263
 264             //
 265             // Trigger the SMI interrupt
 266             //
 267             Store (MCIN, IOB2)
 268           }
 269         }
 270         Return (0)
 271       }
 272
 273       Method (_STA, 0)
 274       {
 275         if (LEqual (ACC0, 0xff))
 276         {
 277             Return (0)
 278         }
 279         Return (0x0f)
 280       }
 281
 282       //
 283       // TCG Hardware Information
 284       //
 285       Method (HINF, 1, Serialized, 0, {BuffObj, PkgObj}, {UnknownObj}) // IntObj
 286       {
 287         //
 288         // Switch by function index
 289         //
 290         Switch (ToInteger(Arg0))
 291         {
 292           Case (0)
 293           {
 294             //
 295             // Standard query
 296             //
 297             Return (Buffer () {0x03})
 298           }
 299           Case (1)
 300           {
 301             //
 302             // Return failure if no TPM present
 303             //
 304             Name(TPMV, Package () {0x01, Package () {0x2, 0x0}})
 305             if (LEqual (_STA (), 0x00))
 306             {
 307               Return (Package () {0x00})
 308             }
 309
 310             //
 311             // Return TPM version
 312             //
 313             Return (TPMV)
 314           }
 315           Default {BreakPoint}
 316         }
 317         Return (Buffer () {0})
 318       }
 319
 320       Name(TPM2, Package (0x02){
 321         Zero,
 322         Zero
 323       })
 324
 325       Name(TPM3, Package (0x03){
 326         Zero,
 327         Zero,
 328         Zero
 329       })
 330
 331       //
 332       // TCG Physical Presence Interface
 333       //
 334       Method (TPPI, 2, Serialized, 0, {BuffObj, PkgObj, IntObj, StrObj}, {UnknownObj, UnknownObj}) // IntObj, PkgObj
 335       {
 336         //
 337         // Switch by function index
 338         //
 339         Switch (ToInteger(Arg0))
 340         {
 341           Case (0)
 342           {
 343             //
 344             // Standard query, supports function 1-8
 345             //
 346             Return (Buffer () {0xFF, 0x01})
 347           }
 348           Case (1)
 349           {
 350             //
 351             // a) Get Physical Presence Interface Version
 352             //
 353             Return ("$PV")
 354           }
 355           Case (2)
 356           {
 357             //
 358             // b) Submit TPM Operation Request to Pre-OS Environment
 359             //
 360
 361             Store (DerefOf (Index (Arg1, 0x00)), PPRQ)
 362             Store (0, PPRM)
 363             Store (0x02, PPIP)
 364
 365             //
 366             // Trigger the SMI interrupt
 367             //
 368             Store (PPIN, IOB2)
 369             Return (FRET)
 370
 371
 372           }
 373           Case (3)
 374           {
 375             //
 376             // c) Get Pending TPM Operation Requested By the OS
 377             //
 378
 379             Store (PPRQ, Index (TPM2, 0x01))
 380             Return (TPM2)
 381           }
 382           Case (4)
 383           {
 384             //
 385             // d) Get Platform-Specific Action to Transition to Pre-OS Environment
 386             //
 387             Return (2)
 388           }
 389           Case (5)
 390           {
 391             //
 392             // e) Return TPM Operation Response to OS Environment
 393             //
 394             Store (0x05, PPIP)
 395
 396             //
 397             // Trigger the SMI interrupt
 398             //
 399             Store (PPIN, IOB2)
 400
 401             Store (LPPR, Index (TPM3, 0x01))
 402             Store (PPRP, Index (TPM3, 0x02))
 403
 404             Return (TPM3)
 405           }
 406           Case (6)
 407           {
 408
 409             //
 410             // f) Submit preferred user language (Not implemented)
 411             //
 412
 413             Return (3)
 414
 415           }
 416           Case (7)
 417           {
 418             //
 419             // g) Submit TPM Operation Request to Pre-OS Environment 2
 420             //
 421             Store (7, PPIP)
 422             Store (DerefOf (Index (Arg1, 0x00)), PPRQ)
 423             Store (0, PPRM)
 424             If (LEqual (PPRQ, 23)) {
 425               Store (DerefOf (Index (Arg1, 0x01)), PPRM)
 426             }
 427
 428             //
 429             // Trigger the SMI interrupt
 430             //
 431             Store (PPIN, IOB2)
 432             Return (FRET)
 433           }
 434           Case (8)
 435           {
 436             //
 437             // e) Get User Confirmation Status for Operation
 438             //
 439             Store (8, PPIP)
 440             Store (DerefOf (Index (Arg1, 0x00)), UCRQ)
 441
 442             //
 443             // Trigger the SMI interrupt
 444             //
 445             Store (PPIN, IOB2)
 446
 447             Return (FRET)
 448           }
 449
 450           Default {BreakPoint}
 451         }
 452         Return (1)
 453       }
 454
 455       Method (TMCI, 2, Serialized, 0, IntObj, {UnknownObj, UnknownObj}) // IntObj, PkgObj
 456       {
 457         //
 458         // Switch by function index
 459         //
 460         Switch (ToInteger (Arg0))
 461         {
 462           Case (0)
 463           {
 464             //
 465             // Standard query, supports function 1-1
 466             //
 467             Return (Buffer () {0x03})
 468           }
 469           Case (1)
 470           {
 471             //
 472             // Save the Operation Value of the Request to MORD (reserved memory)
 473             //
 474             Store (DerefOf (Index (Arg1, 0x00)), MORD)
 475
 476             //
 477             // Trigger the SMI through ACPI _DSM method.
 478             //
 479             Store (0x01, MCIP)
 480
 481             //
 482             // Trigger the SMI interrupt
 483             //
 484             Store (MCIN, IOB2)
 485             Return (MRET)
 486           }
 487           Default {BreakPoint}
 488         }
 489         Return (1)
 490       }
 491
 492       Method (_DSM, 4, Serialized, 0, UnknownObj, {BuffObj, IntObj, IntObj, PkgObj})
 493       {
 494
 495         //
 496         // TCG Hardware Information
 497         //
 498         If(LEqual(Arg0, ToUUID ("cf8e16a5-c1e8-4e25-b712-4f54a96702c8")))
 499         {
 500           Return (HINF (Arg2))
 501         }
 502
 503         //
 504         // TCG Physical Presence Interface
 505         //
 506         If(LEqual(Arg0, ToUUID ("3dddfaa6-361b-4eb4-a424-8d10089d1653")))
 507         {
 508           Return (TPPI (Arg2, Arg3))
 509         }
 510
 511         //
 512         // TCG Memory Clear Interface
 513         //
 514         If(LEqual(Arg0, ToUUID ("376054ed-cc13-4675-901c-4756d7f2d45d")))
 515         {
 516           Return (TMCI (Arg2, Arg3))
 517         }
 518
 519         Return (Buffer () {0})
 520       }
 521     }
 522   }
 523 }