[mirror_edk2.git] / UefiCpuPkg / Library / MpInitLib / X64 / MpEqu.inc

;------------------------------------------------------------------------------ ;\r
; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution.  The full text of the license may be found at\r
; http://opensource.org/licenses/bsd-license.php.\r
;\r
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
; Module Name:\r
;\r
;   MpEqu.inc\r
;\r
; Abstract:\r
;\r
;   This is the equates file for Multiple Processor support\r
;\r
;-------------------------------------------------------------------------------\r
\r
VacantFlag                    equ        00h\r
NotVacantFlag                 equ        0ffh\r
\r
CPU_SWITCH_STATE_IDLE         equ        0\r
CPU_SWITCH_STATE_STORED       equ        1\r
CPU_SWITCH_STATE_LOADED       equ        2\r
\r
LockLocation                  equ        (RendezvousFunnelProcEnd - RendezvousFunnelProcStart)\r
StackStartAddressLocation     equ        LockLocation + 08h\r
StackSizeLocation             equ        LockLocation + 10h\r
ApProcedureLocation           equ        LockLocation + 18h\r
GdtrLocation                  equ        LockLocation + 20h\r
IdtrLocation                  equ        LockLocation + 2Ah\r
BufferStartLocation           equ        LockLocation + 34h\r
ModeOffsetLocation            equ        LockLocation + 3Ch\r
NumApsExecutingLocation       equ        LockLocation + 44h\r
CodeSegmentLocation           equ        LockLocation + 4Ch\r
DataSegmentLocation           equ        LockLocation + 54h\r
EnableExecuteDisableLocation  equ        LockLocation + 5Ch\r
Cr3Location                   equ        LockLocation + 64h\r
InitFlagLocation              equ        LockLocation + 6Ch\r
CpuInfoLocation               equ        LockLocation + 74h\r
InitializeFloatingPointUnitsAddress equ  LockLocation + 84h\r
\r
Commit	Line	Data
	1	;------------------------------------------------------------------------------ ;\r
	2	; Copyright (c) 2015 - 2017, Intel Corporation. All rights reserved.<BR>\r
	3	; This program and the accompanying materials\r
	4	; are licensed and made available under the terms and conditions of the BSD License\r
	5	; which accompanies this distribution. The full text of the license may be found at\r
	6	; http://opensource.org/licenses/bsd-license.php.\r
	7	;\r
	8	; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	9	; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	10	;\r
	11	; Module Name:\r
	12	;\r
	13	; MpEqu.inc\r
	14	;\r
	15	; Abstract:\r
	16	;\r
	17	; This is the equates file for Multiple Processor support\r
	18	;\r
	19	;-------------------------------------------------------------------------------\r
	20	\r
	21	VacantFlag equ 00h\r
	22	NotVacantFlag equ 0ffh\r
	23	\r
	24	CPU_SWITCH_STATE_IDLE equ 0\r
	25	CPU_SWITCH_STATE_STORED equ 1\r
	26	CPU_SWITCH_STATE_LOADED equ 2\r
	27	\r
	28	LockLocation equ (RendezvousFunnelProcEnd - RendezvousFunnelProcStart)\r
	29	StackStartAddressLocation equ LockLocation + 08h\r
	30	StackSizeLocation equ LockLocation + 10h\r
	31	ApProcedureLocation equ LockLocation + 18h\r
	32	GdtrLocation equ LockLocation + 20h\r
	33	IdtrLocation equ LockLocation + 2Ah\r
	34	BufferStartLocation equ LockLocation + 34h\r
	35	ModeOffsetLocation equ LockLocation + 3Ch\r
	36	NumApsExecutingLocation equ LockLocation + 44h\r
	37	CodeSegmentLocation equ LockLocation + 4Ch\r
	38	DataSegmentLocation equ LockLocation + 54h\r
	39	EnableExecuteDisableLocation equ LockLocation + 5Ch\r
	40	Cr3Location equ LockLocation + 64h\r
	41	InitFlagLocation equ LockLocation + 6Ch\r
	42	CpuInfoLocation equ LockLocation + 74h\r
	43	InitializeFloatingPointUnitsAddress equ LockLocation + 84h\r
	44	\r