ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S

   1 #
   2 #  Copyright (c) 2014, ARM Limited. All rights reserved.
   3 #
   4 #  This program and the accompanying materials are licensed and made available
   5 #  under the terms and conditions of the BSD License which accompanies this
   6 #  distribution. The full text of the license may be found at
   7 #  http://opensource.org/licenses/bsd-license.php
   8 #
   9 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 #
  13
  14 #include <AsmMacroIoLibV8.h>
  15
  16 #if !defined(__clang__)
  17
  18 //
  19 // Clang versions before v3.6 do not support the GNU extension that allows
  20 // system registers outside of the IMPLEMENTATION DEFINED range to be specified
  21 // using the generic notation below. However, clang knows these registers by
  22 // their architectural names, so it has no need for these aliases anyway.
  23 //
  24 #define ICC_SRE_EL1             S3_0_C12_C12_5
  25 #define ICC_SRE_EL2             S3_4_C12_C9_5
  26 #define ICC_SRE_EL3             S3_6_C12_C12_5
  27 #define ICC_IGRPEN1_EL1         S3_0_C12_C12_7
  28 #define ICC_EOIR1_EL1           S3_0_C12_C12_1
  29 #define ICC_IAR1_EL1            S3_0_C12_C12_0
  30 #define ICC_PMR_EL1             S3_0_C4_C6_0
  31 #define ICC_BPR1_EL1            S3_0_C12_C12_3
  32
  33 #endif
  34
  35 //UINT32
  36 //EFIAPI
  37 //ArmGicV3GetControlSystemRegisterEnable (
  38 //  VOID
  39 //  );
  40 ASM_FUNC(ArmGicV3GetControlSystemRegisterEnable)
  41         EL1_OR_EL2_OR_EL3(x1)
  42 1:  mrs x0, ICC_SRE_EL1
  43         b       4f
  44 2:  mrs x0, ICC_SRE_EL2
  45         b       4f
  46 3:  mrs x0, ICC_SRE_EL3
  47 4:  ret
  48
  49 //VOID
  50 //EFIAPI
  51 //ArmGicV3SetControlSystemRegisterEnable (
  52 //  IN UINT32         ControlSystemRegisterEnable
  53 //  );
  54 ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable)
  55         EL1_OR_EL2_OR_EL3(x1)
  56 1:  msr ICC_SRE_EL1, x0
  57         b       4f
  58 2:  msr ICC_SRE_EL2, x0
  59         b       4f
  60 3:  msr ICC_SRE_EL3, x0
  61 4:  isb
  62         ret
  63
  64 //VOID
  65 //ArmGicV3EnableInterruptInterface (
  66 //  VOID
  67 //  );
  68 ASM_FUNC(ArmGicV3EnableInterruptInterface)
  69         mov     x0, #1
  70         msr     ICC_IGRPEN1_EL1, x0
  71         ret
  72
  73 //VOID
  74 //ArmGicV3DisableInterruptInterface (
  75 //  VOID
  76 //  );
  77 ASM_FUNC(ArmGicV3DisableInterruptInterface)
  78         mov     x0, #0
  79         msr     ICC_IGRPEN1_EL1, x0
  80         ret
  81
  82 //VOID
  83 //ArmGicV3EndOfInterrupt (
  84 //  IN UINTN          InterruptId
  85 //  );
  86 ASM_FUNC(ArmGicV3EndOfInterrupt)
  87         msr     ICC_EOIR1_EL1, x0
  88         ret
  89
  90 //UINTN
  91 //ArmGicV3AcknowledgeInterrupt (
  92 //  VOID
  93 //  );
  94 ASM_FUNC(ArmGicV3AcknowledgeInterrupt)
  95         mrs     x0, ICC_IAR1_EL1
  96         ret
  97
  98 //VOID
  99 //ArmGicV3SetPriorityMask (
 100 //  IN UINTN          Priority
 101 //  );
 102 ASM_FUNC(ArmGicV3SetPriorityMask)
 103         msr     ICC_PMR_EL1, x0
 104         ret
 105
 106 //VOID
 107 //ArmGicV3SetBinaryPointer (
 108 //  IN UINTN          BinaryPoint
 109 //  );
 110 ASM_FUNC(ArmGicV3SetBinaryPointer)
 111         msr     ICC_BPR1_EL1, x0
 112         ret