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ArmPkg: Added Aarch64 support
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1 /** @file
2
3 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4 Portions Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
5
6 This program and the accompanying materials
7 are licensed and made available under the terms and conditions of the BSD License
8 which accompanies this distribution. The full text of the license may be found at
9 http://opensource.org/licenses/bsd-license.php
10
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
13
14 **/
15
16 #include "CpuDxe.h"
17
18 #include <Chipset/AArch64.h>
19
20 VOID
21 ExceptionHandlersStart (
22 VOID
23 );
24
25 VOID
26 ExceptionHandlersEnd (
27 VOID
28 );
29
30 VOID
31 CommonExceptionEntry (
32 VOID
33 );
34
35 VOID
36 AsmCommonExceptionEntry (
37 VOID
38 );
39
40
41 EFI_EXCEPTION_CALLBACK gExceptionHandlers[MAX_ARM_EXCEPTION + 1];
42 EFI_EXCEPTION_CALLBACK gDebuggerExceptionHandlers[MAX_ARM_EXCEPTION + 1];
43
44
45
46 /**
47 This function registers and enables the handler specified by InterruptHandler for a processor
48 interrupt or exception type specified by InterruptType. If InterruptHandler is NULL, then the
49 handler for the processor interrupt or exception type specified by InterruptType is uninstalled.
50 The installed handler is called once for each processor interrupt or exception.
51
52 @param InterruptType A pointer to the processor's current interrupt state. Set to TRUE if interrupts
53 are enabled and FALSE if interrupts are disabled.
54 @param InterruptHandler A pointer to a function of type EFI_CPU_INTERRUPT_HANDLER that is called
55 when a processor interrupt occurs. If this parameter is NULL, then the handler
56 will be uninstalled.
57
58 @retval EFI_SUCCESS The handler for the processor interrupt was successfully installed or uninstalled.
59 @retval EFI_ALREADY_STARTED InterruptHandler is not NULL, and a handler for InterruptType was
60 previously installed.
61 @retval EFI_INVALID_PARAMETER InterruptHandler is NULL, and a handler for InterruptType was not
62 previously installed.
63 @retval EFI_UNSUPPORTED The interrupt specified by InterruptType is not supported.
64
65 **/
66 EFI_STATUS
67 RegisterInterruptHandler (
68 IN EFI_EXCEPTION_TYPE InterruptType,
69 IN EFI_CPU_INTERRUPT_HANDLER InterruptHandler
70 )
71 {
72 if (InterruptType > MAX_ARM_EXCEPTION) {
73 return EFI_UNSUPPORTED;
74 }
75
76 if ((InterruptHandler != NULL) && (gExceptionHandlers[InterruptType] != NULL)) {
77 return EFI_ALREADY_STARTED;
78 }
79
80 gExceptionHandlers[InterruptType] = InterruptHandler;
81
82 return EFI_SUCCESS;
83 }
84
85
86
87 VOID
88 EFIAPI
89 CommonCExceptionHandler (
90 IN EFI_EXCEPTION_TYPE ExceptionType,
91 IN OUT EFI_SYSTEM_CONTEXT SystemContext
92 )
93 {
94 if (ExceptionType <= MAX_AARCH64_EXCEPTION) {
95 if (gExceptionHandlers[ExceptionType]) {
96 gExceptionHandlers[ExceptionType] (ExceptionType, SystemContext);
97 return;
98 }
99 } else {
100 DEBUG ((EFI_D_ERROR, "Unknown exception type %d from %016lx\n", ExceptionType, SystemContext.SystemContextAArch64->ELR));
101 ASSERT (FALSE);
102 }
103
104 DefaultExceptionHandler (ExceptionType, SystemContext);
105 }
106
107
108
109 EFI_STATUS
110 InitializeExceptions (
111 IN EFI_CPU_ARCH_PROTOCOL *Cpu
112 )
113 {
114 EFI_STATUS Status;
115 BOOLEAN IrqEnabled;
116 BOOLEAN FiqEnabled;
117
118 Status = EFI_SUCCESS;
119 ZeroMem (gExceptionHandlers,sizeof(*gExceptionHandlers));
120
121 //
122 // Disable interrupts
123 //
124 Cpu->GetInterruptState (Cpu, &IrqEnabled);
125 Cpu->DisableInterrupt (Cpu);
126
127 //
128 // EFI does not use the FIQ, but a debugger might so we must disable
129 // as we take over the exception vectors.
130 //
131 FiqEnabled = ArmGetFiqState ();
132 ArmDisableFiq ();
133
134 // AArch64 alignment? The Vector table must be 2k-byte aligned (bottom 11 bits zero)?
135 //DEBUG ((EFI_D_ERROR, "vbar set addr: 0x%016lx\n",(UINTN)ExceptionHandlersStart));
136 //ASSERT(((UINTN)ExceptionHandlersStart & ((1 << 11)-1)) == 0);
137
138 // We do not copy the Exception Table at PcdGet32(PcdCpuVectorBaseAddress). We just set Vector Base Address to point into CpuDxe code.
139 ArmWriteVBar ((UINTN)ExceptionHandlersStart);
140
141 if (FiqEnabled) {
142 ArmEnableFiq ();
143 }
144
145 if (IrqEnabled) {
146 //
147 // Restore interrupt state
148 //
149 Status = Cpu->EnableInterrupt (Cpu);
150 }
151
152 return Status;
153 }