bc01f306b928308e583480b3f98cc1cfe9316588
[mirror_edk2.git] / ArmPkg / Drivers / CpuPei / CpuPei.c
1 /**@file
2
3 Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>
4 Copyright (c) 2011 Hewlett Packard Corporation. All rights reserved.<BR>
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 Module Name:
14
15 MemoryInit.c
16
17 Abstract:
18
19 PEIM to provide fake memory init
20
21 **/
22
23
24
25 //
26 // The package level header files this module uses
27 //
28 #include <PiPei.h>
29 //
30 // The protocols, PPI and GUID defintions for this module
31 //
32
33 //
34 // The Library classes this module consumes
35 //
36 #include <Library/DebugLib.h>
37 #include <Library/PeimEntryPoint.h>
38 #include <Library/PcdLib.h>
39 #include <Library/HobLib.h>
40 #include <Library/ArmLib.h>
41
42 //
43 // Module globals
44 //
45
46 #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
47 #define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
48
49 EFI_STATUS
50 FindMainMemory (
51 OUT UINT32 *PhysicalBase,
52 OUT UINT32 *Length
53 )
54 {
55 EFI_PEI_HOB_POINTERS NextHob;
56
57 // look at the resource descriptor hobs, choose the first system memory one
58 NextHob.Raw = GetHobList ();
59 while ((NextHob.Raw = GetNextHob (EFI_HOB_TYPE_RESOURCE_DESCRIPTOR, NextHob.Raw)) != NULL) {
60 if(NextHob.ResourceDescriptor->ResourceType == EFI_RESOURCE_SYSTEM_MEMORY)
61 {
62 *PhysicalBase = (UINT32)NextHob.ResourceDescriptor->PhysicalStart;
63 *Length = (UINT32)NextHob.ResourceDescriptor->ResourceLength;
64 return EFI_SUCCESS;
65 }
66
67 NextHob.Raw = GET_NEXT_HOB (NextHob);
68 }
69
70 return EFI_NOT_FOUND;
71 }
72
73 VOID
74 ConfigureMmu (
75 VOID
76 )
77 {
78 EFI_STATUS Status;
79 UINTN Idx;
80 UINT32 CacheAttributes;
81 UINT32 SystemMemoryBase;
82 UINT32 SystemMemoryLength;
83 UINT32 SystemMemoryLastAddress;
84 ARM_MEMORY_REGION_DESCRIPTOR MemoryTable[4];
85 VOID *TranslationTableBase;
86 UINTN TranslationTableSize;
87
88 if (FeaturePcdGet(PcdCacheEnable) == TRUE) {
89 CacheAttributes = DDR_ATTRIBUTES_CACHED;
90 } else {
91 CacheAttributes = DDR_ATTRIBUTES_UNCACHED;
92 }
93
94 Idx = 0;
95
96 // Main Memory
97 Status = FindMainMemory (&SystemMemoryBase, &SystemMemoryLength);
98 ASSERT_EFI_ERROR (Status);
99
100 SystemMemoryLastAddress = SystemMemoryBase + (SystemMemoryLength-1);
101
102 // if system memory does not begin at 0
103 if(SystemMemoryBase > 0) {
104 MemoryTable[Idx].PhysicalBase = 0;
105 MemoryTable[Idx].VirtualBase = 0;
106 MemoryTable[Idx].Length = SystemMemoryBase;
107 MemoryTable[Idx].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
108 Idx++;
109 }
110
111 MemoryTable[Idx].PhysicalBase = SystemMemoryBase;
112 MemoryTable[Idx].VirtualBase = SystemMemoryBase;
113 MemoryTable[Idx].Length = SystemMemoryLength;
114 MemoryTable[Idx].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)CacheAttributes;
115 Idx++;
116
117 // if system memory does not go to the last address (0xFFFFFFFF)
118 if( SystemMemoryLastAddress < MAX_ADDRESS ) {
119 MemoryTable[Idx].PhysicalBase = SystemMemoryLastAddress + 1;
120 MemoryTable[Idx].VirtualBase = MemoryTable[Idx].PhysicalBase;
121 MemoryTable[Idx].Length = MAX_ADDRESS - MemoryTable[Idx].PhysicalBase + 1;
122 MemoryTable[Idx].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE;
123 Idx++;
124 }
125
126 // End of Table
127 MemoryTable[Idx].PhysicalBase = 0;
128 MemoryTable[Idx].VirtualBase = 0;
129 MemoryTable[Idx].Length = 0;
130 MemoryTable[Idx].Attributes = (ARM_MEMORY_REGION_ATTRIBUTES)0;
131
132 DEBUG ((EFI_D_INFO, "Enabling MMU, setting 0x%08x + %d MB to %a\n",
133 SystemMemoryBase, SystemMemoryLength/1024/1024,
134 (CacheAttributes == DDR_ATTRIBUTES_CACHED) ? "cacheable" : "uncacheable"));
135
136 ArmConfigureMmu (MemoryTable, &TranslationTableBase, &TranslationTableSize);
137
138 BuildMemoryAllocationHob((EFI_PHYSICAL_ADDRESS)(UINTN)TranslationTableBase, TranslationTableSize, EfiBootServicesData);
139 }
140
141
142 EFI_STATUS
143 EFIAPI
144 InitializeCpuPeim (
145 IN EFI_PEI_FILE_HANDLE FileHandle,
146 IN CONST EFI_PEI_SERVICES **PeiServices
147 )
148 /*++
149
150 Routine Description:
151
152
153
154 Arguments:
155
156 FileHandle - Handle of the file being invoked.
157 PeiServices - Describes the list of possible PEI Services.
158
159 Returns:
160
161 Status - EFI_SUCCESS if the boot mode could be set
162
163 --*/
164 {
165 // Enable program flow prediction, if supported.
166 ArmEnableBranchPrediction ();
167
168 // publish the CPU memory and io spaces sizes
169 BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize), PcdGet8 (PcdPrePiCpuIoSize));
170
171 ConfigureMmu();
172
173 return EFI_SUCCESS;
174 }