ArmPkg/Drivers/PL390Gic/PL390Gic.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include <Uefi.h>
  16 #include <Library/IoLib.h>
  17 #include <Library/ArmGicLib.h>
  18
  19 VOID
  20 EFIAPI
  21 ArmGicSendSgiTo (
  22   IN  INTN          GicDistributorBase,
  23   IN  INTN          TargetListFilter,
  24   IN  INTN          CPUTargetList
  25   )
  26 {
  27   MmioWrite32 (GicDistributorBase + ARM_GIC_ICDSGIR, ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16));
  28 }
  29
  30 UINT32
  31 EFIAPI
  32 ArmGicAcknowledgeSgiFrom (
  33   IN  INTN          GicInterruptInterfaceBase,
  34   IN  INTN          CoreId
  35   )
  36 {
  37   INTN            InterruptId;
  38
  39   InterruptId = MmioRead32 (GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
  40
  41   // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
  42   if (((CoreId & 0x7) << 10) == (InterruptId & 0x1C00)) {
  43     // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
  44     MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
  45     return 1;
  46   } else {
  47     return 0;
  48   }
  49 }
  50
  51 UINT32
  52 EFIAPI
  53 ArmGicAcknowledgeSgi2From (
  54   IN  INTN          GicInterruptInterfaceBase,
  55   IN  INTN          CoreId,
  56   IN  INTN          SgiId
  57   )
  58 {
  59   INTN            InterruptId;
  60
  61   InterruptId = MmioRead32(GicInterruptInterfaceBase + ARM_GIC_ICCIAR);
  62
  63   // Check if the Interrupt ID is valid, The read from Interrupt Ack register returns CPU ID and Interrupt ID
  64   if((((CoreId & 0x7) << 10) | (SgiId & 0x3FF)) == (InterruptId & 0x1FFF)) {
  65     // Got SGI number 0 hence signal End of Interrupt by writing to ICCEOIR
  66     MmioWrite32 (GicInterruptInterfaceBase + ARM_GIC_ICCEIOR, InterruptId);
  67     return 1;
  68   } else {
  69     return 0;
  70   }
  71 }