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1 /** @file
2 Macros to work around lack of Apple support for LDR register, =expr
3
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
5 Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17
18 #ifndef __MACRO_IO_LIB_H__
19 #define __MACRO_IO_LIB_H__
20
21 #if defined(__APPLE__)
22
23 //
24 // ldr reg, =expr does not work with current Apple tool chain. So do the work our selves
25 //
26
27 // returns _Data in R0 and _Address in R1
28 #define MmioWrite32(_Address, _Data) \
29 ldr r1, [pc, #8] ; \
30 ldr r0, [pc, #8] ; \
31 str r0, [r1] ; \
32 b 1f ; \
33 .long (_Address) ; \
34 .long (_Data) ; \
35 1:
36
37 // returns _Data in R0 and _Address in R1, and _OrData in r2
38 #define MmioOr32(_Address, _OrData) \
39 ldr r1, [pc, #16] ; \
40 ldr r2, [pc, #16] ; \
41 ldr r0, [r1] ; \
42 orr r0, r0, r2 ; \
43 str r0, [r1] ; \
44 b 1f ; \
45 .long (_Address) ; \
46 .long (_OrData) ; \
47 1:
48
49 // returns _Data in R0 and _Address in R1, and _OrData in r2
50 #define MmioAnd32(_Address, _AndData) \
51 ldr r1, [pc, #16] ; \
52 ldr r2, [pc, #16] ; \
53 ldr r0, [r1] ; \
54 and r0, r0, r2 ; \
55 str r0, [r1] ; \
56 b 1f ; \
57 .long (_Address) ; \
58 .long (_AndData) ; \
59 1:
60
61 // returns result in R0, _Address in R1, and _OrData in r2
62 #define MmioAndThenOr32(_Address, _AndData, _OrData) \
63 ldr r1, [pc, #24] ; \
64 ldr r0, [r1] ; \
65 ldr r2, [pc, #20] ; \
66 and r0, r0, r2 ; \
67 ldr r2, [pc, #16] ; \
68 orr r0, r0, r2 ; \
69 str r0, [r1] ; \
70 b 1f ; \
71 .long (_Address) ; \
72 .long (_AndData) ; \
73 .long (_OrData) ; \
74 1:
75
76 // returns _Data in _Reg and _Address in R1
77 #define MmioWriteFromReg32(_Address, _Reg) \
78 ldr r1, [pc, #4] ; \
79 str _Reg, [r1] ; \
80 b 1f ; \
81 .long (_Address) ; \
82 1:
83
84
85 // returns _Data in R0 and _Address in R1
86 #define MmioRead32(_Address) \
87 ldr r1, [pc, #4] ; \
88 ldr r0, [r1] ; \
89 b 1f ; \
90 .long (_Address) ; \
91 1:
92
93 // returns _Data in Reg and _Address in R1
94 #define MmioReadToReg32(_Address, _Reg) \
95 ldr r1, [pc, #4] ; \
96 ldr _Reg, [r1] ; \
97 b 1f ; \
98 .long (_Address) ; \
99 1:
100
101
102 // load R0 with _Data
103 #define LoadConstant(_Data) \
104 ldr r0, [pc, #0] ; \
105 b 1f ; \
106 .long (_Data) ; \
107 1:
108
109 // load _Reg with _Data
110 #define LoadConstantToReg(_Data, _Reg) \
111 ldr _Reg, [pc, #0] ; \
112 b 1f ; \
113 .long (_Data) ; \
114 1:
115
116 // load _Reg with _Data if eq
117 #define LoadConstantToRegIfEq(_Data, _Reg) \
118 ldreq _Reg, [pc, #0] ; \
119 b 1f ; \
120 .long (_Data) ; \
121 1:
122
123 // Convert the (ClusterId,CoreId) into a Core Position
124 // We assume there are 4 cores per cluster
125 #define GetCorePositionInStack(Pos, MpId, Tmp) \
126 lsr Pos, MpId, #6 ; \
127 and Tmp, MpId, #3 ; \
128 add Pos, Pos, Tmp
129
130 // Reserve a region at the top of the Primary Core stack
131 // for Global variables for the XIP phase
132 #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
133 and Tmp, GlobalSize, #7 ; \
134 rsbne Tmp, Tmp, #8 ; \
135 add GlobalSize, GlobalSize, Tmp ; \
136 sub sp, StackTop, GlobalSize ; \
137 ; \
138 mov Tmp, sp ; \
139 mov GlobalSize, #0x0 ; \
140 _SetPrimaryStackInitGlobals: ; \
141 cmp Tmp, StackTop ; \
142 beq _SetPrimaryStackEnd ; \
143 str GlobalSize, [Tmp], #4 ; \
144 b _SetPrimaryStackInitGlobals ; \
145 _SetPrimaryStackEnd:
146
147
148 #elif defined (__GNUC__)
149
150 #define MmioWrite32(Address, Data) \
151 ldr r1, =Address ; \
152 ldr r0, =Data ; \
153 str r0, [r1]
154
155 #define MmioOr32(Address, OrData) \
156 ldr r1, =Address ; \
157 ldr r2, =OrData ; \
158 ldr r0, [r1] ; \
159 orr r0, r0, r2 ; \
160 str r0, [r1]
161
162 #define MmioAnd32(Address, AndData) \
163 ldr r1, =Address ; \
164 ldr r2, =AndData ; \
165 ldr r0, [r1] ; \
166 and r0, r0, r2 ; \
167 str r0, [r1]
168
169 #define MmioAndThenOr32(Address, AndData, OrData) \
170 ldr r1, =Address ; \
171 ldr r0, [r1] ; \
172 ldr r2, =AndData ; \
173 and r0, r0, r2 ; \
174 ldr r2, =OrData ; \
175 orr r0, r0, r2 ; \
176 str r0, [r1]
177
178 #define MmioWriteFromReg32(Address, Reg) \
179 ldr r1, =Address ; \
180 str Reg, [r1]
181
182 #define MmioRead32(Address) \
183 ldr r1, =Address ; \
184 ldr r0, [r1]
185
186 #define MmioReadToReg32(Address, Reg) \
187 ldr r1, =Address ; \
188 ldr Reg, [r1]
189
190 #define LoadConstant(Data) \
191 ldr r0, =Data
192
193 #define LoadConstantToReg(Data, Reg) \
194 ldr Reg, =Data
195
196 #define GetCorePositionInStack(Pos, MpId, Tmp) \
197 lsr Pos, MpId, #6 ; \
198 and Tmp, MpId, #3 ; \
199 add Pos, Pos, Tmp
200
201 #define SetPrimaryStack(StackTop, GlobalSize, Tmp) \
202 and Tmp, GlobalSize, #7 ; \
203 rsbne Tmp, Tmp, #8 ; \
204 add GlobalSize, GlobalSize, Tmp ; \
205 sub sp, StackTop, GlobalSize ; \
206 ; \
207 mov Tmp, sp ; \
208 mov GlobalSize, #0x0 ; \
209 _SetPrimaryStackInitGlobals: ; \
210 cmp Tmp, StackTop ; \
211 beq _SetPrimaryStackEnd ; \
212 str GlobalSize, [Tmp], #4 ; \
213 b _SetPrimaryStackInitGlobals ; \
214 _SetPrimaryStackEnd:
215
216 #else
217
218 //
219 // Use ARM assembly macros, form armasam
220 //
221 // Less magic in the macros if ldr reg, =expr works
222 //
223
224 // returns _Data in R0 and _Address in R1
225
226
227
228 #define MmioWrite32(Address, Data) MmioWrite32Macro Address, Data
229
230
231
232
233 // returns Data in R0 and Address in R1, and OrData in r2
234 #define MmioOr32(Address, OrData) MmioOr32Macro Address, OrData
235
236
237 // returns _Data in R0 and _Address in R1, and _OrData in r2
238
239
240 #define MmioAnd32(Address, AndData) MmioAnd32Macro Address, AndData
241
242 // returns result in R0, _Address in R1, and _OrData in r2
243
244
245 #define MmioAndThenOr32(Address, AndData, OrData) MmioAndThenOr32Macro Address, AndData, OrData
246
247
248 // returns _Data in _Reg and _Address in R1
249
250
251 #define MmioWriteFromReg32(Address, Reg) MmioWriteFromReg32Macro Address, Reg
252
253 // returns _Data in R0 and _Address in R1
254
255
256 #define MmioRead32(Address) MmioRead32Macro Address
257
258 // returns _Data in Reg and _Address in R1
259
260
261 #define MmioReadToReg32(Address, Reg) MmioReadToReg32Macro Address, Reg
262
263
264 // load R0 with _Data
265
266
267 #define LoadConstant(Data) LoadConstantMacro Data
268
269 // load _Reg with _Data
270
271
272 #define LoadConstantToReg(Data, Reg) LoadConstantToRegMacro Data, Reg
273
274 // conditional load testing eq flag
275 #define LoadConstantToRegIfEq(Data, Reg) LoadConstantToRegIfEqMacro Data, Reg
276
277 #define GetCorePositionInStack(Pos, MpId, Tmp) GetCorePositionInStack Pos, MpId, Tmp
278
279 #define SetPrimaryStack(StackTop,GlobalSize,Tmp) SetPrimaryStack StackTop, GlobalSize, Tmp
280
281 #endif
282
283 #endif