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ArmPkg/AsmMacroIoLibV8.h: Correct 32 bit accesses in asm macros
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1 /** @file
2 Macros to work around lack of Apple support for LDR register, =expr
3
4 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
5 Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
6
7 This program and the accompanying materials
8 are licensed and made available under the terms and conditions of the BSD License
9 which accompanies this distribution. The full text of the license may be found at
10 http://opensource.org/licenses/bsd-license.php
11
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14
15 **/
16
17
18 #ifndef __MACRO_IO_LIBV8_H__
19 #define __MACRO_IO_LIBV8_H__
20
21 #if defined (__GNUC__)
22
23 #define MmioWrite32(Address, Data) \
24 ldr x1, =Address ; \
25 ldr w0, =Data ; \
26 str w0, [x1]
27
28 #define MmioOr32(Address, OrData) \
29 ldr x1, =Address ; \
30 ldr w2, =OrData ; \
31 ldr w0, [x1] ; \
32 orr w0, w0, w2 ; \
33 str w0, [x1]
34
35 #define MmioAnd32(Address, AndData) \
36 ldr x1, =Address ; \
37 ldr w2, =AndData ; \
38 ldr w0, [x1] ; \
39 and w0, w0, w2 ; \
40 str w0, [x1]
41
42 #define MmioAndThenOr32(Address, AndData, OrData) \
43 ldr x1, =Address ; \
44 ldr w0, [x1] ; \
45 ldr w2, =AndData ; \
46 and w0, w0, w2 ; \
47 ldr w2, =OrData ; \
48 orr w0, w0, w2 ; \
49 str w0, [x1]
50
51 #define MmioWriteFromReg32(Address, Reg) \
52 ldr x1, =Address ; \
53 str Reg, [x1]
54
55 #define MmioRead32(Address) \
56 ldr x1, =Address ; \
57 ldr w0, [x1]
58
59 #define MmioReadToReg32(Address, Reg) \
60 ldr x1, =Address ; \
61 ldr Reg, [x1]
62
63 #define LoadConstant(Data) \
64 ldr x0, =Data
65
66 #define LoadConstantToReg(Data, Reg) \
67 ldr Reg, =Data
68
69 #define SetPrimaryStack(StackTop, GlobalSize, Tmp, Tmp1) \
70 ands Tmp, GlobalSize, #15 ; \
71 mov Tmp1, #16 ; \
72 sub Tmp1, Tmp1, Tmp ; \
73 csel Tmp, Tmp1, Tmp, ne ; \
74 add GlobalSize, GlobalSize, Tmp ; \
75 sub sp, StackTop, GlobalSize ; \
76 ; \
77 mov Tmp, sp ; \
78 mov GlobalSize, #0x0 ; \
79 _SetPrimaryStackInitGlobals: ; \
80 cmp Tmp, StackTop ; \
81 b.eq _SetPrimaryStackEnd ; \
82 str GlobalSize, [Tmp], #8 ; \
83 b _SetPrimaryStackInitGlobals ; \
84 _SetPrimaryStackEnd:
85
86 // Initialize the Global Variable with '0'
87 #define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) \
88 and Tmp1, GlobalSize, #15 ; \
89 mov Tmp2, #16 ; \
90 sub Tmp2, Tmp2, Tmp1 ; \
91 add GlobalSize, GlobalSize, Tmp2 ; \
92 ; \
93 mov Tmp1, sp ; \
94 sub sp, sp, GlobalSize ; \
95 mov GlobalSize, #0x0 ; \
96 _InitializePrimaryStackLoop: ; \
97 mov Tmp2, sp ; \
98 cmp Tmp1, Tmp2 ; \
99 bls _InitializePrimaryStackEnd ; \
100 str GlobalSize, [Tmp1, #-8]! ; \
101 b _InitializePrimaryStackLoop ; \
102 _InitializePrimaryStackEnd:
103
104 // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
105 // This only selects between EL1 and EL2, else we die.
106 // Provide the Macro with a safe temp xreg to use.
107 #define EL1_OR_EL2(SAFE_XREG) \
108 mrs SAFE_XREG, CurrentEL ;\
109 cmp SAFE_XREG, #0x4 ;\
110 b.eq 1f ;\
111 cmp SAFE_XREG, #0x8 ;\
112 b.eq 2f ;\
113 b dead ;// We should never get here.
114
115 // CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
116 // This only selects between EL1 and EL2 and EL3, else we die.
117 // Provide the Macro with a safe temp xreg to use.
118 #define EL1_OR_EL2_OR_EL3(SAFE_XREG) \
119 mrs SAFE_XREG, CurrentEL ;\
120 cmp SAFE_XREG, #0x4 ;\
121 b.eq 1f ;\
122 cmp SAFE_XREG, #0x8 ;\
123 b.eq 2f ;\
124 cmp SAFE_XREG, #0xC ;\
125 b.eq 3f ;\
126 b dead ;// We should never get here.
127
128 #else
129
130 #error RVCT AArch64 tool chain is not supported
131
132 #endif // __GNUC__
133
134 #endif // __MACRO_IO_LIBV8_H__
135