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1 /** @file
2
3 Copyright (c) 2011, ARM Limited. All rights reserved.
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #ifndef __ARM_CORTEX_A9_H__
16 #define __ARM_CORTEX_A9_H__
17
18 #include <Chipset/ArmV7.h>
19
20 //
21 // Cortex A9 feature bit definitions
22 //
23 #define A9_FEATURE_PARITY (1<<9)
24 #define A9_FEATURE_AOW (1<<8)
25 #define A9_FEATURE_EXCL (1<<7)
26 #define A9_FEATURE_SMP (1<<6)
27 #define A9_FEATURE_FOZ (1<<3)
28 #define A9_FEATURE_DPREF (1<<2)
29 #define A9_FEATURE_HINT (1<<1)
30 #define A9_FEATURE_FWD (1<<0)
31
32 //
33 // Cortex A9 Watchdog
34 //
35 #define ARM_A9_WATCHDOG_REGION 0x600
36
37 #define ARM_A9_WATCHDOG_LOAD_REGISTER 0x20
38 #define ARM_A9_WATCHDOG_CONTROL_REGISTER 0x28
39
40 #define ARM_A9_WATCHDOG_WATCHDOG_MODE (1 << 3)
41 #define ARM_A9_WATCHDOG_TIMER_MODE (0 << 3)
42 #define ARM_A9_WATCHDOG_SINGLE_SHOT (0 << 1)
43 #define ARM_A9_WATCHDOG_AUTORELOAD (1 << 1)
44 #define ARM_A9_WATCHDOG_ENABLE 1
45
46 //
47 // SCU register offsets & masks
48 //
49 #define A9_SCU_CONTROL_OFFSET 0x0
50 #define A9_SCU_CONFIG_OFFSET 0x4
51 #define A9_SCU_INVALL_OFFSET 0xC
52 #define A9_SCU_FILT_START_OFFSET 0x40
53 #define A9_SCU_FILT_END_OFFSET 0x44
54 #define A9_SCU_SACR_OFFSET 0x50
55 #define A9_SCU_SSACR_OFFSET 0x54
56
57
58 UINTN
59 EFIAPI
60 ArmGetScuBaseAddress (
61 VOID
62 );
63
64 #endif
65