ArmPkg/Include/IndustryStandard/ArmStdSmc.h

   1 /** @file
   2 *
   3 *  Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
   4 *  Copyright (c) 2012-2017, ARM Limited. All rights reserved.
   5 *
   6 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   7 *
   8 * @par Revision Reference:
   9 *  - SMC Calling Convention version 1.2
  10 *    (https://developer.arm.com/documentation/den0028/c/?lang=en)
  11 **/
  12
  13 #ifndef ARM_STD_SMC_H_
  14 #define ARM_STD_SMC_H_
  15
  16 /*
  17  * SMC function IDs for Standard Service queries
  18  */
  19
  20 #define ARM_SMC_ID_STD_CALL_COUNT  0x8400ff00
  21 #define ARM_SMC_ID_STD_UID         0x8400ff01
  22 /*                                    0x8400ff02 is reserved */
  23 #define ARM_SMC_ID_STD_REVISION  0x8400ff03
  24
  25 /*
  26  * The 'Standard Service Call UID' is supposed to return the Standard
  27  * Service UUID. This is a 128-bit value.
  28  */
  29 #define ARM_SMC_STD_UUID0  0x108d905b
  30 #define ARM_SMC_STD_UUID1  0x47e8f863
  31 #define ARM_SMC_STD_UUID2  0xfbc02dae
  32 #define ARM_SMC_STD_UUID3  0xe2f64156
  33
  34 /*
  35  * ARM Standard Service Calls revision numbers
  36  * The current revision is:  0.1
  37  */
  38 #define ARM_SMC_STD_REVISION_MAJOR  0x0
  39 #define ARM_SMC_STD_REVISION_MINOR  0x1
  40
  41 /*
  42  * Management Mode (MM) calls cover a subset of the Standard Service Call range.
  43  * The list below is not exhaustive.
  44  */
  45 #define ARM_SMC_ID_MM_VERSION_AARCH32  0x84000040
  46 #define ARM_SMC_ID_MM_VERSION_AARCH64  0xC4000040
  47
  48 // Request service from secure standalone MM environment
  49 #define ARM_SMC_ID_MM_COMMUNICATE_AARCH32  0x84000041
  50 #define ARM_SMC_ID_MM_COMMUNICATE_AARCH64  0xC4000041
  51
  52 /* Generic ID when using AArch32 or AArch64 execution state */
  53 #ifdef MDE_CPU_AARCH64
  54 #define ARM_SMC_ID_MM_COMMUNICATE  ARM_SMC_ID_MM_COMMUNICATE_AARCH64
  55 #endif
  56 #ifdef MDE_CPU_ARM
  57 #define ARM_SMC_ID_MM_COMMUNICATE  ARM_SMC_ID_MM_COMMUNICATE_AARCH32
  58 #endif
  59
  60 /* MM return error codes */
  61 #define ARM_SMC_MM_RET_SUCCESS         0
  62 #define ARM_SMC_MM_RET_NOT_SUPPORTED   -1
  63 #define ARM_SMC_MM_RET_INVALID_PARAMS  -2
  64 #define ARM_SMC_MM_RET_DENIED          -3
  65 #define ARM_SMC_MM_RET_NO_MEMORY       -4
  66
  67 // ARM Architecture Calls
  68 #define SMCCC_VERSION            0x80000000
  69 #define SMCCC_ARCH_FEATURES      0x80000001
  70 #define SMCCC_ARCH_SOC_ID        0x80000002
  71 #define SMCCC_ARCH_WORKAROUND_1  0x80008000
  72 #define SMCCC_ARCH_WORKAROUND_2  0x80007FFF
  73
  74 #define SMC_ARCH_CALL_SUCCESS            0
  75 #define SMC_ARCH_CALL_NOT_SUPPORTED      -1
  76 #define SMC_ARCH_CALL_NOT_REQUIRED       -2
  77 #define SMC_ARCH_CALL_INVALID_PARAMETER  -3
  78
  79 /*
  80  * Power State Coordination Interface (PSCI) calls cover a subset of the
  81  * Standard Service Call range.
  82  * The list below is not exhaustive.
  83  */
  84 #define ARM_SMC_ID_PSCI_VERSION                0x84000000
  85 #define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64    0xc4000001
  86 #define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32    0x84000001
  87 #define ARM_SMC_ID_PSCI_CPU_OFF                0x84000002
  88 #define ARM_SMC_ID_PSCI_CPU_ON_AARCH64         0xc4000003
  89 #define ARM_SMC_ID_PSCI_CPU_ON_AARCH32         0x84000003
  90 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64  0xc4000004
  91 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32  0x84000004
  92 #define ARM_SMC_ID_PSCI_MIGRATE_AARCH64        0xc4000005
  93 #define ARM_SMC_ID_PSCI_MIGRATE_AARCH32        0x84000005
  94 #define ARM_SMC_ID_PSCI_SYSTEM_OFF             0x84000008
  95 #define ARM_SMC_ID_PSCI_SYSTEM_RESET           0x84000009
  96
  97 /* The current PSCI version is:  0.2 */
  98 #define ARM_SMC_PSCI_VERSION_MAJOR  0
  99 #define ARM_SMC_PSCI_VERSION_MINOR  2
 100 #define ARM_SMC_PSCI_VERSION  \
 101   ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
 102
 103 /* PSCI return error codes */
 104 #define ARM_SMC_PSCI_RET_SUCCESS         0
 105 #define ARM_SMC_PSCI_RET_NOT_SUPPORTED   -1
 106 #define ARM_SMC_PSCI_RET_INVALID_PARAMS  -2
 107 #define ARM_SMC_PSCI_RET_DENIED          -3
 108 #define ARM_SMC_PSCI_RET_ALREADY_ON      -4
 109 #define ARM_SMC_PSCI_RET_ON_PENDING      -5
 110 #define ARM_SMC_PSCI_RET_INTERN_FAIL     -6
 111 #define ARM_SMC_PSCI_RET_NOT_PRESENT     -7
 112 #define ARM_SMC_PSCI_RET_DISABLED        -8
 113
 114 #define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
 115   ((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
 116
 117 #define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \
 118   ((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
 119
 120 #define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId)  ((TargetId) & 0xFF)
 121 #define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId)  (((TargetId) >> 8) & 0xFF)
 122
 123 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0  0
 124 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1  1
 125 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2  2
 126 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3  3
 127
 128 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON          0
 129 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF         1
 130 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING  2
 131
 132 /*
 133  * SMC function IDs for Trusted OS Service queries
 134  */
 135 #define ARM_SMC_ID_TOS_CALL_COUNT  0xbf00ff00
 136 #define ARM_SMC_ID_TOS_UID         0xbf00ff01
 137 /*                                    0xbf00ff02 is reserved */
 138 #define ARM_SMC_ID_TOS_REVISION  0xbf00ff03
 139
 140 #endif // ARM_STD_SMC_H_