ArmPkg/Include/IndustryStandard/ArmStdSmc.h

   1 /** @file
   2 *
   3 *  Copyright (c) 2020, NUVIA Inc. All rights reserved.<BR>
   4 *  Copyright (c) 2012-2017, ARM Limited. All rights reserved.
   5 *
   6 *  SPDX-License-Identifier: BSD-2-Clause-Patent
   7 *
   8 * @par Revision Reference:
   9 *  - SMC Calling Convention version 1.2
  10 *    (https://developer.arm.com/documentation/den0028/c/?lang=en)
  11 **/
  12
  13 #ifndef ARM_STD_SMC_H_
  14 #define ARM_STD_SMC_H_
  15
  16 /*
  17  * SMC function IDs for Standard Service queries
  18  */
  19
  20 #define ARM_SMC_ID_STD_CALL_COUNT     0x8400ff00
  21 #define ARM_SMC_ID_STD_UID            0x8400ff01
  22 /*                                    0x8400ff02 is reserved */
  23 #define ARM_SMC_ID_STD_REVISION       0x8400ff03
  24
  25 /*
  26  * The 'Standard Service Call UID' is supposed to return the Standard
  27  * Service UUID. This is a 128-bit value.
  28  */
  29 #define ARM_SMC_STD_UUID0       0x108d905b
  30 #define ARM_SMC_STD_UUID1       0x47e8f863
  31 #define ARM_SMC_STD_UUID2       0xfbc02dae
  32 #define ARM_SMC_STD_UUID3       0xe2f64156
  33
  34 /*
  35  * ARM Standard Service Calls revision numbers
  36  * The current revision is:  0.1
  37  */
  38 #define ARM_SMC_STD_REVISION_MAJOR    0x0
  39 #define ARM_SMC_STD_REVISION_MINOR    0x1
  40
  41 /*
  42  * Management Mode (MM) calls cover a subset of the Standard Service Call range.
  43  * The list below is not exhaustive.
  44  */
  45 #define ARM_SMC_ID_MM_VERSION_AARCH32              0x84000040
  46 #define ARM_SMC_ID_MM_VERSION_AARCH64              0xC4000040
  47
  48 // Request service from secure standalone MM environment
  49 #define ARM_SMC_ID_MM_COMMUNICATE_AARCH32          0x84000041
  50 #define ARM_SMC_ID_MM_COMMUNICATE_AARCH64          0xC4000041
  51
  52 /* MM return error codes */
  53 #define ARM_SMC_MM_RET_SUCCESS              0
  54 #define ARM_SMC_MM_RET_NOT_SUPPORTED       -1
  55 #define ARM_SMC_MM_RET_INVALID_PARAMS      -2
  56 #define ARM_SMC_MM_RET_DENIED              -3
  57 #define ARM_SMC_MM_RET_NO_MEMORY           -4
  58
  59 // ARM Architecture Calls
  60 #define SMCCC_VERSION           0x80000000
  61 #define SMCCC_ARCH_FEATURES     0x80000001
  62 #define SMCCC_ARCH_SOC_ID       0x80000002
  63 #define SMCCC_ARCH_WORKAROUND_1 0x80008000
  64 #define SMCCC_ARCH_WORKAROUND_2 0x80007FFF
  65
  66 #define SMC_ARCH_CALL_SUCCESS            0
  67 #define SMC_ARCH_CALL_NOT_SUPPORTED     -1
  68 #define SMC_ARCH_CALL_NOT_REQUIRED      -2
  69 #define SMC_ARCH_CALL_INVALID_PARAMETER -3
  70
  71 /*
  72  * Power State Coordination Interface (PSCI) calls cover a subset of the
  73  * Standard Service Call range.
  74  * The list below is not exhaustive.
  75  */
  76 #define ARM_SMC_ID_PSCI_VERSION                0x84000000
  77 #define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH64    0xc4000001
  78 #define ARM_SMC_ID_PSCI_CPU_SUSPEND_AARCH32    0x84000001
  79 #define ARM_SMC_ID_PSCI_CPU_OFF                0x84000002
  80 #define ARM_SMC_ID_PSCI_CPU_ON_AARCH64         0xc4000003
  81 #define ARM_SMC_ID_PSCI_CPU_ON_AARCH32         0x84000003
  82 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH64  0xc4000004
  83 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_AARCH32  0x84000004
  84 #define ARM_SMC_ID_PSCI_MIGRATE_AARCH64        0xc4000005
  85 #define ARM_SMC_ID_PSCI_MIGRATE_AARCH32        0x84000005
  86 #define ARM_SMC_ID_PSCI_SYSTEM_OFF             0x84000008
  87 #define ARM_SMC_ID_PSCI_SYSTEM_RESET           0x84000009
  88
  89 /* The current PSCI version is:  0.2 */
  90 #define ARM_SMC_PSCI_VERSION_MAJOR  0
  91 #define ARM_SMC_PSCI_VERSION_MINOR  2
  92 #define ARM_SMC_PSCI_VERSION  \
  93   ((ARM_SMC_PSCI_VERSION_MAJOR << 16) | ARM_SMC_PSCI_VERSION_MINOR)
  94
  95 /* PSCI return error codes */
  96 #define ARM_SMC_PSCI_RET_SUCCESS            0
  97 #define ARM_SMC_PSCI_RET_NOT_SUPPORTED      -1
  98 #define ARM_SMC_PSCI_RET_INVALID_PARAMS     -2
  99 #define ARM_SMC_PSCI_RET_DENIED             -3
 100 #define ARM_SMC_PSCI_RET_ALREADY_ON         -4
 101 #define ARM_SMC_PSCI_RET_ON_PENDING         -5
 102 #define ARM_SMC_PSCI_RET_INTERN_FAIL        -6
 103 #define ARM_SMC_PSCI_RET_NOT_PRESENT        -7
 104 #define ARM_SMC_PSCI_RET_DISABLED           -8
 105
 106 #define ARM_SMC_PSCI_TARGET_CPU32(Aff2, Aff1, Aff0) \
 107   ((((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
 108
 109 #define ARM_SMC_PSCI_TARGET_CPU64(Aff3, Aff2, Aff1, Aff0) \
 110   ((((Aff3) & 0xFFULL) << 32) | (((Aff2) & 0xFF) << 16) | (((Aff1) & 0xFF) << 8) | ((Aff0) & 0xFF))
 111
 112 #define ARM_SMC_PSCI_TARGET_GET_AFF0(TargetId)  ((TargetId) & 0xFF)
 113 #define ARM_SMC_PSCI_TARGET_GET_AFF1(TargetId)  (((TargetId) >> 8) & 0xFF)
 114
 115 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_0    0
 116 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_1    1
 117 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_2    2
 118 #define ARM_SMC_ID_PSCI_AFFINITY_LEVEL_3    3
 119
 120 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON          0
 121 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_OFF         1
 122 #define ARM_SMC_ID_PSCI_AFFINITY_INFO_ON_PENDING  2
 123
 124 /*
 125  * SMC function IDs for Trusted OS Service queries
 126  */
 127 #define ARM_SMC_ID_TOS_CALL_COUNT     0xbf00ff00
 128 #define ARM_SMC_ID_TOS_UID            0xbf00ff01
 129 /*                                    0xbf00ff02 is reserved */
 130 #define ARM_SMC_ID_TOS_REVISION       0xbf00ff03
 131
 132 #endif // ARM_STD_SMC_H_