ArmPkg/Library/ArmCacheMaintenanceLib/ArmCacheMaintenanceLib.c

   1 /** @file
   2
   3   Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4   Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
   5
   6   This program and the accompanying materials
   7   are licensed and made available under the terms and conditions of the BSD License
   8   which accompanies this distribution.  The full text of the license may be found at
   9   http://opensource.org/licenses/bsd-license.php
  10
  11   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13
  14 **/
  15 #include <Base.h>
  16 #include <Library/ArmLib.h>
  17 #include <Library/DebugLib.h>
  18 #include <Library/PcdLib.h>
  19
  20 STATIC
  21 VOID
  22 CacheRangeOperation (
  23   IN  VOID            *Start,
  24   IN  UINTN           Length,
  25   IN  LINE_OPERATION  LineOperation,
  26   IN  UINTN           LineLength
  27   )
  28 {
  29   UINTN ArmCacheLineAlignmentMask  = LineLength - 1;
  30
  31   // Align address (rounding down)
  32   UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
  33   UINTN EndAddress     = (UINTN)Start + Length;
  34
  35   // Perform the line operation on an address in each cache line
  36   while (AlignedAddress < EndAddress) {
  37     LineOperation(AlignedAddress);
  38     AlignedAddress += LineLength;
  39   }
  40   ArmDataSynchronizationBarrier ();
  41 }
  42
  43 VOID
  44 EFIAPI
  45 InvalidateInstructionCache (
  46   VOID
  47   )
  48 {
  49   ASSERT (FALSE);
  50 }
  51
  52 VOID
  53 EFIAPI
  54 InvalidateDataCache (
  55   VOID
  56   )
  57 {
  58   ASSERT (FALSE);
  59 }
  60
  61 VOID *
  62 EFIAPI
  63 InvalidateInstructionCacheRange (
  64   IN      VOID                      *Address,
  65   IN      UINTN                     Length
  66   )
  67 {
  68   CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
  69     ArmDataCacheLineLength ());
  70   CacheRangeOperation (Address, Length,
  71     ArmInvalidateInstructionCacheEntryToPoUByMVA,
  72     ArmInstructionCacheLineLength ());
  73
  74   ArmInstructionSynchronizationBarrier ();
  75
  76   return Address;
  77 }
  78
  79 VOID
  80 EFIAPI
  81 WriteBackInvalidateDataCache (
  82   VOID
  83   )
  84 {
  85   ASSERT (FALSE);
  86 }
  87
  88 VOID *
  89 EFIAPI
  90 WriteBackInvalidateDataCacheRange (
  91   IN      VOID                      *Address,
  92   IN      UINTN                     Length
  93   )
  94 {
  95   CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
  96     ArmDataCacheLineLength ());
  97   return Address;
  98 }
  99
 100 VOID
 101 EFIAPI
 102 WriteBackDataCache (
 103   VOID
 104   )
 105 {
 106   ASSERT (FALSE);
 107 }
 108
 109 VOID *
 110 EFIAPI
 111 WriteBackDataCacheRange (
 112   IN      VOID                      *Address,
 113   IN      UINTN                     Length
 114   )
 115 {
 116   CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
 117     ArmDataCacheLineLength ());
 118   return Address;
 119 }
 120
 121 VOID *
 122 EFIAPI
 123 InvalidateDataCacheRange (
 124   IN      VOID                      *Address,
 125   IN      UINTN                     Length
 126   )
 127 {
 128   CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
 129     ArmDataCacheLineLength ());
 130   return Address;
 131 }