3 * Copyright (c) 2014, ARM Limited. All rights reserved.
5 * SPDX-License-Identifier: BSD-2-Clause-Patent
9 #include <Library/ArmLib.h>
10 #include <Library/ArmGicLib.h>
12 STATIC ARM_GIC_ARCH_REVISION mGicArchRevision
;
16 ArmGicArchLibInitialize (
22 // Ideally we would like to use the GICC IIDR Architecture version here, but
23 // this does not seem to be very reliable as the implementation could easily
24 // get it wrong. It is more reliable to check if the GICv3 System Register
25 // feature is implemented on the CPU. This is also convenient as our GICv3
26 // driver requires SRE. If only Memory mapped access is available we try to
27 // drive the GIC as a v2.
28 if (ArmReadIdPfr0 () & AARCH64_PFR0_GIC
) {
29 // Make sure System Register access is enabled (SRE). This depends on the
30 // higher privilege level giving us permission, otherwise we will either
31 // cause an exception here, or the write doesn't stick in which case we need
32 // to fall back to the GICv2 MMIO interface.
33 // Note: We do not need to set ICC_SRE_EL2.Enable because the OS is started
34 // at the same exception level.
35 // It is the OS responsibility to set this bit.
36 IccSre
= ArmGicV3GetControlSystemRegisterEnable ();
37 if (!(IccSre
& ICC_SRE_EL2_SRE
)) {
38 ArmGicV3SetControlSystemRegisterEnable (IccSre
| ICC_SRE_EL2_SRE
);
39 IccSre
= ArmGicV3GetControlSystemRegisterEnable ();
41 if (IccSre
& ICC_SRE_EL2_SRE
) {
42 mGicArchRevision
= ARM_GIC_ARCH_REVISION_3
;
47 mGicArchRevision
= ARM_GIC_ARCH_REVISION_2
;
50 return RETURN_SUCCESS
;
55 ArmGicGetSupportedArchRevision (
59 return mGicArchRevision
;