1 #------------------------------------------------------------------------------
3 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
4 # Copyright (c) 2011 - 2016, ARM Limited. All rights reserved.
5 # Copyright (c) 2016, Linaro Limited. All rights reserved.
7 # This program and the accompanying materials
8 # are licensed and made available under the terms and conditions of the BSD License
9 # which accompanies this distribution. The full text of the license may be found at
10 # http://opensource.org/licenses/bsd-license.php
12 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
13 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #------------------------------------------------------------------------------
17 #include <AsmMacroIoLib.h>
23 ASM_FUNC(ArmCacheInfo)
27 ASM_FUNC(ArmGetInterruptState)
29 tst R0,#0x80 @Check if IRQ is enabled.
34 ASM_FUNC(ArmGetFiqState)
36 tst R0,#0x40 @Check if FIQ is enabled.
41 ASM_FUNC(ArmSetDomainAccessControl)
45 ASM_FUNC(CPSRMaskInsert) @ on entry, r0 is the mask and r1 is the field to insert
46 stmfd sp!, {r4-r12, lr} @ save all the banked registers
47 mov r3, sp @ copy the stack pointer into a non-banked register
48 mrs r2, cpsr @ read the cpsr
49 bic r2, r2, r0 @ clear mask in the cpsr
50 and r1, r1, r0 @ clear bits outside the mask in the input
51 orr r2, r2, r1 @ set field
52 msr cpsr_cxsf, r2 @ write back cpsr (may have caused a mode switch)
54 mov sp, r3 @ restore stack pointer
55 ldmfd sp!, {r4-r12, lr} @ restore registers
56 bx lr @ return (hopefully thumb-safe!)
62 ASM_FUNC(ArmReadCpacr)
63 mrc p15, 0, r0, c1, c0, 2
66 ASM_FUNC(ArmWriteCpacr)
67 mcr p15, 0, r0, c1, c0, 2
71 ASM_FUNC(ArmWriteAuxCr)
72 mcr p15, 0, r0, c1, c0, 1
75 ASM_FUNC(ArmReadAuxCr)
76 mrc p15, 0, r0, c1, c0, 1
85 mcr p15, 0, r0, c2, c0, 2
89 ASM_FUNC(ArmGetTTBR0BaseAddress)
91 MOV32 (r1, 0xFFFFC000)
98 //ArmUpdateTranslationTableEntry (
99 // IN VOID *TranslationTableEntry // R0
100 // IN VOID *MVA // R1
102 ASM_FUNC(ArmUpdateTranslationTableEntry)
103 mcr p15,0,R0,c7,c14,1 @ DCCIMVAC Clean data cache by MVA
105 mcr p15,0,R1,c8,c7,1 @ TLBIMVA TLB Invalidate MVA
106 mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
111 ASM_FUNC(ArmInvalidateTlb)
114 mcr p15,0,R9,c7,c5,6 @ BPIALL Invalidate Branch predictor array. R9 == NoOp
120 mrc p15, 0, r0, c1, c1, 0
123 ASM_FUNC(ArmWriteScr)
124 mcr p15, 0, r0, c1, c1, 0
128 ASM_FUNC(ArmReadHVBar)
129 mrc p15, 4, r0, c12, c0, 0
132 ASM_FUNC(ArmWriteHVBar)
133 mcr p15, 4, r0, c12, c0, 0
136 ASM_FUNC(ArmReadMVBar)
137 mrc p15, 0, r0, c12, c0, 1
140 ASM_FUNC(ArmWriteMVBar)
141 mcr p15, 0, r0, c12, c0, 1
152 ASM_FUNC(ArmReadSctlr)
153 mrc p15, 0, r0, c1, c0, 0 @ Read SCTLR into R0 (Read control register configuration data)
156 ASM_FUNC(ArmWriteSctlr)
157 mcr p15, 0, r0, c1, c0, 0
160 ASM_FUNC(ArmReadCpuActlr)
161 mrc p15, 0, r0, c1, c0, 1
164 ASM_FUNC(ArmWriteCpuActlr)
165 mcr p15, 0, r0, c1, c0, 1
170 ASM_FUNCTION_REMOVE_IF_UNREFERENCED