ArmPkg/Library/ArmLib/Arm/ArmLibSupportV7.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 # Copyright (c) 2011-2013, ARM Limited. All rights reserved.
   5 # Copyright (c) 2016, Linaro Limited. All rights reserved.
   6 #
   7 # SPDX-License-Identifier: BSD-2-Clause-Patent
   8 #
   9 #------------------------------------------------------------------------------
  10
  11 #include <AsmMacroIoLib.h>
  12
  13 ASM_FUNC(ArmIsMpCore)
  14   mrc     p15,0,R0,c0,c0,5
  15   // Get Multiprocessing extension (bit31) & U bit (bit30)
  16   and     R0, R0, #0xC0000000
  17   // if (bit31 == 1) && (bit30 == 0) then the processor is part of a multiprocessor system
  18   cmp     R0, #0x80000000
  19   moveq   R0, #1
  20   movne   R0, #0
  21   bx      LR
  22
  23 ASM_FUNC(ArmEnableAsynchronousAbort)
  24   cpsie   a
  25   isb
  26   bx      LR
  27
  28 ASM_FUNC(ArmDisableAsynchronousAbort)
  29   cpsid   a
  30   isb
  31   bx      LR
  32
  33 ASM_FUNC(ArmEnableIrq)
  34   cpsie   i
  35   isb
  36   bx      LR
  37
  38 ASM_FUNC(ArmDisableIrq)
  39   cpsid   i
  40   isb
  41   bx      LR
  42
  43 ASM_FUNC(ArmEnableFiq)
  44   cpsie   f
  45   isb
  46   bx      LR
  47
  48 ASM_FUNC(ArmDisableFiq)
  49   cpsid   f
  50   isb
  51   bx      LR
  52
  53 ASM_FUNC(ArmEnableInterrupts)
  54   cpsie   if
  55   isb
  56   bx      LR
  57
  58 ASM_FUNC(ArmDisableInterrupts)
  59   cpsid   if
  60   isb
  61   bx      LR
  62
  63 ASM_FUNC(ArmReadIdMmfr4)
  64   mrc    p15,0,r0,c0,c2,6     @ Read ID_MMFR4 Register
  65   bx     lr
  66
  67 // UINTN
  68 // ReadCCSIDR (
  69 //   IN UINT32 CSSELR
  70 //   )
  71 ASM_FUNC(ReadCCSIDR)
  72   mcr p15,2,r0,c0,c0,0   @ Write Cache Size Selection Register (CSSELR)
  73   isb
  74   mrc p15,1,r0,c0,c0,0   @ Read current CP15 Cache Size ID Register (CCSIDR)
  75   bx  lr
  76
  77 // UINT32
  78 // ReadCCSIDR2 (
  79 //   IN UINT32 CSSELR
  80 //   )
  81 ASM_FUNC(ReadCCSIDR2)
  82   mcr p15,2,r0,c0,c0,0   @ Write Cache Size Selection Register (CSSELR)
  83   isb
  84   mrc p15,1,r0,c0,c0,2   @ Read current CP15 Cache Size ID Register (CCSIDR2)
  85   bx  lr
  86
  87 // UINT32
  88 // ReadCLIDR (
  89 //   IN UINT32 CSSELR
  90 //   )
  91 ASM_FUNC(ReadCLIDR)
  92   mrc p15,1,r0,c0,c0,1 @ Read CP15 Cache Level ID Register
  93   bx  lr
  94
  95 ASM_FUNC(ArmReadNsacr)
  96   mrc     p15, 0, r0, c1, c1, 2
  97   bx      lr
  98
  99 ASM_FUNC(ArmWriteNsacr)
 100   mcr     p15, 0, r0, c1, c1, 2
 101   bx      lr
 102
 103 ASM_FUNCTION_REMOVE_IF_UNREFERENCED