ArmPkg/Library/ArmLib/Arm9/Arm9Support.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 #
   5 # This program and the accompanying materials
   6 # are licensed and made available under the terms and conditions of the BSD License
   7 # which accompanies this distribution.  The full text of the license may be found at
   8 # http://opensource.org/licenses/bsd-license.php
   9 #
  10 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 #
  13 #------------------------------------------------------------------------------
  14
  15 .text
  16 .align 2
  17 .globl ASM_PFX(ArmCleanInvalidateDataCache)
  18 INTERWORK_FUNC(ArmCleanInvalidateDataCache)
  19 .globl ASM_PFX(ArmCleanDataCache)
  20 INTERWORK_FUNC(ArmCleanDataCache)
  21 .globl ASM_PFX(ArmInvalidateDataCache)
  22 INTERWORK_FUNC(ArmInvalidateDataCache)
  23 .globl ASM_PFX(ArmInvalidateInstructionCache)
  24 INTERWORK_FUNC(ArmInvalidateInstructionCache)
  25 .globl ASM_PFX(ArmInvalidateDataCacheEntryByMVA)
  26 INTERWORK_FUNC(ArmInvalidateDataCacheEntryByMVA)
  27 .globl ASM_PFX(ArmCleanDataCacheEntryByMVA)
  28 INTERWORK_FUNC(ArmCleanDataCacheEntryByMVA)
  29 .globl ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA)
  30 INTERWORK_FUNC(ArmCleanInvalidateDataCacheEntryByMVA)
  31 .globl ASM_PFX(ArmEnableMmu)
  32 INTERWORK_FUNC(ArmEnableMmu)
  33 .globl ASM_PFX(ArmDisableMmu)
  34 INTERWORK_FUNC(ArmDisableMmu)
  35 .globl ASM_PFX(ArmMmuEnabled)
  36 INTERWORK_FUNC(ArmMmuEnabled)
  37 .globl ASM_PFX(ArmEnableDataCache)
  38 INTERWORK_FUNC(ArmEnableDataCache)
  39 .globl ASM_PFX(ArmDisableDataCache)
  40 INTERWORK_FUNC(ArmDisableDataCache)
  41 .globl ASM_PFX(ArmEnableInstructionCache)
  42 INTERWORK_FUNC(ArmEnableInstructionCache)
  43 .globl ASM_PFX(ArmDisableInstructionCache)
  44 INTERWORK_FUNC(ArmDisableInstructionCache)
  45 .globl ASM_PFX(ArmEnableBranchPrediction)
  46 INTERWORK_FUNC(ArmEnableBranchPrediction)
  47 .globl ASM_PFX(ArmDisableBranchPrediction)
  48 INTERWORK_FUNC(ArmDisableBranchPrediction)
  49 .globl ASM_PFX(ArmDataMemoryBarrier)
  50 INTERWORK_FUNC(ArmDataMemoryBarrier)
  51 .globl ASM_PFX(ArmDataSyncronizationBarrier)
  52 INTERWORK_FUNC(ArmDataSyncronizationBarrier)
  53 .globl ASM_PFX(ArmInstructionSynchronizationBarrier)
  54 INTERWORK_FUNC(ArmInstructionSynchronizationBarrier)
  55
  56
  57 .set DC_ON, (1<<2)
  58 .set IC_ON, (1<<12)
  59
  60 #------------------------------------------------------------------------------
  61
  62 ASM_PFX(ArmInvalidateDataCacheEntryByMVA):
  63   mcr     p15, 0, r0, c7, c6, 1   @ invalidate single data cache line
  64   bx      lr
  65
  66 ASM_PFX(ArmCleanDataCacheEntryByMVA):
  67   mcr     p15, 0, r0, c7, c10, 1  @ clean single data cache line
  68   bx      lr
  69
  70 ASM_PFX(ArmCleanInvalidateDataCacheEntryByMVA):
  71   mcr     p15, 0, r0, c7, c14, 1  @ clean and invalidate single data cache line
  72   bx      lr
  73
  74 ASM_PFX(ArmEnableInstructionCache):
  75   ldr    r1,=IC_ON
  76   mrc    p15,0,r0,c1,c0,0     @Read control register configuration data
  77   orr    r0,r0,r1             @Set I bit
  78   mcr    p15,0,r0,c1,c0,0     @Write control register configuration data
  79   bx     LR
  80
  81 ASM_PFX(ArmDisableInstructionCache):
  82   ldr    r1,=IC_ON
  83   mrc    p15,0,r0,c1,c0,0     @Read control register configuration data
  84   bic    r0,r0,r1             @Clear I bit.
  85   mcr    p15,0,r0,c1,c0,0     @Write control register configuration data
  86   bx     LR
  87
  88 ASM_PFX(ArmInvalidateInstructionCache):
  89   mov     r0,#0
  90   mcr     p15,0,r0,c7,c5,0     @Invalidate entire Instruction cache.
  91                                @Also flushes the branch target cache.
  92   mov     r0,#0
  93   mcr     p15,0,r0,c7,c10,4    @Data write buffer
  94   bx      LR
  95
  96 ASM_PFX(ArmEnableMmu):
  97   mrc     p15,0,R0,c1,c0,0
  98   orr     R0,R0,#1
  99   mcr     p15,0,R0,c1,c0,0
 100   bx      LR
 101
 102 ASM_PFX(ArmMmuEnabled):
 103   mrc     p15,0,R0,c1,c0,0
 104   and     R0,R0,#1
 105   bx      LR
 106
 107 ASM_PFX(ArmDisableMmu):
 108   mrc     p15,0,R0,c1,c0,0
 109   bic     R0,R0,#1
 110   mcr     p15,0,R0,c1,c0,0
 111   mov     R0,#0
 112   mcr     p15,0,R0,c7,c10,4     @Drain write buffer
 113   bx      LR
 114
 115 ASM_PFX(ArmEnableDataCache):
 116   ldr     R1,=DC_ON
 117   mrc     p15,0,R0,c1,c0,0      @Read control register configuration data
 118   orr     R0,R0,R1              @Set C bit
 119   mcr     p15,0,r0,c1,c0,0      @Write control register configuration data
 120   bx      LR
 121
 122 ASM_PFX(ArmDisableDataCache):
 123   ldr     R1,=DC_ON
 124   mrc     p15,0,R0,c1,c0,0      @Read control register configuration data
 125   bic     R0,R0,R1              @Clear C bit
 126   mcr     p15,0,r0,c1,c0,0      @Write control register configuration data
 127   bx      LR
 128
 129 ASM_PFX(ArmCleanDataCache):
 130   mrc     p15,0,r15,c7,c10,3
 131   bne     ASM_PFX(ArmCleanDataCache)
 132   mov     R0,#0
 133   mcr     p15,0,R0,c7,c10,4     @Drain write buffer
 134   bx      LR
 135
 136 ASM_PFX(ArmInvalidateDataCache):
 137   mov     R0,#0
 138   mcr     p15,0,R0,c7,c6,0        @Invalidate entire data cache
 139   mov     R0,#0
 140   mcr     p15,0,R0,c7,c10,4       @Drain write buffer
 141   bx      LR
 142
 143 ASM_PFX(ArmCleanInvalidateDataCache):
 144   mrc     p15,0,r15,c7,c14,3
 145   bne     ASM_PFX(ArmCleanInvalidateDataCache)
 146   mov     R0,#0
 147   mcr     p15,0,R0,c7,c10,4           @Drain write buffer
 148   bx      LR
 149
 150 ASM_PFX(ArmEnableBranchPrediction):
 151   bx      LR                      @Branch prediction is not supported.
 152
 153 ASM_PFX(ArmDisableBranchPrediction):
 154   bx      LR                      @Branch prediction is not supported.
 155
 156 ASM_PFX(ArmDataMemoryBarrier):
 157   mov R0, #0
 158   mcr P15, #0, R0, C7, C10, #5    @ check if this is OK?
 159   bx      LR
 160
 161 ASM_PFX(ArmDataSyncronizationBarrier):
 162   mov R0, #0
 163   mcr P15, #0, R0, C7, C10, #4   @ check if this is OK?
 164   bx      LR
 165
 166 ASM_PFX(ArmInstructionSynchronizationBarrier):
 167   mov R0, #0
 168   mcr P15, #0, R0, C7, C5, #4     @ check if this is OK?
 169   bx      LR
 170
 171 ASM_FUNCTION_REMOVE_IF_UNREFERENCED
 172