ArmPkg/Library/CompilerIntrinsicsLib/Arm/div.asm

   1 //------------------------------------------------------------------------------
   2 //
   3 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 // Copyright (c) 2018, Pete Batard. All rights reserved.<BR>
   5 //
   6 // This program and the accompanying materials
   7 // are licensed and made available under the terms and conditions of the BSD License
   8 // which accompanies this distribution.  The full text of the license may be found at
   9 // http://opensource.org/licenses/bsd-license.php
  10 //
  11 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 //
  14 //------------------------------------------------------------------------------
  15
  16
  17     EXPORT  __aeabi_uidiv
  18     EXPORT  __aeabi_uidivmod
  19     EXPORT  __aeabi_idiv
  20     EXPORT  __aeabi_idivmod
  21     EXPORT  __rt_udiv
  22     EXPORT  __rt_sdiv
  23
  24     AREA  Math, CODE, READONLY
  25
  26 ;
  27 ;UINT32
  28 ;EFIAPI
  29 ;__aeabi_uidivmod (
  30 ;  IN UINT32  Dividend
  31 ;  IN UINT32  Divisor
  32 ;  );
  33 ;
  34 __aeabi_uidiv
  35 __aeabi_uidivmod
  36     RSBS    r12, r1, r0, LSR #4
  37     MOV     r2, #0
  38     BCC     __arm_div4
  39     RSBS    r12, r1, r0, LSR #8
  40     BCC     __arm_div8
  41     MOV     r3, #0
  42     B       __arm_div_large
  43
  44 ;
  45 ;UINT64
  46 ;EFIAPI
  47 ;__rt_udiv (
  48 ;  IN UINT32  Divisor,
  49 ;  IN UINT32  Dividend
  50 ;  );
  51 ;
  52 __rt_udiv
  53     ; Swap R0 and R1
  54     MOV     r12, r0
  55     MOV     r0, r1
  56     MOV     r1, r12
  57     B       __aeabi_uidivmod
  58
  59 ;
  60 ;UINT64
  61 ;EFIAPI
  62 ;__rt_sdiv (
  63 ;  IN INT32  Divisor,
  64 ;  IN INT32  Dividend
  65 ;  );
  66 ;
  67 __rt_sdiv
  68     ; Swap R0 and R1
  69     MOV     r12, r0
  70     MOV     r0, r1
  71     MOV     r1, r12
  72     B       __aeabi_idivmod
  73
  74 ;
  75 ;INT32
  76 ;EFIAPI
  77 ;__aeabi_idivmod (
  78 ;  IN INT32  Dividend
  79 ;  IN INT32  Divisor
  80 ;  );
  81 ;
  82 __aeabi_idiv
  83 __aeabi_idivmod
  84     ORRS    r12, r0, r1
  85     BMI     __arm_div_negative
  86     RSBS    r12, r1, r0, LSR #1
  87     MOV     r2, #0
  88     BCC     __arm_div1
  89     RSBS    r12, r1, r0, LSR #4
  90     BCC     __arm_div4
  91     RSBS    r12, r1, r0, LSR #8
  92     BCC     __arm_div8
  93     MOV     r3, #0
  94     B       __arm_div_large
  95 __arm_div8
  96     RSBS    r12, r1, r0, LSR #7
  97     SUBCS   r0, r0, r1, LSL #7
  98     ADC     r2, r2, r2
  99     RSBS    r12, r1, r0,LSR #6
 100     SUBCS   r0, r0, r1, LSL #6
 101     ADC     r2, r2, r2
 102     RSBS    r12, r1, r0, LSR #5
 103     SUBCS   r0, r0, r1, LSL #5
 104     ADC     r2, r2, r2
 105     RSBS    r12, r1, r0, LSR #4
 106     SUBCS   r0, r0, r1, LSL #4
 107     ADC     r2, r2, r2
 108 __arm_div4
 109     RSBS    r12, r1, r0, LSR #3
 110     SUBCS   r0, r0, r1, LSL #3
 111     ADC     r2, r2, r2
 112     RSBS    r12, r1, r0, LSR #2
 113     SUBCS   r0, r0, r1, LSL #2
 114     ADCS    r2, r2, r2
 115     RSBS    r12, r1, r0, LSR #1
 116     SUBCS   r0, r0, r1, LSL #1
 117     ADC     r2, r2, r2
 118 __arm_div1
 119     SUBS    r1, r0, r1
 120     MOVCC   r1, r0
 121     ADC     r0, r2, r2
 122     BX      r14
 123 __arm_div_negative
 124     ANDS    r2, r1, #0x80000000
 125     RSBMI   r1, r1, #0
 126     EORS    r3, r2, r0, ASR #32
 127     RSBCS   r0, r0, #0
 128     RSBS    r12, r1, r0, LSR #4
 129     BCC     label1
 130     RSBS    r12, r1, r0, LSR #8
 131     BCC     label2
 132 __arm_div_large
 133     LSL     r1, r1, #6
 134     RSBS    r12, r1, r0, LSR #8
 135     ORR     r2, r2, #0xfc000000
 136     BCC     label2
 137     LSL     r1, r1, #6
 138     RSBS    r12, r1, r0, LSR #8
 139     ORR     r2, r2, #0x3f00000
 140     BCC     label2
 141     LSL     r1, r1, #6
 142     RSBS    r12, r1, r0, LSR #8
 143     ORR     r2, r2, #0xfc000
 144     ORRCS   r2, r2, #0x3f00
 145     LSLCS   r1, r1, #6
 146     RSBS    r12, r1, #0
 147     BCS     __aeabi_idiv0
 148 label3
 149     LSRCS   r1, r1, #6
 150 label2
 151     RSBS    r12, r1, r0, LSR #7
 152     SUBCS   r0, r0, r1, LSL #7
 153     ADC     r2, r2, r2
 154     RSBS    r12, r1, r0, LSR #6
 155     SUBCS   r0, r0, r1, LSL #6
 156     ADC     r2, r2, r2
 157     RSBS    r12, r1, r0, LSR #5
 158     SUBCS   r0, r0, r1, LSL #5
 159     ADC     r2, r2, r2
 160     RSBS    r12, r1, r0, LSR #4
 161     SUBCS   r0, r0, r1, LSL #4
 162     ADC     r2, r2, r2
 163 label1
 164     RSBS    r12, r1, r0, LSR #3
 165     SUBCS   r0, r0, r1, LSL #3
 166     ADC     r2, r2, r2
 167     RSBS    r12, r1, r0, LSR #2
 168     SUBCS   r0, r0, r1, LSL #2
 169     ADCS    r2, r2, r2
 170     BCS     label3
 171     RSBS    r12, r1, r0, LSR #1
 172     SUBCS   r0, r0, r1, LSL #1
 173     ADC     r2, r2, r2
 174     SUBS    r1, r0, r1
 175     MOVCC   r1, r0
 176     ADC     r0, r2, r2
 177     ASRS    r3, r3, #31
 178     RSBMI   r0, r0, #0
 179     RSBCS   r1, r1, #0
 180     BX      r14
 181
 182     ; What to do about division by zero?  For now, just return.
 183 __aeabi_idiv0
 184     BX      r14
 185
 186     END