ArmPkg/Library/CompilerIntrinsicsLib/Arm/udivmoddi4.S

   1 #------------------------------------------------------------------------------
   2 #
   3 # Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 #
   5 # SPDX-License-Identifier: BSD-2-Clause-Patent
   6 #
   7 #------------------------------------------------------------------------------
   8
   9 #include <AsmMacroIoLib.h>
  10
  11   .syntax unified
  12
  13 ASM_FUNC(__udivmoddi4)
  14   stmfd  sp!, {r4, r5, r6, r7, lr}
  15   add  r7, sp, #12
  16   stmfd  sp!, {r10, r11}
  17   sub  sp, sp, #20
  18   stmia  sp, {r2-r3}
  19   ldr  r6, [sp, #48]
  20   orrs  r2, r2, r3
  21   mov  r10, r0
  22   mov  r11, r1
  23   beq  L2
  24   subs  ip, r1, #0
  25   bne  L4
  26   cmp  r3, #0
  27   bne  L6
  28   cmp  r6, #0
  29   beq  L8
  30   mov  r1, r2
  31   bl  ASM_PFX(__umodsi3)
  32   mov  r1, #0
  33   stmia  r6, {r0-r1}
  34 L8:
  35   ldr  r1, [sp, #0]
  36   mov  r0, r10
  37   b  L45
  38 L6:
  39   cmp  r6, #0
  40   movne  r1, #0
  41   stmiane  r6, {r0-r1}
  42   b  L2
  43 L4:
  44   ldr  r1, [sp, #0]
  45   cmp  r1, #0
  46   bne  L12
  47   ldr  r2, [sp, #4]
  48   cmp  r2, #0
  49   bne  L14
  50   cmp  r6, #0
  51   beq  L16
  52   mov  r1, r2
  53   mov  r0, r11
  54   bl  ASM_PFX(__umodsi3)
  55   mov  r1, #0
  56   stmia  r6, {r0-r1}
  57 L16:
  58   ldr  r1, [sp, #4]
  59   mov  r0, r11
  60 L45:
  61   bl  ASM_PFX(__udivsi3)
  62 L46:
  63   mov  r10, r0
  64   mov  r11, #0
  65   b  L10
  66 L14:
  67   subs  r1, r0, #0
  68   bne  L18
  69   cmp  r6, #0
  70   beq  L16
  71   ldr  r1, [sp, #4]
  72   mov  r0, r11
  73   bl  ASM_PFX(__umodsi3)
  74   mov  r4, r10
  75   mov  r5, r0
  76   stmia  r6, {r4-r5}
  77   b  L16
  78 L18:
  79   sub  r3, r2, #1
  80   tst  r2, r3
  81   bne  L22
  82   cmp  r6, #0
  83   movne  r4, r0
  84   andne  r5, ip, r3
  85   stmiane  r6, {r4-r5}
  86 L24:
  87   rsb  r3, r2, #0
  88   and  r3, r2, r3
  89   clz  r3, r3
  90   rsb  r3, r3, #31
  91   mov  r0, ip, lsr r3
  92   b  L46
  93 L22:
  94   clz  r2, r2
  95   clz  r3, ip
  96   rsb  r3, r3, r2
  97   cmp  r3, #30
  98   bhi  L48
  99   rsb  r2, r3, #31
 100   add  lr, r3, #1
 101   mov  r3, r1, asl r2
 102   str  r3, [sp, #12]
 103   mov  r3, r1, lsr lr
 104   ldr  r0, [sp, #0]
 105   mov  r5, ip, lsr lr
 106   orr  r4, r3, ip, asl r2
 107   str  r0, [sp, #8]
 108   b  L29
 109 L12:
 110   ldr  r3, [sp, #4]
 111   cmp  r3, #0
 112   bne  L30
 113   sub  r3, r1, #1
 114   tst  r1, r3
 115   bne  L32
 116   cmp  r6, #0
 117   andne  r3, r3, r0
 118   movne  r2, r3
 119   movne  r3, #0
 120   stmiane  r6, {r2-r3}
 121 L34:
 122   cmp  r1, #1
 123   beq  L10
 124   rsb  r3, r1, #0
 125   and  r3, r1, r3
 126   clz  r3, r3
 127   rsb  r0, r3, #31
 128   mov  r1, ip, lsr r0
 129   rsb  r3, r0, #32
 130   mov  r0, r10, lsr r0
 131   orr  ip, r0, ip, asl r3
 132   str  r1, [sp, #12]
 133   str  ip, [sp, #8]
 134   ldrd  r10, [sp, #8]
 135   b  L10
 136 L32:
 137   clz  r2, r1
 138   clz  r3, ip
 139   rsb  r3, r3, r2
 140   rsb  r4, r3, #31
 141   mov  r2, r0, asl r4
 142   mvn  r1, r3
 143   and  r2, r2, r1, asr #31
 144   add  lr, r3, #33
 145   str  r2, [sp, #8]
 146   add  r2, r3, #1
 147   mov  r3, r3, asr #31
 148   and  r0, r3, r0, asl r1
 149   mov  r3, r10, lsr r2
 150   orr  r3, r3, ip, asl r4
 151   and  r3, r3, r1, asr #31
 152   orr  r0, r0, r3
 153   mov  r3, ip, lsr lr
 154   str  r0, [sp, #12]
 155   mov  r0, r10, lsr lr
 156   and  r5, r3, r2, asr #31
 157   rsb  r3, lr, #31
 158   mov  r3, r3, asr #31
 159   orr  r0, r0, ip, asl r1
 160   and  r3, r3, ip, lsr r2
 161   and  r0, r0, r2, asr #31
 162   orr  r4, r3, r0
 163   b  L29
 164 L30:
 165   clz  r2, r3
 166   clz  r3, ip
 167   rsb  r3, r3, r2
 168   cmp  r3, #31
 169   bls  L37
 170 L48:
 171   cmp  r6, #0
 172   stmiane  r6, {r10-r11}
 173   b  L2
 174 L37:
 175   rsb  r1, r3, #31
 176   mov  r0, r0, asl r1
 177   add  lr, r3, #1
 178   mov  r2, #0
 179   str  r0, [sp, #12]
 180   mov  r0, r10, lsr lr
 181   str  r2, [sp, #8]
 182   sub  r2, r3, #31
 183   and  r0, r0, r2, asr #31
 184   mov  r3, ip, lsr lr
 185   orr  r4, r0, ip, asl r1
 186   and  r5, r3, r2, asr #31
 187 L29:
 188   mov  ip, #0
 189   mov  r10, ip
 190   b  L40
 191 L41:
 192   ldr  r1, [sp, #12]
 193   ldr  r2, [sp, #8]
 194   mov  r3, r4, lsr #31
 195   orr  r5, r3, r5, asl #1
 196   mov  r3, r1, lsr #31
 197   orr  r4, r3, r4, asl #1
 198   mov  r3, r2, lsr #31
 199   orr  r0, r3, r1, asl #1
 200   orr  r1, ip, r2, asl #1
 201   ldmia  sp, {r2-r3}
 202   str  r0, [sp, #12]
 203   subs  r2, r2, r4
 204   sbc  r3, r3, r5
 205   str  r1, [sp, #8]
 206   subs  r0, r2, #1
 207   sbc  r1, r3, #0
 208   mov  r2, r1, asr #31
 209   ldmia  sp, {r0-r1}
 210   mov  r3, r2
 211   and  ip, r2, #1
 212   and  r3, r3, r1
 213   and  r2, r2, r0
 214   subs  r4, r4, r2
 215   sbc  r5, r5, r3
 216   add  r10, r10, #1
 217 L40:
 218   cmp  r10, lr
 219   bne  L41
 220   ldrd  r0, [sp, #8]
 221   adds  r0, r0, r0
 222   adc  r1, r1, r1
 223   cmp  r6, #0
 224   orr  r10, r0, ip
 225   mov  r11, r1
 226   stmiane  r6, {r4-r5}
 227   b  L10
 228 L2:
 229   mov  r10, #0
 230   mov  r11, #0
 231 L10:
 232   mov  r0, r10
 233   mov  r1, r11
 234   sub  sp, r7, #20
 235   ldmfd  sp!, {r10, r11}
 236   ldmfd  sp!, {r4, r5, r6, r7, pc}