ArmPkg/Library/CompilerIntrinsicsLib/Arm/uldiv.S

   1 //------------------------------------------------------------------------------
   2 //
   3 // Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
   4 //
   5 // SPDX-License-Identifier: BSD-2-Clause-Patent
   6 //
   7 //------------------------------------------------------------------------------
   8
   9
  10
  11   .text
  12   .align 2
  13   GCC_ASM_EXPORT(__aeabi_uldivmod)
  14
  15 //
  16 //UINT64
  17 //EFIAPI
  18 //__aeabi_uldivmod (
  19 //  IN  UINT64   Dividend
  20 //  IN  UINT64   Divisor
  21 //  )
  22 //
  23 ASM_PFX(__aeabi_uldivmod):
  24   stmdb   sp!, {r4, r5, r6, lr}
  25   mov     r4, r1
  26   mov     r5, r0
  27   mov     r6, #0  // 0x0
  28   orrs    ip, r3, r2, lsr #31
  29   bne     ASM_PFX(__aeabi_uldivmod_label1)
  30   tst     r2, r2
  31   beq     ASM_PFX(_ll_div0)
  32   movs    ip, r2, lsr #15
  33   addeq   r6, r6, #16     // 0x10
  34   mov     ip, r2, lsl r6
  35   movs    lr, ip, lsr #23
  36   moveq   ip, ip, lsl #8
  37   addeq   r6, r6, #8      // 0x8
  38   movs    lr, ip, lsr #27
  39   moveq   ip, ip, lsl #4
  40   addeq   r6, r6, #4      // 0x4
  41   movs    lr, ip, lsr #29
  42   moveq   ip, ip, lsl #2
  43   addeq   r6, r6, #2      // 0x2
  44   movs    lr, ip, lsr #30
  45   moveq   ip, ip, lsl #1
  46   addeq   r6, r6, #1      // 0x1
  47   b       ASM_PFX(_ll_udiv_small)
  48 ASM_PFX(__aeabi_uldivmod_label1):
  49   tst     r3, #-2147483648        // 0x80000000
  50   bne     ASM_PFX(__aeabi_uldivmod_label2)
  51   movs    ip, r3, lsr #15
  52   addeq   r6, r6, #16     // 0x10
  53   mov     ip, r3, lsl r6
  54   movs    lr, ip, lsr #23
  55   moveq   ip, ip, lsl #8
  56   addeq   r6, r6, #8      // 0x8
  57   movs    lr, ip, lsr #27
  58   moveq   ip, ip, lsl #4
  59   addeq   r6, r6, #4      // 0x4
  60   movs    lr, ip, lsr #29
  61   moveq   ip, ip, lsl #2
  62   addeq   r6, r6, #2      // 0x2
  63   movs    lr, ip, lsr #30
  64   addeq   r6, r6, #1      // 0x1
  65   rsb     r3, r6, #32     // 0x20
  66   moveq   ip, ip, lsl #1
  67   orr     ip, ip, r2, lsr r3
  68   mov     lr, r2, lsl r6
  69   b       ASM_PFX(_ll_udiv_big)
  70 ASM_PFX(__aeabi_uldivmod_label2):
  71   mov     ip, r3
  72   mov     lr, r2
  73   b       ASM_PFX(_ll_udiv_ginormous)
  74
  75 ASM_PFX(_ll_udiv_small):
  76   cmp     r4, ip, lsl #1
  77   mov     r3, #0  // 0x0
  78   subcs   r4, r4, ip, lsl #1
  79   addcs   r3, r3, #2      // 0x2
  80   cmp     r4, ip
  81   subcs   r4, r4, ip
  82   adcs    r3, r3, #0      // 0x0
  83   add     r2, r6, #32     // 0x20
  84   cmp     r2, #32 // 0x20
  85   rsb     ip, ip, #0      // 0x0
  86   bcc     ASM_PFX(_ll_udiv_small_label1)
  87   orrs    r0, r4, r5, lsr #30
  88   moveq   r4, r5
  89   moveq   r5, #0  // 0x0
  90   subeq   r2, r2, #32     // 0x20
  91 ASM_PFX(_ll_udiv_small_label1):
  92   mov     r1, #0  // 0x0
  93   cmp     r2, #16 // 0x10
  94   bcc     ASM_PFX(_ll_udiv_small_label2)
  95   movs    r0, r4, lsr #14
  96   moveq   r4, r4, lsl #16
  97   addeq   r1, r1, #16     // 0x10
  98 ASM_PFX(_ll_udiv_small_label2):
  99   sub     lr, r2, r1
 100   cmp     lr, #8  // 0x8
 101   bcc     ASM_PFX(_ll_udiv_small_label3)
 102   movs    r0, r4, lsr #22
 103   moveq   r4, r4, lsl #8
 104   addeq   r1, r1, #8      // 0x8
 105 ASM_PFX(_ll_udiv_small_label3):
 106   rsb     r0, r1, #32     // 0x20
 107   sub     r2, r2, r1
 108   orr     r4, r4, r5, lsr r0
 109   mov     r5, r5, lsl r1
 110   cmp     r2, #1  // 0x1
 111   bcc     ASM_PFX(_ll_udiv_small_label5)
 112   sub     r2, r2, #1      // 0x1
 113   and     r0, r2, #7      // 0x7
 114   eor     r0, r0, #7      // 0x7
 115   adds    r0, r0, r0, lsl #1
 116   add     pc, pc, r0, lsl #2
 117   nop                     // (mov r0,r0)
 118 ASM_PFX(_ll_udiv_small_label4):
 119   adcs    r5, r5, r5
 120   adcs    r4, ip, r4, lsl #1
 121   rsbcc   r4, ip, r4
 122   adcs    r5, r5, r5
 123   adcs    r4, ip, r4, lsl #1
 124   rsbcc   r4, ip, r4
 125   adcs    r5, r5, r5
 126   adcs    r4, ip, r4, lsl #1
 127   rsbcc   r4, ip, r4
 128   adcs    r5, r5, r5
 129   adcs    r4, ip, r4, lsl #1
 130   rsbcc   r4, ip, r4
 131   adcs    r5, r5, r5
 132   adcs    r4, ip, r4, lsl #1
 133   rsbcc   r4, ip, r4
 134   adcs    r5, r5, r5
 135   adcs    r4, ip, r4, lsl #1
 136   rsbcc   r4, ip, r4
 137   adcs    r5, r5, r5
 138   adcs    r4, ip, r4, lsl #1
 139   rsbcc   r4, ip, r4
 140   adcs    r5, r5, r5
 141   adcs    r4, ip, r4, lsl #1
 142   sub     r2, r2, #8      // 0x8
 143   tst     r2, r2
 144   rsbcc   r4, ip, r4
 145   bpl     ASM_PFX(_ll_udiv_small_label4)
 146 ASM_PFX(_ll_udiv_small_label5):
 147   mov     r2, r4, lsr r6
 148   bic     r4, r4, r2, lsl r6
 149   adcs    r0, r5, r5
 150   adc     r1, r4, r4
 151   add     r1, r1, r3, lsl r6
 152   mov     r3, #0  // 0x0
 153   ldmia   sp!, {r4, r5, r6, pc}
 154
 155 ASM_PFX(_ll_udiv_big):
 156   subs    r0, r5, lr
 157   mov     r3, #0  // 0x0
 158   sbcs    r1, r4, ip
 159   movcs   r5, r0
 160   movcs   r4, r1
 161   adcs    r3, r3, #0      // 0x0
 162   subs    r0, r5, lr
 163   sbcs    r1, r4, ip
 164   movcs   r5, r0
 165   movcs   r4, r1
 166   adcs    r3, r3, #0      // 0x0
 167   subs    r0, r5, lr
 168   sbcs    r1, r4, ip
 169   movcs   r5, r0
 170   movcs   r4, r1
 171   adcs    r3, r3, #0      // 0x0
 172   mov     r1, #0  // 0x0
 173   rsbs    lr, lr, #0      // 0x0
 174   rsc     ip, ip, #0      // 0x0
 175   cmp     r6, #16 // 0x10
 176   bcc     ASM_PFX(_ll_udiv_big_label1)
 177   movs    r0, r4, lsr #14
 178   moveq   r4, r4, lsl #16
 179   addeq   r1, r1, #16     // 0x10
 180 ASM_PFX(_ll_udiv_big_label1):
 181   sub     r2, r6, r1
 182   cmp     r2, #8  // 0x8
 183   bcc     ASM_PFX(_ll_udiv_big_label2)
 184   movs    r0, r4, lsr #22
 185   moveq   r4, r4, lsl #8
 186   addeq   r1, r1, #8      // 0x8
 187 ASM_PFX(_ll_udiv_big_label2):
 188   rsb     r0, r1, #32     // 0x20
 189   sub     r2, r6, r1
 190   orr     r4, r4, r5, lsr r0
 191   mov     r5, r5, lsl r1
 192   cmp     r2, #1  // 0x1
 193   bcc     ASM_PFX(_ll_udiv_big_label4)
 194   sub     r2, r2, #1      // 0x1
 195   and     r0, r2, #3      // 0x3
 196   rsb     r0, r0, #3      // 0x3
 197   adds    r0, r0, r0, lsl #1
 198   add     pc, pc, r0, lsl #3
 199   nop                     // (mov r0,r0)
 200 ASM_PFX(_ll_udiv_big_label3):
 201   adcs    r5, r5, r5
 202   adcs    r4, r4, r4
 203   adcs    r0, lr, r5
 204   adcs    r1, ip, r4
 205   movcs   r5, r0
 206   movcs   r4, r1
 207   adcs    r5, r5, r5
 208   adcs    r4, r4, r4
 209   adcs    r0, lr, r5
 210   adcs    r1, ip, r4
 211   movcs   r5, r0
 212   movcs   r4, r1
 213   adcs    r5, r5, r5
 214   adcs    r4, r4, r4
 215   adcs    r0, lr, r5
 216   adcs    r1, ip, r4
 217   movcs   r5, r0
 218   movcs   r4, r1
 219   sub     r2, r2, #4      // 0x4
 220   adcs    r5, r5, r5
 221   adcs    r4, r4, r4
 222   adcs    r0, lr, r5
 223   adcs    r1, ip, r4
 224   tst     r2, r2
 225   movcs   r5, r0
 226   movcs   r4, r1
 227   bpl     ASM_PFX(_ll_udiv_big_label3)
 228 ASM_PFX(_ll_udiv_big_label4):
 229   mov     r1, #0  // 0x0
 230   mov     r2, r5, lsr r6
 231   bic     r5, r5, r2, lsl r6
 232   adcs    r0, r5, r5
 233   adc     r1, r1, #0      // 0x0
 234   movs    lr, r3, lsl r6
 235   mov     r3, r4, lsr r6
 236   bic     r4, r4, r3, lsl r6
 237   adc     r1, r1, #0      // 0x0
 238   adds    r0, r0, lr
 239   orr     r2, r2, r4, ror r6
 240   adc     r1, r1, #0      // 0x0
 241   ldmia   sp!, {r4, r5, r6, pc}
 242
 243 ASM_PFX(_ll_udiv_ginormous):
 244   subs    r2, r5, lr
 245   mov     r1, #0  // 0x0
 246   sbcs    r3, r4, ip
 247   adc     r0, r1, r1
 248   movcc   r2, r5
 249   movcc   r3, r4
 250   ldmia   sp!, {r4, r5, r6, pc}
 251
 252 ASM_PFX(_ll_div0):
 253   ldmia   sp!, {r4, r5, r6, lr}
 254   mov     r0, #0  // 0x0
 255   mov     r1, #0  // 0x0
 256   b       ASM_PFX(__aeabi_ldiv0)
 257
 258 ASM_PFX(__aeabi_ldiv0):
 259   bx      r14
 260
 261