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1 /** @file
2 Functions for ARM processor information
3
4 Copyright (c) 2021, NUVIA Inc. All rights reserved.<BR>
5
6 SPDX-License-Identifier: BSD-2-Clause-Patent
7
8 **/
9
10 #include <Uefi.h>
11 #include <IndustryStandard/ArmCache.h>
12 #include <Library/ArmLib.h>
13
14 #include "SmbiosProcessor.h"
15
16 /** Gets the size of the specified cache.
17
18 @param CacheLevel The cache level (L1, L2 etc.).
19 @param DataCache Whether the cache is a dedicated data cache.
20 @param UnifiedCache Whether the cache is a unified cache.
21
22 @return The cache size.
23 **/
24 UINT64
25 SmbiosProcessorGetCacheSize (
26 IN UINT8 CacheLevel,
27 IN BOOLEAN DataCache,
28 IN BOOLEAN UnifiedCache
29 )
30 {
31 CCSIDR_DATA Ccsidr;
32 CCSIDR2_DATA Ccsidr2;
33 CSSELR_DATA Csselr;
34 BOOLEAN CcidxSupported;
35 UINT64 CacheSize;
36
37 // Read the CCSIDR register to get the cache architecture
38 Csselr.Data = 0;
39 Csselr.Bits.Level = CacheLevel - 1;
40 Csselr.Bits.InD = (!DataCache && !UnifiedCache);
41
42 Ccsidr.Data = ReadCCSIDR (Csselr.Data);
43
44 CcidxSupported = ArmHasCcidx ();
45
46 if (CcidxSupported) {
47 Ccsidr2.Data = ReadCCSIDR2 (Csselr.Data);
48 CacheSize = (1 << (Ccsidr.BitsCcidxAA32.LineSize + 4)) *
49 (Ccsidr.BitsCcidxAA32.Associativity + 1) *
50 (Ccsidr2.Bits.NumSets + 1);
51 } else {
52 CacheSize = (1 << (Ccsidr.BitsNonCcidx.LineSize + 4)) *
53 (Ccsidr.BitsNonCcidx.Associativity + 1) *
54 (Ccsidr.BitsNonCcidx.NumSets + 1);
55 }
56
57 return CacheSize;
58 }
59
60 /** Gets the associativity of the specified cache.
61
62 @param CacheLevel The cache level (L1, L2 etc.).
63 @param DataCache Whether the cache is a dedicated data cache.
64 @param UnifiedCache Whether the cache is a unified cache.
65
66 @return The cache associativity.
67 **/
68 UINT32
69 SmbiosProcessorGetCacheAssociativity (
70 IN UINT8 CacheLevel,
71 IN BOOLEAN DataCache,
72 IN BOOLEAN UnifiedCache
73 )
74 {
75 CCSIDR_DATA Ccsidr;
76 CSSELR_DATA Csselr;
77 BOOLEAN CcidxSupported;
78 UINT32 Associativity;
79
80 // Read the CCSIDR register to get the cache architecture
81 Csselr.Data = 0;
82 Csselr.Bits.Level = CacheLevel - 1;
83 Csselr.Bits.InD = (!DataCache && !UnifiedCache);
84
85 Ccsidr.Data = ReadCCSIDR (Csselr.Data);
86
87 CcidxSupported = ArmHasCcidx ();
88
89 if (CcidxSupported) {
90 Associativity = Ccsidr.BitsCcidxAA32.Associativity + 1;
91 } else {
92 Associativity = Ccsidr.BitsNonCcidx.Associativity + 1;
93 }
94
95 return Associativity;
96 }