]> git.proxmox.com Git - mirror_edk2.git/blob - ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-FVP-AArch64.fdf
Do not create boot option for logical block io device.
[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-FVP-AArch64.fdf
1 #
2 # Copyright (c) 2011 - 2013, ARM Limited. All rights reserved.
3 #
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php
8 #
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 #
12
13 ################################################################################
14 #
15 # FD Section
16 # The [FD] Section is made up of the definition statements and a
17 # description of what goes into the Flash Device Image. Each FD section
18 # defines one flash "device" image. A flash device image may be one of
19 # the following: Removable media bootable image (like a boot floppy
20 # image,) an Option ROM image (that would be "flashed" into an add-in
21 # card,) a System "Flash" image (that would be burned into a system's
22 # flash) or an Update ("Capsule") image that will be used to update and
23 # existing system flash.
24 #
25 ################################################################################
26
27 [FD.FVP_AARCH64_EFI_SEC]
28 BaseAddress = 0x00000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in SecureROM.
29 Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).
30 ErasePolarity = 1
31
32 # This one is tricky, it must be: BlockSize * NumBlocks = Size
33 BlockSize = 0x00001000
34 NumBlocks = 0x4000
35
36 ################################################################################
37 #
38 # Following are lists of FD Region layout which correspond to the locations of different
39 # images within the flash device.
40 #
41 # Regions must be defined in ascending order and may not overlap.
42 #
43 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
44 # the pipe "|" character, followed by the size of the region, also in hex with the leading
45 # "0x" characters. Like:
46 # Offset|Size
47 # PcdOffsetCName|PcdSizeCName
48 # RegionType <FV, DATA, or FILE>
49 #
50 ################################################################################
51
52 0x00000000|0x00080000
53 gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
54 FV = FVMAIN_SEC
55
56 [FD.FVP_AARCH64_EFI]
57 !ifdef ARM_FVP_RUN_NORFLASH
58 BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in Flash0.
59 !else
60 BaseAddress = 0x88000000|gArmTokenSpaceGuid.PcdFdBaseAddress # UEFI in DRAM + 128MB.
61 !endif
62 Size = 0x04000000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the device (64MiB).
63 ErasePolarity = 1
64
65 # This one is tricky, it must be: BlockSize * NumBlocks = Size
66 BlockSize = 0x00001000
67 NumBlocks = 0x4000
68
69 0x00000000|0x00280000
70 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
71 FV = FVMAIN_COMPACT
72
73 ################################################################################
74 #
75 # FV Section
76 #
77 # [FV] section is used to define what components or modules are placed within a flash
78 # device file. This section also defines order the components and modules are positioned
79 # within the image. The [FV] section consists of define statements, set statements and
80 # module statements.
81 #
82 ################################################################################
83
84 [FV.FVMAIN_SEC]
85 FvBaseAddress = 0x0 # Secure ROM
86 FvForceRebase = TRUE
87 FvAlignment = 16
88 ERASE_POLARITY = 1
89 MEMORY_MAPPED = TRUE
90 STICKY_WRITE = TRUE
91 LOCK_CAP = TRUE
92 LOCK_STATUS = TRUE
93 WRITE_DISABLED_CAP = TRUE
94 WRITE_ENABLED_CAP = TRUE
95 WRITE_STATUS = TRUE
96 WRITE_LOCK_CAP = TRUE
97 WRITE_LOCK_STATUS = TRUE
98 READ_DISABLED_CAP = TRUE
99 READ_ENABLED_CAP = TRUE
100 READ_STATUS = TRUE
101 READ_LOCK_CAP = TRUE
102 READ_LOCK_STATUS = TRUE
103
104 INF ArmPlatformPkg/Sec/Sec.inf
105
106
107 [FV.FvMain]
108 BlockSize = 0x40
109 NumBlocks = 0 # This FV gets compressed so make it just big enough
110 FvAlignment = 16 # FV alignment and FV attributes setting.
111 ERASE_POLARITY = 1
112 MEMORY_MAPPED = TRUE
113 STICKY_WRITE = TRUE
114 LOCK_CAP = TRUE
115 LOCK_STATUS = TRUE
116 WRITE_DISABLED_CAP = TRUE
117 WRITE_ENABLED_CAP = TRUE
118 WRITE_STATUS = TRUE
119 WRITE_LOCK_CAP = TRUE
120 WRITE_LOCK_STATUS = TRUE
121 READ_DISABLED_CAP = TRUE
122 READ_ENABLED_CAP = TRUE
123 READ_STATUS = TRUE
124 READ_LOCK_CAP = TRUE
125 READ_LOCK_STATUS = TRUE
126
127 INF MdeModulePkg/Core/Dxe/DxeMain.inf
128
129 #
130 # PI DXE Drivers producing Architectural Protocols (EFI Services)
131 #
132 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
133 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
134 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
135 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
136 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
137 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
138 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
139 INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
140 INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
141 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
142
143 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
144
145 #
146 # Multiple Console IO support
147 #
148 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
149 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
150 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
151 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
152 INF EmbeddedPkg/SerialDxe/SerialDxe.inf
153
154 INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
155 INF ArmPkg/Drivers/TimerDxe/TimerDxe.inf
156 INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
157 !ifndef ARM_FOUNDATION_FVP
158 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
159 !endif
160 INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
161
162 #
163 # Semi-hosting filesystem
164 #
165 INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
166
167 #
168 # FAT filesystem + GPT/MBR partitioning
169 #
170 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
171 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
172 INF FatBinPkg/EnhancedFatDxe/Fat.inf
173 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
174
175 !ifndef ARM_FOUNDATION_FVP
176 #
177 # Multimedia Card Interface
178 #
179 INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
180 INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
181 !endif
182
183 #
184 # Platform Driver
185 #
186 INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf
187 INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
188
189 #
190 # UEFI application (Shell Embedded Boot Loader)
191 #
192 INF ShellBinPkg/UefiShell/UefiShell.inf
193
194 #
195 # Bds
196 #
197 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
198 INF ArmPlatformPkg/Bds/Bds.inf
199
200
201 [FV.FVMAIN_COMPACT]
202 FvAlignment = 16
203 ERASE_POLARITY = 1
204 MEMORY_MAPPED = TRUE
205 STICKY_WRITE = TRUE
206 LOCK_CAP = TRUE
207 LOCK_STATUS = TRUE
208 WRITE_DISABLED_CAP = TRUE
209 WRITE_ENABLED_CAP = TRUE
210 WRITE_STATUS = TRUE
211 WRITE_LOCK_CAP = TRUE
212 WRITE_LOCK_STATUS = TRUE
213 READ_DISABLED_CAP = TRUE
214 READ_ENABLED_CAP = TRUE
215 READ_STATUS = TRUE
216 READ_LOCK_CAP = TRUE
217 READ_LOCK_STATUS = TRUE
218
219 !if $(EDK2_SKIP_PEICORE) == 1
220 INF ArmPlatformPkg/PrePi/PeiMPCore.inf
221 !else
222 INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
223 INF MdeModulePkg/Core/Pei/PeiMain.inf
224 INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
225 INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
226 INF ArmPkg/Drivers/CpuPei/CpuPei.inf
227 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
228 INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
229 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
230 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
231 !endif
232
233 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
234 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
235 SECTION FV_IMAGE = FVMAIN
236 }
237 }
238
239
240 ################################################################################
241 #
242 # Rules are use with the [FV] section's module INF type to define
243 # how an FFS file is created for a given INF file. The following Rule are the default
244 # rules for the different module type. User can add the customized rules to define the
245 # content of the FFS file.
246 #
247 ################################################################################
248
249
250 ############################################################################
251 # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
252 ############################################################################
253 #
254 #[Rule.Common.DXE_DRIVER]
255 # FILE DRIVER = $(NAMED_GUID) {
256 # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
257 # COMPRESS PI_STD {
258 # GUIDED {
259 # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
260 # UI STRING="$(MODULE_NAME)" Optional
261 # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
262 # }
263 # }
264 # }
265 #
266 ############################################################################
267
268 [Rule.Common.SEC]
269 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
270 TE TE Align = 128 $(INF_OUTPUT)/$(MODULE_NAME).efi
271 }
272
273 [Rule.Common.PEI_CORE]
274 FILE PEI_CORE = $(NAMED_GUID) {
275 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
276 UI STRING ="$(MODULE_NAME)" Optional
277 }
278
279 [Rule.Common.PEIM]
280 FILE PEIM = $(NAMED_GUID) {
281 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
282 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi
283 UI STRING="$(MODULE_NAME)" Optional
284 }
285
286 [Rule.Common.PEIM.TIANOCOMPRESSED]
287 FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
288 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
289 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
290 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
291 UI STRING="$(MODULE_NAME)" Optional
292 }
293 }
294
295 [Rule.Common.DXE_CORE]
296 FILE DXE_CORE = $(NAMED_GUID) {
297 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
298 UI STRING="$(MODULE_NAME)" Optional
299 }
300
301 [Rule.Common.UEFI_DRIVER]
302 FILE DRIVER = $(NAMED_GUID) {
303 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
304 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
305 UI STRING="$(MODULE_NAME)" Optional
306 }
307
308 [Rule.Common.DXE_DRIVER]
309 FILE DRIVER = $(NAMED_GUID) {
310 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
311 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
312 UI STRING="$(MODULE_NAME)" Optional
313 }
314
315 [Rule.Common.DXE_RUNTIME_DRIVER]
316 FILE DRIVER = $(NAMED_GUID) {
317 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
318 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
319 UI STRING="$(MODULE_NAME)" Optional
320 }
321
322 [Rule.Common.UEFI_APPLICATION]
323 FILE APPLICATION = $(NAMED_GUID) {
324 UI STRING ="$(MODULE_NAME)" Optional
325 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
326 }
327
328 [Rule.Common.UEFI_DRIVER.BINARY]
329 FILE DRIVER = $(NAMED_GUID) {
330 DXE_DEPEX DXE_DEPEX Optional |.depex
331 PE32 PE32 |.efi
332 UI STRING="$(MODULE_NAME)" Optional
333 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
334 }
335
336 [Rule.Common.UEFI_APPLICATION.BINARY]
337 FILE APPLICATION = $(NAMED_GUID) {
338 PE32 PE32 |.efi
339 UI STRING="$(MODULE_NAME)" Optional
340 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
341 }