]> git.proxmox.com Git - mirror_edk2.git/blob - ArmPlatformPkg/ArmVExpressPkg/ArmVExpress-RTSM-A9x4.fdf
ArmPlatformPkg/ArmVExpressDxe: Load FDT into the EFI Configuration Table
[mirror_edk2.git] / ArmPlatformPkg / ArmVExpressPkg / ArmVExpress-RTSM-A9x4.fdf
1 #
2 # Copyright (c) 2011-2015, ARM Limited. All rights reserved.
3 #
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php
8 #
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 #
12
13 ################################################################################
14 #
15 # FD Section
16 # The [FD] Section is made up of the definition statements and a
17 # description of what goes into the Flash Device Image. Each FD section
18 # defines one flash "device" image. A flash device image may be one of
19 # the following: Removable media bootable image (like a boot floppy
20 # image,) an Option ROM image (that would be "flashed" into an add-in
21 # card,) a System "Flash" image (that would be burned into a system's
22 # flash) or an Update ("Capsule") image that will be used to update and
23 # existing system flash.
24 #
25 ################################################################################
26
27 [FD.RTSM_VE_Cortex-A9_EFI]
28 BaseAddress = 0x08000000|gArmTokenSpaceGuid.PcdFdBaseAddress # The base address of the Firmware in NOR Flash.
29 Size = 0x00300000|gArmTokenSpaceGuid.PcdFdSize # The size in bytes of the FLASH Device
30 ErasePolarity = 1
31
32 # This one is tricky, it must be: BlockSize * NumBlocks = Size
33 BlockSize = 0x00001000
34 NumBlocks = 0x300
35
36 ################################################################################
37 #
38 # Following are lists of FD Region layout which correspond to the locations of different
39 # images within the flash device.
40 #
41 # Regions must be defined in ascending order and may not overlap.
42 #
43 # A Layout Region start with a eight digit hex offset (leading "0x" required) followed by
44 # the pipe "|" character, followed by the size of the region, also in hex with the leading
45 # "0x" characters. Like:
46 # Offset|Size
47 # PcdOffsetCName|PcdSizeCName
48 # RegionType <FV, DATA, or FILE>
49 #
50 ################################################################################
51
52 0x00000000|0x00080000
53 gArmTokenSpaceGuid.PcdSecureFvBaseAddress|gArmTokenSpaceGuid.PcdSecureFvSize
54 FV = FVMAIN_SEC
55
56 0x00080000|0x00280000
57 gArmTokenSpaceGuid.PcdFvBaseAddress|gArmTokenSpaceGuid.PcdFvSize
58 FV = FVMAIN_COMPACT
59
60
61 ################################################################################
62 #
63 # FV Section
64 #
65 # [FV] section is used to define what components or modules are placed within a flash
66 # device file. This section also defines order the components and modules are positioned
67 # within the image. The [FV] section consists of define statements, set statements and
68 # module statements.
69 #
70 ################################################################################
71
72 [FV.FVMAIN_SEC]
73 FvAlignment = 8
74 ERASE_POLARITY = 1
75 MEMORY_MAPPED = TRUE
76 STICKY_WRITE = TRUE
77 LOCK_CAP = TRUE
78 LOCK_STATUS = TRUE
79 WRITE_DISABLED_CAP = TRUE
80 WRITE_ENABLED_CAP = TRUE
81 WRITE_STATUS = TRUE
82 WRITE_LOCK_CAP = TRUE
83 WRITE_LOCK_STATUS = TRUE
84 READ_DISABLED_CAP = TRUE
85 READ_ENABLED_CAP = TRUE
86 READ_STATUS = TRUE
87 READ_LOCK_CAP = TRUE
88 READ_LOCK_STATUS = TRUE
89
90 INF ArmPlatformPkg/Sec/Sec.inf
91
92
93 [FV.FvMain]
94 BlockSize = 0x40
95 NumBlocks = 0 # This FV gets compressed so make it just big enough
96 FvAlignment = 8 # FV alignment and FV attributes setting.
97 ERASE_POLARITY = 1
98 MEMORY_MAPPED = TRUE
99 STICKY_WRITE = TRUE
100 LOCK_CAP = TRUE
101 LOCK_STATUS = TRUE
102 WRITE_DISABLED_CAP = TRUE
103 WRITE_ENABLED_CAP = TRUE
104 WRITE_STATUS = TRUE
105 WRITE_LOCK_CAP = TRUE
106 WRITE_LOCK_STATUS = TRUE
107 READ_DISABLED_CAP = TRUE
108 READ_ENABLED_CAP = TRUE
109 READ_STATUS = TRUE
110 READ_LOCK_CAP = TRUE
111 READ_LOCK_STATUS = TRUE
112
113 APRIORI DXE {
114 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
115 }
116
117 INF MdeModulePkg/Core/Dxe/DxeMain.inf
118 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf
119
120 #
121 # PI DXE Drivers producing Architectural Protocols (EFI Services)
122 #
123 INF ArmPkg/Drivers/CpuDxe/CpuDxe.inf
124 INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf
125 INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf
126 INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf
127 INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf
128 INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf
129 INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf
130 INF EmbeddedPkg/ResetRuntimeDxe/ResetRuntimeDxe.inf
131 INF EmbeddedPkg/RealTimeClockRuntimeDxe/RealTimeClockRuntimeDxe.inf
132 INF EmbeddedPkg/MetronomeDxe/MetronomeDxe.inf
133
134 INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf
135
136 #
137 # Multiple Console IO support
138 #
139 INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf
140 INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf
141 INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf
142 INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf
143 INF EmbeddedPkg/SerialDxe/SerialDxe.inf
144
145 INF ArmPkg/Drivers/ArmGic/ArmGicDxe.inf
146 INF ArmPlatformPkg/Drivers/SP804TimerDxe/SP804TimerDxe.inf
147 INF ArmPlatformPkg/Drivers/NorFlashDxe/NorFlashDxe.inf
148 INF ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111LcdGraphicsOutputDxe.inf
149 INF ArmPlatformPkg/Drivers/SP805WatchdogDxe/SP805WatchdogDxe.inf
150
151 #
152 # Semi-hosting filesystem
153 #
154 INF ArmPkg/Filesystem/SemihostFs/SemihostFs.inf
155
156 #
157 # Versatile Express FileSystem
158 #
159 INF ArmPlatformPkg/FileSystem/BootMonFs/BootMonFs.inf
160
161 #
162 # FAT filesystem + GPT/MBR partitioning
163 #
164 INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf
165 INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf
166 INF FatBinPkg/EnhancedFatDxe/Fat.inf
167 INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf
168
169 #
170 # Multimedia Card Interface
171 #
172 INF EmbeddedPkg/Universal/MmcDxe/MmcDxe.inf
173 INF ArmPlatformPkg/Drivers/PL180MciDxe/PL180MciDxe.inf
174
175 #
176 # Platform Driver
177 #
178 INF ArmPlatformPkg/ArmVExpressPkg/ArmVExpressDxe/ArmFvpDxe.inf
179 INF OvmfPkg/VirtioBlkDxe/VirtioBlk.inf
180
181 #
182 # FDT installation
183 #
184 INF EmbeddedPkg/Drivers/FdtPlatformDxe/FdtPlatformDxe.inf
185
186 #
187 # UEFI application (Shell Embedded Boot Loader)
188 #
189 INF ShellBinPkg/UefiShell/UefiShell.inf
190
191 #
192 # Bds
193 #
194 INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf
195 INF ArmPlatformPkg/Bds/Bds.inf
196
197 # FV Filesystem
198 INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf
199
200 # Example to add a Device Tree to the Firmware Volume
201 #FILE FREEFORM = PCD(gArmVExpressTokenSpaceGuid.PcdFdtVExpressFvpA9x4) {
202 # SECTION RAW = ArmPlatformPkg/ArmVExpressPkg/Fdts/rtsm_ve-ca9x4.dtb
203 #}
204
205 [FV.FVMAIN_COMPACT]
206 FvAlignment = 8
207 ERASE_POLARITY = 1
208 MEMORY_MAPPED = TRUE
209 STICKY_WRITE = TRUE
210 LOCK_CAP = TRUE
211 LOCK_STATUS = TRUE
212 WRITE_DISABLED_CAP = TRUE
213 WRITE_ENABLED_CAP = TRUE
214 WRITE_STATUS = TRUE
215 WRITE_LOCK_CAP = TRUE
216 WRITE_LOCK_STATUS = TRUE
217 READ_DISABLED_CAP = TRUE
218 READ_ENABLED_CAP = TRUE
219 READ_STATUS = TRUE
220 READ_LOCK_CAP = TRUE
221 READ_LOCK_STATUS = TRUE
222
223 !if $(EDK2_SKIP_PEICORE) == 1
224 INF ArmPlatformPkg/PrePi/PeiMPCore.inf
225 !else
226 INF ArmPlatformPkg/PrePeiCore/PrePeiCoreMPCore.inf
227 INF MdeModulePkg/Core/Pei/PeiMain.inf
228 INF ArmPlatformPkg/PlatformPei/PlatformPeim.inf
229 INF ArmPlatformPkg/MemoryInitPei/MemoryInitPeim.inf
230 INF ArmPkg/Drivers/CpuPei/CpuPei.inf
231 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf
232 INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf
233 INF MdeModulePkg/Universal/Variable/Pei/VariablePei.inf
234 INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf
235 !endif
236
237 FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {
238 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE {
239 SECTION FV_IMAGE = FVMAIN
240 }
241 }
242
243
244 ################################################################################
245 #
246 # Rules are use with the [FV] section's module INF type to define
247 # how an FFS file is created for a given INF file. The following Rule are the default
248 # rules for the different module type. User can add the customized rules to define the
249 # content of the FFS file.
250 #
251 ################################################################################
252
253
254 ############################################################################
255 # Example of a DXE_DRIVER FFS file with a Checksum encapsulation section #
256 ############################################################################
257 #
258 #[Rule.Common.DXE_DRIVER]
259 # FILE DRIVER = $(NAMED_GUID) {
260 # DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
261 # COMPRESS PI_STD {
262 # GUIDED {
263 # PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
264 # UI STRING="$(MODULE_NAME)" Optional
265 # VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
266 # }
267 # }
268 # }
269 #
270 ############################################################################
271
272 [Rule.Common.SEC]
273 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {
274 TE TE Align = 32 $(INF_OUTPUT)/$(MODULE_NAME).efi
275 }
276
277 [Rule.Common.PEI_CORE]
278 FILE PEI_CORE = $(NAMED_GUID) {
279 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
280 UI STRING ="$(MODULE_NAME)" Optional
281 }
282
283 [Rule.Common.PEIM]
284 FILE PEIM = $(NAMED_GUID) {
285 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
286 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi
287 UI STRING="$(MODULE_NAME)" Optional
288 }
289
290 [Rule.Common.PEIM.TIANOCOMPRESSED]
291 FILE PEIM = $(NAMED_GUID) DEBUG_MYTOOLS_IA32 {
292 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
293 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {
294 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
295 UI STRING="$(MODULE_NAME)" Optional
296 }
297 }
298
299 [Rule.Common.DXE_CORE]
300 FILE DXE_CORE = $(NAMED_GUID) {
301 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
302 UI STRING="$(MODULE_NAME)" Optional
303 }
304
305 [Rule.Common.UEFI_DRIVER]
306 FILE DRIVER = $(NAMED_GUID) {
307 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
308 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
309 UI STRING="$(MODULE_NAME)" Optional
310 }
311
312 [Rule.Common.DXE_DRIVER]
313 FILE DRIVER = $(NAMED_GUID) {
314 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
315 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
316 UI STRING="$(MODULE_NAME)" Optional
317 }
318
319 [Rule.Common.DXE_RUNTIME_DRIVER]
320 FILE DRIVER = $(NAMED_GUID) {
321 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex
322 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
323 UI STRING="$(MODULE_NAME)" Optional
324 }
325
326 [Rule.Common.UEFI_APPLICATION]
327 FILE APPLICATION = $(NAMED_GUID) {
328 UI STRING ="$(MODULE_NAME)" Optional
329 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi
330 }
331
332 [Rule.Common.UEFI_DRIVER.BINARY]
333 FILE DRIVER = $(NAMED_GUID) {
334 DXE_DEPEX DXE_DEPEX Optional |.depex
335 PE32 PE32 |.efi
336 UI STRING="$(MODULE_NAME)" Optional
337 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
338 }
339
340 [Rule.Common.UEFI_APPLICATION.BINARY]
341 FILE APPLICATION = $(NAMED_GUID) {
342 PE32 PE32 |.efi
343 UI STRING="$(MODULE_NAME)" Optional
344 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)
345 }