3 * Copyright (c) 2011-2014, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
15 #include <Library/ArmPlatformLib.h>
16 #include <Library/DebugLib.h>
17 #include <Library/HobLib.h>
18 #include <Library/PcdLib.h>
19 #include <Library/IoLib.h>
20 #include <Library/MemoryAllocationLib.h>
21 #include <ArmPlatform.h>
23 // Number of Virtual Memory Map Descriptors
24 #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5
27 #define DDR_ATTRIBUTES_CACHED ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK
28 #define DDR_ATTRIBUTES_UNCACHED ARM_MEMORY_REGION_ATTRIBUTE_UNCACHED_UNBUFFERED
31 Return the Virtual Memory Map of your platform
33 This Virtual Memory Map is used by MemoryInitPei Module to initialize the MMU on your platform.
35 @param[out] VirtualMemoryMap Array of ARM_MEMORY_REGION_DESCRIPTOR describing a Physical-to-
36 Virtual Memory mapping. This array must be ended by a zero-filled
41 ArmPlatformGetVirtualMemoryMap (
42 IN ARM_MEMORY_REGION_DESCRIPTOR
** VirtualMemoryMap
45 ARM_MEMORY_REGION_ATTRIBUTES CacheAttributes
;
46 EFI_RESOURCE_ATTRIBUTE_TYPE ResourceAttributes
;
48 ARM_MEMORY_REGION_DESCRIPTOR
*VirtualMemoryTable
;
49 EFI_VIRTUAL_ADDRESS SparseMemoryBase
;
50 UINT64 SparseMemorySize
;
52 ASSERT(VirtualMemoryMap
!= NULL
);
55 EFI_RESOURCE_ATTRIBUTE_PRESENT
|
56 EFI_RESOURCE_ATTRIBUTE_INITIALIZED
|
57 EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE
|
58 EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE
|
59 EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE
|
60 EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE
|
61 EFI_RESOURCE_ATTRIBUTE_TESTED
;
63 // Declared the additional DRAM from 2GB to 8GB
64 SparseMemoryBase
= 0x0880000000;
65 SparseMemorySize
= SIZE_2GB
+ SIZE_4GB
;
67 BuildResourceDescriptorHob (
68 EFI_RESOURCE_SYSTEM_MEMORY
,
73 VirtualMemoryTable
= (ARM_MEMORY_REGION_DESCRIPTOR
*)AllocatePages(EFI_SIZE_TO_PAGES (sizeof(ARM_MEMORY_REGION_DESCRIPTOR
) * MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS
));
74 if (VirtualMemoryTable
== NULL
) {
78 if (FeaturePcdGet(PcdCacheEnable
) == TRUE
) {
79 CacheAttributes
= DDR_ATTRIBUTES_CACHED
;
81 CacheAttributes
= DDR_ATTRIBUTES_UNCACHED
;
85 VirtualMemoryTable
[Index
].PhysicalBase
= ARM_VE_DRAM_BASE
;
86 VirtualMemoryTable
[Index
].VirtualBase
= ARM_VE_DRAM_BASE
;
87 VirtualMemoryTable
[Index
].Length
= ARM_VE_DRAM_SZ
;
88 VirtualMemoryTable
[Index
].Attributes
= CacheAttributes
;
90 // CPU peripherals. TRM. Manual says not all of them are implemented.
91 VirtualMemoryTable
[++Index
].PhysicalBase
= ARM_VE_ON_CHIP_PERIPH_BASE
;
92 VirtualMemoryTable
[Index
].VirtualBase
= ARM_VE_ON_CHIP_PERIPH_BASE
;
93 VirtualMemoryTable
[Index
].Length
= ARM_VE_ON_CHIP_PERIPH_SZ
;
94 VirtualMemoryTable
[Index
].Attributes
= ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
;
96 // Peripheral CS2 and CS3
97 VirtualMemoryTable
[++Index
].PhysicalBase
= ARM_VE_SMB_PERIPH_BASE
;
98 VirtualMemoryTable
[Index
].VirtualBase
= ARM_VE_SMB_PERIPH_BASE
;
99 VirtualMemoryTable
[Index
].Length
= 2 * ARM_VE_SMB_PERIPH_SZ
;
100 VirtualMemoryTable
[Index
].Attributes
= ARM_MEMORY_REGION_ATTRIBUTE_DEVICE
;
102 // Map sparse memory region if present
103 VirtualMemoryTable
[++Index
].PhysicalBase
= SparseMemoryBase
;
104 VirtualMemoryTable
[Index
].VirtualBase
= SparseMemoryBase
;
105 VirtualMemoryTable
[Index
].Length
= SparseMemorySize
;
106 VirtualMemoryTable
[Index
].Attributes
= CacheAttributes
;
109 VirtualMemoryTable
[++Index
].PhysicalBase
= 0;
110 VirtualMemoryTable
[Index
].VirtualBase
= 0;
111 VirtualMemoryTable
[Index
].Length
= 0;
112 VirtualMemoryTable
[Index
].Attributes
= (ARM_MEMORY_REGION_ATTRIBUTES
)0;
114 *VirtualMemoryMap
= VirtualMemoryTable
;