2 # Copyright (c) 2011-2013, ARM Limited. All rights reserved.
4 # This program and the accompanying materials
5 # are licensed and made available under the terms and conditions of the BSD License
6 # which accompanies this distribution. The full text of the license may be found at
7 # http://opensource.org/licenses/bsd-license.php
9 # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
14 #include <AsmMacroIoLibV8.h>
16 #include <Library/ArmLib.h>
17 #include <Library/PcdLib.h>
23 GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
24 GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
25 GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
26 GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
27 GCC_ASM_EXPORT(ArmGetPhysAddrTop)
29 GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
30 GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
31 GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
34 .byte 0xd0, 0x0d, 0xfe, 0xed
37 .byte 0x41, 0x52, 0x4d, 0x64
40 // ArmPlatformPeiBootAction (
41 // VOID *DeviceTreeBaseAddress, // passed by loader in x0
42 // VOID *ImageBase // passed by FDF trampoline in x1
44 ASM_PFX(ArmPlatformPeiBootAction):
45 mov x29, x30 // preserve LR
48 // If we are booting from RAM using the Linux kernel boot protocol, x0 will
49 // point to the DTB image in memory. Otherwise, we are just coming out of
50 // reset, and x0 will be 0. Check also the FDT magic.
59 // The base of the runtime image has been preserved in x1. Check whether
60 // the expected magic number can be found in the header.
62 ldr w8, .LArm64LinuxMagic
69 // OK, so far so good. We have confirmed that we likely have a DTB and are
70 // booting via the arm64 Linux boot protocol. Update the base-of-image PCD
71 // to the actual relocated value, and add the shift of PcdFdBaseAddress to
72 // PcdFvBaseAddress as well
74 adr x8, PcdGet64 (PcdFdBaseAddress)
75 adr x9, PcdGet64 (PcdFvBaseAddress)
84 // Copy the DTB to the slack space right after the 64 byte arm64/Linux style
85 // image header at the base of this image (defined in the FDF), and record the
86 // pointer in PcdDeviceTreeInitialBaseAddress.
88 adr x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
92 ldr w8, [x0, #4] // get DTB size (BE)
96 0:ldp x6, x7, [x0], #16
102 // Discover the memory size and offset from the DTB, and record in the
106 bl find_memnode // returns (size, base) size in (x0, x1)
109 adr x8, PcdGet64 (PcdSystemMemorySize)
110 adr x9, PcdGet64 (PcdSystemMemoryBase)
118 //ArmPlatformGetPrimaryCoreMpId (
121 ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
122 LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
127 //ArmPlatformIsPrimaryCore (
130 ASM_PFX(ArmPlatformIsPrimaryCore):
135 //ArmPlatformGetCorePosition (
138 // With this function: CorePos = (ClusterId * 4) + CoreId
139 ASM_PFX(ArmPlatformGetCorePosition):
140 and x1, x0, #ARM_CORE_MASK
141 and x0, x0, #ARM_CLUSTER_MASK
142 add x0, x1, x0, LSR #6
145 //EFI_PHYSICAL_ADDRESS
149 ASM_PFX(ArmGetPhysAddrTop):
150 mrs x0, id_aa64mmfr0_el1
159 // Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
160 // physical address space support on this CPU:
161 // 0 == 32 bits, 1 == 36 bits, etc etc
162 // 6 and 7 are reserved
165 .byte 32, 36, 40, 42, 44, 48, -1, -1
167 ASM_FUNCTION_REMOVE_IF_UNREFERENCED