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1 /** @file
2 Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
3
4 Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "PciHostBridge.h"
16
17 //
18 // Hard code: Root Bridge Number within the host bridge
19 // Root Bridge's attribute
20 // Root Bridge's device path
21 // Root Bridge's resource aperture
22 //
23 UINTN RootBridgeNumber[1] = { 1 };
24
25 UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };
26
27 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
28 {
29 {
30 {
31 {
32 ACPI_DEVICE_PATH,
33 ACPI_DP,
34 {
35 (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
36 (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
37 }
38 },
39 EISA_PNP_ID(0x0A03),
40 0
41 },
42
43 {
44 END_DEVICE_PATH_TYPE,
45 END_ENTIRE_DEVICE_PATH_SUBTYPE,
46 {
47 END_DEVICE_PATH_LENGTH,
48 0
49 }
50 }
51 }
52 }
53 };
54
55 PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1] = {
56 {{0, 0xff, 0x80000000, 0xffffffff, 0, 0xffff}}
57 };
58
59 EFI_HANDLE mDriverImageHandle;
60
61 PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
62 PCI_HOST_BRIDGE_SIGNATURE, // Signature
63 NULL, // HostBridgeHandle
64 0, // RootBridgeNumber
65 {NULL, NULL}, // Head
66 FALSE, // ResourceSubiteed
67 TRUE, // CanRestarted
68 {
69 NotifyPhase,
70 GetNextRootBridge,
71 GetAttributes,
72 StartBusEnumeration,
73 SetBusNumbers,
74 SubmitResources,
75 GetProposedResources,
76 PreprocessController
77 }
78 };
79
80 //
81 // Implementation
82 //
83
84 /**
85 Entry point of this driver
86
87 @param ImageHandle Handle of driver image
88 @param SystemTable Point to EFI_SYSTEM_TABLE
89
90 @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource
91 @retval EFI_DEVICE_ERROR Can not install the protocol instance
92 @retval EFI_SUCCESS Success to initialize the Pci host bridge.
93 **/
94 EFI_STATUS
95 EFIAPI
96 InitializePciHostBridge (
97 IN EFI_HANDLE ImageHandle,
98 IN EFI_SYSTEM_TABLE *SystemTable
99 )
100 {
101 EFI_STATUS Status;
102 UINTN Loop1;
103 UINTN Loop2;
104 PCI_HOST_BRIDGE_INSTANCE *HostBridge;
105 PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
106
107 mDriverImageHandle = ImageHandle;
108
109 //
110 // Create Host Bridge Device Handle
111 //
112 for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
113 HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
114 if (HostBridge == NULL) {
115 return EFI_OUT_OF_RESOURCES;
116 }
117
118 HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
119 InitializeListHead (&HostBridge->Head);
120
121 Status = gBS->InstallMultipleProtocolInterfaces (
122 &HostBridge->HostBridgeHandle,
123 &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
124 NULL
125 );
126 if (EFI_ERROR (Status)) {
127 FreePool (HostBridge);
128 return EFI_DEVICE_ERROR;
129 }
130
131 //
132 // Create Root Bridge Device Handle in this Host Bridge
133 //
134
135 for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
136 PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
137 if (PrivateData == NULL) {
138 return EFI_OUT_OF_RESOURCES;
139 }
140
141 PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
142 PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
143
144 RootBridgeConstructor (
145 &PrivateData->Io,
146 HostBridge->HostBridgeHandle,
147 RootBridgeAttribute[Loop1][Loop2],
148 &mResAperture[Loop1][Loop2]
149 );
150
151 Status = gBS->InstallMultipleProtocolInterfaces(
152 &PrivateData->Handle,
153 &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,
154 &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
155 NULL
156 );
157 if (EFI_ERROR (Status)) {
158 FreePool(PrivateData);
159 return EFI_DEVICE_ERROR;
160 }
161
162 InsertTailList (&HostBridge->Head, &PrivateData->Link);
163 }
164 }
165
166 return EFI_SUCCESS;
167 }
168
169
170 /**
171 These are the notifications from the PCI bus driver that it is about to enter a certain
172 phase of the PCI enumeration process.
173
174 This member function can be used to notify the host bridge driver to perform specific actions,
175 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
176 Eight notification points are defined at this time. See belows:
177 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
178 structures. The PCI enumerator should issue this notification
179 before starting a fresh enumeration process. Enumeration cannot
180 be restarted after sending any other notification such as
181 EfiPciHostBridgeBeginBusAllocation.
182 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
183 required here. This notification can be used to perform any
184 chipset-specific programming.
185 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
186 specific action is required here. This notification can be used to
187 perform any chipset-specific programming.
188 EfiPciHostBridgeBeginResourceAllocation
189 The resource allocation phase is about to begin. No specific
190 action is required here. This notification can be used to perform
191 any chipset-specific programming.
192 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
193 root bridges. These resource settings are returned on the next call to
194 GetProposedResources(). Before calling NotifyPhase() with a Phase of
195 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
196 for gathering I/O and memory requests for
197 all the PCI root bridges and submitting these requests using
198 SubmitResources(). This function pads the resource amount
199 to suit the root bridge hardware, takes care of dependencies between
200 the PCI root bridges, and calls the Global Coherency Domain (GCD)
201 with the allocation request. In the case of padding, the allocated range
202 could be bigger than what was requested.
203 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
204 resources (proposed resources) for all the PCI root bridges. After the
205 hardware is programmed, reassigning resources will not be supported.
206 The bus settings are not affected.
207 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
208 root bridges and resets the I/O and memory apertures to their initial
209 state. The bus settings are not affected. If the request to allocate
210 resources fails, the PCI enumerator can use this notification to
211 deallocate previous resources, adjust the requests, and retry
212 allocation.
213 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
214 required here. This notification can be used to perform any chipsetspecific
215 programming.
216
217 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
218 @param[in] Phase The phase during enumeration
219
220 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
221 is valid for a Phase of EfiPciHostBridgeAllocateResources if
222 SubmitResources() has not been called for one or more
223 PCI root bridges before this call
224 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
225 for a Phase of EfiPciHostBridgeSetResources.
226 @retval EFI_INVALID_PARAMETER Invalid phase parameter
227 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
228 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
229 previously submitted resource requests cannot be fulfilled or
230 were only partially fulfilled.
231 @retval EFI_SUCCESS The notification was accepted without any errors.
232
233 **/
234 EFI_STATUS
235 EFIAPI
236 NotifyPhase(
237 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
238 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
239 )
240 {
241 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
242 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
243 PCI_RESOURCE_TYPE Index;
244 LIST_ENTRY *List;
245 EFI_PHYSICAL_ADDRESS BaseAddress;
246 UINT64 AddrLen;
247 UINTN BitsOfAlignment;
248 EFI_STATUS Status;
249 EFI_STATUS ReturnStatus;
250
251 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
252
253 switch (Phase) {
254
255 case EfiPciHostBridgeBeginEnumeration:
256 if (HostBridgeInstance->CanRestarted) {
257 //
258 // Reset the Each Root Bridge
259 //
260 List = HostBridgeInstance->Head.ForwardLink;
261
262 while (List != &HostBridgeInstance->Head) {
263 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
264 for (Index = TypeIo; Index < TypeMax; Index++) {
265 RootBridgeInstance->ResAllocNode[Index].Type = Index;
266 RootBridgeInstance->ResAllocNode[Index].Base = 0;
267 RootBridgeInstance->ResAllocNode[Index].Length = 0;
268 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
269 }
270
271 List = List->ForwardLink;
272 }
273
274 HostBridgeInstance->ResourceSubmited = FALSE;
275 HostBridgeInstance->CanRestarted = TRUE;
276 } else {
277 //
278 // Can not restart
279 //
280 return EFI_NOT_READY;
281 }
282 break;
283
284 case EfiPciHostBridgeEndEnumeration:
285 break;
286
287 case EfiPciHostBridgeBeginBusAllocation:
288 //
289 // No specific action is required here, can perform any chipset specific programing
290 //
291 HostBridgeInstance->CanRestarted = FALSE;
292 break;
293
294 case EfiPciHostBridgeEndBusAllocation:
295 //
296 // No specific action is required here, can perform any chipset specific programing
297 //
298 //HostBridgeInstance->CanRestarted = FALSE;
299 break;
300
301 case EfiPciHostBridgeBeginResourceAllocation:
302 //
303 // No specific action is required here, can perform any chipset specific programing
304 //
305 //HostBridgeInstance->CanRestarted = FALSE;
306 break;
307
308 case EfiPciHostBridgeAllocateResources:
309 ReturnStatus = EFI_SUCCESS;
310 if (HostBridgeInstance->ResourceSubmited) {
311 //
312 // Take care of the resource dependencies between the root bridges
313 //
314 List = HostBridgeInstance->Head.ForwardLink;
315
316 while (List != &HostBridgeInstance->Head) {
317 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
318 for (Index = TypeIo; Index < TypeBus; Index++) {
319 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
320
321 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
322
323 //
324 // Get the number of '1' in Alignment.
325 //
326 BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
327
328 switch (Index) {
329
330 case TypeIo:
331 //
332 // It is impossible for this chipset to align 0xFFFF for IO16
333 // So clear it
334 //
335 if (BitsOfAlignment >= 16) {
336 BitsOfAlignment = 0;
337 }
338
339 Status = gDS->AllocateIoSpace (
340 EfiGcdAllocateAnySearchBottomUp,
341 EfiGcdIoTypeIo,
342 BitsOfAlignment,
343 AddrLen,
344 &BaseAddress,
345 mDriverImageHandle,
346 NULL
347 );
348
349 if (!EFI_ERROR (Status)) {
350 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
351 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
352 } else {
353 ReturnStatus = Status;
354 if (Status != EFI_OUT_OF_RESOURCES) {
355 RootBridgeInstance->ResAllocNode[Index].Length = 0;
356 }
357 }
358
359 break;
360
361
362 case TypeMem32:
363 //
364 // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
365 // So clear it
366 //
367
368 if (BitsOfAlignment >= 32) {
369 BitsOfAlignment = 0;
370 }
371
372 Status = gDS->AllocateMemorySpace (
373 EfiGcdAllocateAnySearchBottomUp,
374 EfiGcdMemoryTypeMemoryMappedIo,
375 BitsOfAlignment,
376 AddrLen,
377 &BaseAddress,
378 mDriverImageHandle,
379 NULL
380 );
381
382 if (!EFI_ERROR (Status)) {
383 // We were able to allocate the PCI memory
384 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
385 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
386
387 } else {
388 // Not able to allocate enough PCI memory
389 ReturnStatus = Status;
390
391 if (Status != EFI_OUT_OF_RESOURCES) {
392 RootBridgeInstance->ResAllocNode[Index].Length = 0;
393 }
394 ASSERT (FALSE);
395 }
396 break;
397
398 case TypePMem32:
399 case TypeMem64:
400 case TypePMem64:
401 ReturnStatus = EFI_ABORTED;
402 break;
403 default:
404 ASSERT (FALSE);
405 break;
406 }; //end switch
407 }
408 }
409
410 List = List->ForwardLink;
411 }
412
413 return ReturnStatus;
414
415 } else {
416 return EFI_NOT_READY;
417 }
418 break;
419
420 case EfiPciHostBridgeSetResources:
421 break;
422
423 case EfiPciHostBridgeFreeResources:
424 ReturnStatus = EFI_SUCCESS;
425 List = HostBridgeInstance->Head.ForwardLink;
426 while (List != &HostBridgeInstance->Head) {
427 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
428 for (Index = TypeIo; Index < TypeBus; Index++) {
429 if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {
430 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
431 BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
432 switch (Index) {
433
434 case TypeIo:
435 Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
436 if (EFI_ERROR (Status)) {
437 ReturnStatus = Status;
438 }
439 break;
440
441 case TypeMem32:
442 Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);
443 if (EFI_ERROR (Status)) {
444 ReturnStatus = Status;
445 }
446 break;
447
448 case TypePMem32:
449 break;
450
451 case TypeMem64:
452 break;
453
454 case TypePMem64:
455 break;
456
457 default:
458 ASSERT (FALSE);
459 break;
460
461 }; //end switch
462 RootBridgeInstance->ResAllocNode[Index].Type = Index;
463 RootBridgeInstance->ResAllocNode[Index].Base = 0;
464 RootBridgeInstance->ResAllocNode[Index].Length = 0;
465 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
466 }
467 }
468
469 List = List->ForwardLink;
470 }
471
472 HostBridgeInstance->ResourceSubmited = FALSE;
473 HostBridgeInstance->CanRestarted = TRUE;
474 return ReturnStatus;
475
476 case EfiPciHostBridgeEndResourceAllocation:
477 HostBridgeInstance->CanRestarted = FALSE;
478 break;
479
480 default:
481 return EFI_INVALID_PARAMETER;
482 }
483
484 return EFI_SUCCESS;
485 }
486
487 /**
488 Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
489
490 This function is called multiple times to retrieve the device handles of all the PCI root bridges that
491 are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
492 root bridges. On each call, the handle that was returned by the previous call is passed into the
493 interface, and on output the interface returns the device handle of the next PCI root bridge. The
494 caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
495 for that root bridge. When there are no more PCI root bridges to report, the interface returns
496 EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
497 are returned by this function.
498 For D945 implementation, there is only one root bridge in PCI host bridge.
499
500 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
501 @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.
502
503 @retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
504 specific Host bridge and return EFI_SUCCESS.
505 @retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.
506 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
507 returned on a previous call to GetNextRootBridge().
508 **/
509 EFI_STATUS
510 EFIAPI
511 GetNextRootBridge(
512 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
513 IN OUT EFI_HANDLE *RootBridgeHandle
514 )
515 {
516 BOOLEAN NoRootBridge;
517 LIST_ENTRY *List;
518 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
519 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
520
521 NoRootBridge = TRUE;
522 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
523 List = HostBridgeInstance->Head.ForwardLink;
524
525
526 while (List != &HostBridgeInstance->Head) {
527 NoRootBridge = FALSE;
528 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
529 if (*RootBridgeHandle == NULL) {
530 //
531 // Return the first Root Bridge Handle of the Host Bridge
532 //
533 *RootBridgeHandle = RootBridgeInstance->Handle;
534 return EFI_SUCCESS;
535 } else {
536 if (*RootBridgeHandle == RootBridgeInstance->Handle) {
537 //
538 // Get next if have
539 //
540 List = List->ForwardLink;
541 if (List!=&HostBridgeInstance->Head) {
542 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
543 *RootBridgeHandle = RootBridgeInstance->Handle;
544 return EFI_SUCCESS;
545 } else {
546 return EFI_NOT_FOUND;
547 }
548 }
549 }
550
551 List = List->ForwardLink;
552 } //end while
553
554 if (NoRootBridge) {
555 return EFI_NOT_FOUND;
556 } else {
557 return EFI_INVALID_PARAMETER;
558 }
559 }
560
561 /**
562 Returns the allocation attributes of a PCI root bridge.
563
564 The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
565 from one PCI root bridge to another. These attributes are different from the decode-related
566 attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
567 RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
568 handles of all the root bridges that are associated with this host bridge must be obtained by calling
569 GetNextRootBridge(). The attributes are static in the sense that they do not change during or
570 after the enumeration process. The hardware may provide mechanisms to change the attributes on
571 the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
572 installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
573 "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
574 For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
575 include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
576 prefetchable memory.
577 Attribute Description
578 ------------------------------------ ----------------------------------------------------------------------
579 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate
580 windows for nonprefetchable and prefetchable memory. A PCI bus
581 driver needs to include requests for prefetchable memory in the
582 nonprefetchable memory pool.
583
584 EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory
585 windows. If this bit is not set, the PCI bus driver needs to include
586 requests for a 64-bit memory address in the corresponding 32-bit
587 memory pool.
588
589 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
590 @param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type
591 EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
592 @param[out] Attributes The pointer to attribte of root bridge, it is output parameter
593
594 @retval EFI_INVALID_PARAMETER Attribute pointer is NULL
595 @retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
596 @retval EFI_SUCCESS Success to get attribute of interested root bridge.
597
598 **/
599 EFI_STATUS
600 EFIAPI
601 GetAttributes(
602 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
603 IN EFI_HANDLE RootBridgeHandle,
604 OUT UINT64 *Attributes
605 )
606 {
607 LIST_ENTRY *List;
608 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
609 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
610
611 if (Attributes == NULL) {
612 return EFI_INVALID_PARAMETER;
613 }
614
615 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
616 List = HostBridgeInstance->Head.ForwardLink;
617
618 while (List != &HostBridgeInstance->Head) {
619 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
620 if (RootBridgeHandle == RootBridgeInstance->Handle) {
621 *Attributes = RootBridgeInstance->RootBridgeAttrib;
622 return EFI_SUCCESS;
623 }
624 List = List->ForwardLink;
625 }
626
627 //
628 // RootBridgeHandle is not an EFI_HANDLE
629 // that was returned on a previous call to GetNextRootBridge()
630 //
631 return EFI_INVALID_PARAMETER;
632 }
633
634 /**
635 Sets up the specified PCI root bridge for the bus enumeration process.
636
637 This member function sets up the root bridge for bus enumeration and returns the PCI bus range
638 over which the search should be performed in ACPI 2.0 resource descriptor format.
639
640 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
641 @param[in] RootBridgeHandle The PCI Root Bridge to be set up.
642 @param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.
643
644 @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
645 @retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
646 @retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
647
648 **/
649 EFI_STATUS
650 EFIAPI
651 StartBusEnumeration(
652 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
653 IN EFI_HANDLE RootBridgeHandle,
654 OUT VOID **Configuration
655 )
656 {
657 LIST_ENTRY *List;
658 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
659 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
660 VOID *Buffer;
661 UINT8 *Temp;
662 UINT64 BusStart;
663 UINT64 BusEnd;
664
665 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
666 List = HostBridgeInstance->Head.ForwardLink;
667
668 while (List != &HostBridgeInstance->Head) {
669 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
670 if (RootBridgeHandle == RootBridgeInstance->Handle) {
671 //
672 // Set up the Root Bridge for Bus Enumeration
673 //
674 BusStart = RootBridgeInstance->BusBase;
675 BusEnd = RootBridgeInstance->BusLimit;
676 //
677 // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
678 //
679
680 Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
681 if (Buffer == NULL) {
682 return EFI_OUT_OF_RESOURCES;
683 }
684
685 Temp = (UINT8 *)Buffer;
686
687 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
688 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
689 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
690 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
691 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
692 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
693 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
694 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
695 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
696 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
697
698 Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
699 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
700 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
701
702 *Configuration = Buffer;
703 return EFI_SUCCESS;
704 }
705 List = List->ForwardLink;
706 }
707
708 return EFI_INVALID_PARAMETER;
709 }
710
711 /**
712 Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
713
714 This member function programs the specified PCI root bridge to decode the bus range that is
715 specified by the input parameter Configuration.
716 The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
717
718 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
719 @param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
720 @param[in] Configuration The pointer to the PCI bus resource descriptor
721
722 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
723 @retval EFI_INVALID_PARAMETER Configuration is NULL.
724 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
725 @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.
726 @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than
727 bus descriptors.
728 @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.
729 @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.
730 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.
731 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
732 @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.
733
734 **/
735 EFI_STATUS
736 EFIAPI
737 SetBusNumbers(
738 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
739 IN EFI_HANDLE RootBridgeHandle,
740 IN VOID *Configuration
741 )
742 {
743 LIST_ENTRY *List;
744 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
745 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
746 UINT8 *Ptr;
747 UINTN BusStart;
748 UINTN BusEnd;
749 UINTN BusLen;
750
751 if (Configuration == NULL) {
752 return EFI_INVALID_PARAMETER;
753 }
754
755 Ptr = Configuration;
756
757 //
758 // Check the Configuration is valid
759 //
760 if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
761 return EFI_INVALID_PARAMETER;
762 }
763
764 if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
765 return EFI_INVALID_PARAMETER;
766 }
767
768 Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
769 if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
770 return EFI_INVALID_PARAMETER;
771 }
772
773 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
774 List = HostBridgeInstance->Head.ForwardLink;
775
776 Ptr = Configuration;
777
778 while (List != &HostBridgeInstance->Head) {
779 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
780 if (RootBridgeHandle == RootBridgeInstance->Handle) {
781 BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
782 BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
783 BusEnd = BusStart + BusLen - 1;
784
785 if (BusStart > BusEnd) {
786 return EFI_INVALID_PARAMETER;
787 }
788
789 if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
790 return EFI_INVALID_PARAMETER;
791 }
792
793 //
794 // Update the Bus Range
795 //
796 RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
797 RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
798 RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
799
800 //
801 // Program the Root Bridge Hardware
802 //
803
804 return EFI_SUCCESS;
805 }
806
807 List = List->ForwardLink;
808 }
809
810 return EFI_INVALID_PARAMETER;
811 }
812
813
814 /**
815 Submits the I/O and memory resource requirements for the specified PCI root bridge.
816
817 This function is used to submit all the I/O and memory resources that are required by the specified
818 PCI root bridge. The input parameter Configuration is used to specify the following:
819 - The various types of resources that are required
820 - The associated lengths in terms of ACPI 2.0 resource descriptor format
821
822 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
823 @param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.
824 @param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.
825
826 @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.
827 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
828 @retval EFI_INVALID_PARAMETER Configuration is NULL.
829 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
830 @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are
831 not supported by this PCI root bridge. This error will happen if the caller
832 did not combine resources according to Attributes that were returned by
833 GetAllocAttributes().
834 @retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
835 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.
836 @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.
837
838 **/
839 EFI_STATUS
840 EFIAPI
841 SubmitResources(
842 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
843 IN EFI_HANDLE RootBridgeHandle,
844 IN VOID *Configuration
845 )
846 {
847 LIST_ENTRY *List;
848 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
849 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
850 UINT8 *Temp;
851 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
852 UINT64 AddrLen;
853 UINT64 Alignment;
854
855 //
856 // Check the input parameter: Configuration
857 //
858 if (Configuration == NULL) {
859 return EFI_INVALID_PARAMETER;
860 }
861
862 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
863 List = HostBridgeInstance->Head.ForwardLink;
864
865 Temp = (UINT8 *)Configuration;
866 while ( *Temp == 0x8A) {
867 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
868 }
869 if (*Temp != 0x79) {
870 return EFI_INVALID_PARAMETER;
871 }
872
873 Temp = (UINT8 *)Configuration;
874 while (List != &HostBridgeInstance->Head) {
875 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
876 if (RootBridgeHandle == RootBridgeInstance->Handle) {
877 while ( *Temp == 0x8A) {
878 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
879
880 //
881 // Check Address Length
882 //
883 if (Ptr->AddrLen > 0xffffffff) {
884 return EFI_INVALID_PARAMETER;
885 }
886
887 //
888 // Check address range alignment
889 //
890 if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
891 return EFI_INVALID_PARAMETER;
892 }
893
894 switch (Ptr->ResType) {
895
896 case 0:
897
898 //
899 // Check invalid Address Sapce Granularity
900 //
901 if (Ptr->AddrSpaceGranularity != 32) {
902 return EFI_INVALID_PARAMETER;
903 }
904
905 //
906 // check the memory resource request is supported by PCI root bridge
907 //
908 if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
909 Ptr->SpecificFlag == 0x06) {
910 return EFI_INVALID_PARAMETER;
911 }
912
913 AddrLen = Ptr->AddrLen;
914 Alignment = Ptr->AddrRangeMax;
915 if (Ptr->AddrSpaceGranularity == 32) {
916 if (Ptr->SpecificFlag == 0x06) {
917 //
918 // Apply from GCD
919 //
920 RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
921 } else {
922 RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
923 RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
924 RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
925 HostBridgeInstance->ResourceSubmited = TRUE;
926 }
927 }
928
929 if (Ptr->AddrSpaceGranularity == 64) {
930 if (Ptr->SpecificFlag == 0x06) {
931 RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
932 } else {
933 RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
934 }
935 }
936 break;
937
938 case 1:
939 AddrLen = (UINTN) Ptr->AddrLen;
940 Alignment = (UINTN) Ptr->AddrRangeMax;
941 RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
942 RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
943 RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
944 HostBridgeInstance->ResourceSubmited = TRUE;
945 break;
946
947 default:
948 break;
949 };
950
951 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
952 }
953
954 return EFI_SUCCESS;
955 }
956
957 List = List->ForwardLink;
958 }
959
960 return EFI_INVALID_PARAMETER;
961 }
962
963 /**
964 Returns the proposed resource settings for the specified PCI root bridge.
965
966 This member function returns the proposed resource settings for the specified PCI root bridge. The
967 proposed resource settings are prepared when NotifyPhase() is called with a Phase of
968 EfiPciHostBridgeAllocateResources. The output parameter Configuration
969 specifies the following:
970 - The various types of resources, excluding bus resources, that are allocated
971 - The associated lengths in terms of ACPI 2.0 resource descriptor format
972
973 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
974 @param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
975 @param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.
976
977 @retval EFI_SUCCESS The requested parameters were returned.
978 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
979 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
980 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
981
982 **/
983 EFI_STATUS
984 EFIAPI
985 GetProposedResources(
986 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
987 IN EFI_HANDLE RootBridgeHandle,
988 OUT VOID **Configuration
989 )
990 {
991 LIST_ENTRY *List;
992 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
993 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
994 UINTN Index;
995 UINTN Number;
996 VOID *Buffer;
997 UINT8 *Temp;
998 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
999 UINT64 ResStatus;
1000
1001 Buffer = NULL;
1002 Number = 0;
1003 //
1004 // Get the Host Bridge Instance from the resource allocation protocol
1005 //
1006 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1007 List = HostBridgeInstance->Head.ForwardLink;
1008
1009 //
1010 // Enumerate the root bridges in this host bridge
1011 //
1012 while (List != &HostBridgeInstance->Head) {
1013 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1014 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1015 for (Index = 0; Index < TypeBus; Index ++) {
1016 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1017 Number ++;
1018 }
1019 }
1020
1021 if (Number == 0) {
1022 return EFI_INVALID_PARAMETER;
1023 }
1024
1025 Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
1026 if (Buffer == NULL) {
1027 return EFI_OUT_OF_RESOURCES;
1028 }
1029
1030 Temp = Buffer;
1031 for (Index = 0; Index < TypeBus; Index ++) {
1032 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1033 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
1034 ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
1035
1036 switch (Index) {
1037
1038 case TypeIo:
1039 //
1040 // Io
1041 //
1042 Ptr->Desc = 0x8A;
1043 Ptr->Len = 0x2B;
1044 Ptr->ResType = 1;
1045 Ptr->GenFlag = 0;
1046 Ptr->SpecificFlag = 0;
1047 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1048 Ptr->AddrRangeMax = 0;
1049 Ptr->AddrTranslationOffset = \
1050 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1051 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1052 break;
1053
1054 case TypeMem32:
1055 //
1056 // Memory 32
1057 //
1058 Ptr->Desc = 0x8A;
1059 Ptr->Len = 0x2B;
1060 Ptr->ResType = 0;
1061 Ptr->GenFlag = 0;
1062 Ptr->SpecificFlag = 0;
1063 Ptr->AddrSpaceGranularity = 32;
1064 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1065 Ptr->AddrRangeMax = 0;
1066 Ptr->AddrTranslationOffset = \
1067 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1068 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1069 break;
1070
1071 case TypePMem32:
1072 //
1073 // Prefetch memory 32
1074 //
1075 Ptr->Desc = 0x8A;
1076 Ptr->Len = 0x2B;
1077 Ptr->ResType = 0;
1078 Ptr->GenFlag = 0;
1079 Ptr->SpecificFlag = 6;
1080 Ptr->AddrSpaceGranularity = 32;
1081 Ptr->AddrRangeMin = 0;
1082 Ptr->AddrRangeMax = 0;
1083 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1084 Ptr->AddrLen = 0;
1085 break;
1086
1087 case TypeMem64:
1088 //
1089 // Memory 64
1090 //
1091 Ptr->Desc = 0x8A;
1092 Ptr->Len = 0x2B;
1093 Ptr->ResType = 0;
1094 Ptr->GenFlag = 0;
1095 Ptr->SpecificFlag = 0;
1096 Ptr->AddrSpaceGranularity = 64;
1097 Ptr->AddrRangeMin = 0;
1098 Ptr->AddrRangeMax = 0;
1099 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1100 Ptr->AddrLen = 0;
1101 break;
1102
1103 case TypePMem64:
1104 //
1105 // Prefetch memory 64
1106 //
1107 Ptr->Desc = 0x8A;
1108 Ptr->Len = 0x2B;
1109 Ptr->ResType = 0;
1110 Ptr->GenFlag = 0;
1111 Ptr->SpecificFlag = 6;
1112 Ptr->AddrSpaceGranularity = 64;
1113 Ptr->AddrRangeMin = 0;
1114 Ptr->AddrRangeMax = 0;
1115 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1116 Ptr->AddrLen = 0;
1117 break;
1118 };
1119
1120 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
1121 }
1122 }
1123
1124 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
1125 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
1126
1127 *Configuration = Buffer;
1128
1129 return EFI_SUCCESS;
1130 }
1131
1132 List = List->ForwardLink;
1133 }
1134
1135 return EFI_INVALID_PARAMETER;
1136 }
1137
1138 /**
1139 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1140 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1141 PCI controllers before enumeration.
1142
1143 This function is called during the PCI enumeration process. No specific action is expected from this
1144 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1145 enumeration.
1146
1147 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1148 @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in
1149 InstallProtocolInterface() in the UEFI 2.0 Specification.
1150 @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the
1151 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
1152 configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
1153 the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
1154 @param Phase The phase of the PCI device enumeration.
1155
1156 @retval EFI_SUCCESS The requested parameters were returned.
1157 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1158 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1159 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1160 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1161 not enumerate this device, including its child devices if it is a PCI-to-PCI
1162 bridge.
1163
1164 **/
1165 EFI_STATUS
1166 EFIAPI
1167 PreprocessController (
1168 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1169 IN EFI_HANDLE RootBridgeHandle,
1170 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
1171 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1172 )
1173 {
1174 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1175 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1176 LIST_ENTRY *List;
1177
1178 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1179 List = HostBridgeInstance->Head.ForwardLink;
1180
1181 //
1182 // Enumerate the root bridges in this host bridge
1183 //
1184 while (List != &HostBridgeInstance->Head) {
1185 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1186 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1187 break;
1188 }
1189 List = List->ForwardLink;
1190 }
1191 if (List == &HostBridgeInstance->Head) {
1192 return EFI_INVALID_PARAMETER;
1193 }
1194
1195 if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
1196 return EFI_INVALID_PARAMETER;
1197 }
1198
1199 return EFI_SUCCESS;
1200 }