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ArmVirtualizationPkg/PciHostBridgeDxe: add room for PCI resource allocation
[mirror_edk2.git] / ArmPlatformPkg / ArmVirtualizationPkg / PciHostBridgeDxe / PciHostBridge.c
1 /** @file
2 Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
3
4 Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "PciHostBridge.h"
16
17 //
18 // Hard code: Root Bridge Number within the host bridge
19 // Root Bridge's attribute
20 // Root Bridge's device path
21 // Root Bridge's resource aperture
22 //
23 UINTN RootBridgeNumber[1] = { 1 };
24
25 UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };
26
27 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
28 {
29 {
30 {
31 {
32 ACPI_DEVICE_PATH,
33 ACPI_DP,
34 {
35 (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
36 (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
37 }
38 },
39 EISA_PNP_ID(0x0A03),
40 0
41 },
42
43 {
44 END_DEVICE_PATH_TYPE,
45 END_ENTIRE_DEVICE_PATH_SUBTYPE,
46 {
47 END_DEVICE_PATH_LENGTH,
48 0
49 }
50 }
51 }
52 }
53 };
54
55 STATIC PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1];
56
57 EFI_HANDLE mDriverImageHandle;
58
59 PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
60 PCI_HOST_BRIDGE_SIGNATURE, // Signature
61 NULL, // HostBridgeHandle
62 0, // RootBridgeNumber
63 {NULL, NULL}, // Head
64 FALSE, // ResourceSubiteed
65 TRUE, // CanRestarted
66 {
67 NotifyPhase,
68 GetNextRootBridge,
69 GetAttributes,
70 StartBusEnumeration,
71 SetBusNumbers,
72 SubmitResources,
73 GetProposedResources,
74 PreprocessController
75 }
76 };
77
78 //
79 // Implementation
80 //
81
82 /**
83 Entry point of this driver
84
85 @param ImageHandle Handle of driver image
86 @param SystemTable Point to EFI_SYSTEM_TABLE
87
88 @retval EFI_ABORTED PCI host bridge not present
89 @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource
90 @retval EFI_DEVICE_ERROR Can not install the protocol instance
91 @retval EFI_SUCCESS Success to initialize the Pci host bridge.
92 **/
93 EFI_STATUS
94 EFIAPI
95 InitializePciHostBridge (
96 IN EFI_HANDLE ImageHandle,
97 IN EFI_SYSTEM_TABLE *SystemTable
98 )
99 {
100 EFI_STATUS Status;
101 UINTN Loop1;
102 UINTN Loop2;
103 PCI_HOST_BRIDGE_INSTANCE *HostBridge;
104 PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
105
106 if (PcdGet64 (PcdPciExpressBaseAddress) == 0) {
107 DEBUG ((EFI_D_INFO, "%a: PCI host bridge not present\n", __FUNCTION__));
108 return EFI_ABORTED;
109 }
110
111 mDriverImageHandle = ImageHandle;
112
113 mResAperture[0][0].BusBase = PcdGet32 (PcdPciBusMin);
114 mResAperture[0][0].BusLimit = PcdGet32 (PcdPciBusMax);
115
116 mResAperture[0][0].MemBase = PcdGet32 (PcdPciMmio32Base);
117 mResAperture[0][0].MemLimit = (UINT64)PcdGet32 (PcdPciMmio32Base) +
118 PcdGet32 (PcdPciMmio32Size) - 1;
119
120 mResAperture[0][0].IoBase = PcdGet64 (PcdPciIoBase);
121 mResAperture[0][0].IoLimit = PcdGet64 (PcdPciIoBase) +
122 PcdGet64 (PcdPciIoSize) - 1;
123 mResAperture[0][0].IoTranslation = PcdGet64 (PcdPciIoTranslation);
124
125 //
126 // Add IO and MMIO memory space, so that resources can be allocated in the
127 // EfiPciHostBridgeAllocateResources phase.
128 //
129 Status = gDS->AddIoSpace (
130 EfiGcdIoTypeIo,
131 PcdGet64 (PcdPciIoBase),
132 PcdGet64 (PcdPciIoSize)
133 );
134 ASSERT_EFI_ERROR (Status);
135
136 Status = gDS->AddMemorySpace (
137 EfiGcdMemoryTypeMemoryMappedIo,
138 PcdGet32 (PcdPciMmio32Base),
139 PcdGet32 (PcdPciMmio32Size),
140 EFI_MEMORY_UC
141 );
142 if (EFI_ERROR (Status)) {
143 DEBUG ((EFI_D_ERROR, "%a: AddMemorySpace: %r\n", __FUNCTION__, Status));
144 return Status;
145 }
146
147 //
148 // Create Host Bridge Device Handle
149 //
150 for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
151 HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
152 if (HostBridge == NULL) {
153 return EFI_OUT_OF_RESOURCES;
154 }
155
156 HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
157 InitializeListHead (&HostBridge->Head);
158
159 Status = gBS->InstallMultipleProtocolInterfaces (
160 &HostBridge->HostBridgeHandle,
161 &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
162 NULL
163 );
164 if (EFI_ERROR (Status)) {
165 FreePool (HostBridge);
166 return EFI_DEVICE_ERROR;
167 }
168
169 //
170 // Create Root Bridge Device Handle in this Host Bridge
171 //
172
173 for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
174 PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
175 if (PrivateData == NULL) {
176 return EFI_OUT_OF_RESOURCES;
177 }
178
179 PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
180 PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
181
182 RootBridgeConstructor (
183 &PrivateData->Io,
184 HostBridge->HostBridgeHandle,
185 RootBridgeAttribute[Loop1][Loop2],
186 &mResAperture[Loop1][Loop2]
187 );
188
189 Status = gBS->InstallMultipleProtocolInterfaces(
190 &PrivateData->Handle,
191 &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,
192 &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
193 NULL
194 );
195 if (EFI_ERROR (Status)) {
196 FreePool(PrivateData);
197 return EFI_DEVICE_ERROR;
198 }
199
200 InsertTailList (&HostBridge->Head, &PrivateData->Link);
201 }
202 }
203
204 return EFI_SUCCESS;
205 }
206
207
208 /**
209 These are the notifications from the PCI bus driver that it is about to enter a certain
210 phase of the PCI enumeration process.
211
212 This member function can be used to notify the host bridge driver to perform specific actions,
213 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
214 Eight notification points are defined at this time. See belows:
215 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
216 structures. The PCI enumerator should issue this notification
217 before starting a fresh enumeration process. Enumeration cannot
218 be restarted after sending any other notification such as
219 EfiPciHostBridgeBeginBusAllocation.
220 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
221 required here. This notification can be used to perform any
222 chipset-specific programming.
223 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
224 specific action is required here. This notification can be used to
225 perform any chipset-specific programming.
226 EfiPciHostBridgeBeginResourceAllocation
227 The resource allocation phase is about to begin. No specific
228 action is required here. This notification can be used to perform
229 any chipset-specific programming.
230 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
231 root bridges. These resource settings are returned on the next call to
232 GetProposedResources(). Before calling NotifyPhase() with a Phase of
233 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
234 for gathering I/O and memory requests for
235 all the PCI root bridges and submitting these requests using
236 SubmitResources(). This function pads the resource amount
237 to suit the root bridge hardware, takes care of dependencies between
238 the PCI root bridges, and calls the Global Coherency Domain (GCD)
239 with the allocation request. In the case of padding, the allocated range
240 could be bigger than what was requested.
241 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
242 resources (proposed resources) for all the PCI root bridges. After the
243 hardware is programmed, reassigning resources will not be supported.
244 The bus settings are not affected.
245 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
246 root bridges and resets the I/O and memory apertures to their initial
247 state. The bus settings are not affected. If the request to allocate
248 resources fails, the PCI enumerator can use this notification to
249 deallocate previous resources, adjust the requests, and retry
250 allocation.
251 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
252 required here. This notification can be used to perform any chipsetspecific
253 programming.
254
255 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
256 @param[in] Phase The phase during enumeration
257
258 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
259 is valid for a Phase of EfiPciHostBridgeAllocateResources if
260 SubmitResources() has not been called for one or more
261 PCI root bridges before this call
262 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
263 for a Phase of EfiPciHostBridgeSetResources.
264 @retval EFI_INVALID_PARAMETER Invalid phase parameter
265 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
266 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
267 previously submitted resource requests cannot be fulfilled or
268 were only partially fulfilled.
269 @retval EFI_SUCCESS The notification was accepted without any errors.
270
271 **/
272 EFI_STATUS
273 EFIAPI
274 NotifyPhase(
275 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
276 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
277 )
278 {
279 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
280 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
281 PCI_RESOURCE_TYPE Index;
282 LIST_ENTRY *List;
283 EFI_PHYSICAL_ADDRESS BaseAddress;
284 UINT64 AddrLen;
285 UINTN BitsOfAlignment;
286 EFI_STATUS Status;
287 EFI_STATUS ReturnStatus;
288
289 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
290
291 switch (Phase) {
292
293 case EfiPciHostBridgeBeginEnumeration:
294 if (HostBridgeInstance->CanRestarted) {
295 //
296 // Reset the Each Root Bridge
297 //
298 List = HostBridgeInstance->Head.ForwardLink;
299
300 while (List != &HostBridgeInstance->Head) {
301 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
302 for (Index = TypeIo; Index < TypeMax; Index++) {
303 RootBridgeInstance->ResAllocNode[Index].Type = Index;
304 RootBridgeInstance->ResAllocNode[Index].Base = 0;
305 RootBridgeInstance->ResAllocNode[Index].Length = 0;
306 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
307 }
308
309 List = List->ForwardLink;
310 }
311
312 HostBridgeInstance->ResourceSubmited = FALSE;
313 HostBridgeInstance->CanRestarted = TRUE;
314 } else {
315 //
316 // Can not restart
317 //
318 return EFI_NOT_READY;
319 }
320 break;
321
322 case EfiPciHostBridgeEndEnumeration:
323 break;
324
325 case EfiPciHostBridgeBeginBusAllocation:
326 //
327 // No specific action is required here, can perform any chipset specific programing
328 //
329 HostBridgeInstance->CanRestarted = FALSE;
330 break;
331
332 case EfiPciHostBridgeEndBusAllocation:
333 //
334 // No specific action is required here, can perform any chipset specific programing
335 //
336 //HostBridgeInstance->CanRestarted = FALSE;
337 break;
338
339 case EfiPciHostBridgeBeginResourceAllocation:
340 //
341 // No specific action is required here, can perform any chipset specific programing
342 //
343 //HostBridgeInstance->CanRestarted = FALSE;
344 break;
345
346 case EfiPciHostBridgeAllocateResources:
347 ReturnStatus = EFI_SUCCESS;
348 if (HostBridgeInstance->ResourceSubmited) {
349 //
350 // Take care of the resource dependencies between the root bridges
351 //
352 List = HostBridgeInstance->Head.ForwardLink;
353
354 while (List != &HostBridgeInstance->Head) {
355 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
356 for (Index = TypeIo; Index < TypeBus; Index++) {
357 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
358
359 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
360
361 //
362 // Get the number of '1' in Alignment.
363 //
364 BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
365
366 switch (Index) {
367
368 case TypeIo:
369 //
370 // It is impossible for this chipset to align 0xFFFF for IO16
371 // So clear it
372 //
373 if (BitsOfAlignment >= 16) {
374 BitsOfAlignment = 0;
375 }
376
377 Status = gDS->AllocateIoSpace (
378 EfiGcdAllocateAnySearchBottomUp,
379 EfiGcdIoTypeIo,
380 BitsOfAlignment,
381 AddrLen,
382 &BaseAddress,
383 mDriverImageHandle,
384 NULL
385 );
386
387 if (!EFI_ERROR (Status)) {
388 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
389 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
390 } else {
391 ReturnStatus = Status;
392 if (Status != EFI_OUT_OF_RESOURCES) {
393 RootBridgeInstance->ResAllocNode[Index].Length = 0;
394 }
395 }
396
397 break;
398
399
400 case TypeMem32:
401 //
402 // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
403 // So clear it
404 //
405
406 if (BitsOfAlignment >= 32) {
407 BitsOfAlignment = 0;
408 }
409
410 Status = gDS->AllocateMemorySpace (
411 EfiGcdAllocateAnySearchBottomUp,
412 EfiGcdMemoryTypeMemoryMappedIo,
413 BitsOfAlignment,
414 AddrLen,
415 &BaseAddress,
416 mDriverImageHandle,
417 NULL
418 );
419
420 if (!EFI_ERROR (Status)) {
421 // We were able to allocate the PCI memory
422 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
423 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
424
425 } else {
426 // Not able to allocate enough PCI memory
427 ReturnStatus = Status;
428
429 if (Status != EFI_OUT_OF_RESOURCES) {
430 RootBridgeInstance->ResAllocNode[Index].Length = 0;
431 }
432 ASSERT (FALSE);
433 }
434 break;
435
436 case TypePMem32:
437 case TypeMem64:
438 case TypePMem64:
439 ReturnStatus = EFI_ABORTED;
440 break;
441 default:
442 ASSERT (FALSE);
443 break;
444 }; //end switch
445 }
446 }
447
448 List = List->ForwardLink;
449 }
450
451 return ReturnStatus;
452
453 } else {
454 return EFI_NOT_READY;
455 }
456 break;
457
458 case EfiPciHostBridgeSetResources:
459 break;
460
461 case EfiPciHostBridgeFreeResources:
462 ReturnStatus = EFI_SUCCESS;
463 List = HostBridgeInstance->Head.ForwardLink;
464 while (List != &HostBridgeInstance->Head) {
465 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
466 for (Index = TypeIo; Index < TypeBus; Index++) {
467 if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {
468 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
469 BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
470 switch (Index) {
471
472 case TypeIo:
473 Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
474 if (EFI_ERROR (Status)) {
475 ReturnStatus = Status;
476 }
477 break;
478
479 case TypeMem32:
480 Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);
481 if (EFI_ERROR (Status)) {
482 ReturnStatus = Status;
483 }
484 break;
485
486 case TypePMem32:
487 break;
488
489 case TypeMem64:
490 break;
491
492 case TypePMem64:
493 break;
494
495 default:
496 ASSERT (FALSE);
497 break;
498
499 }; //end switch
500 RootBridgeInstance->ResAllocNode[Index].Type = Index;
501 RootBridgeInstance->ResAllocNode[Index].Base = 0;
502 RootBridgeInstance->ResAllocNode[Index].Length = 0;
503 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
504 }
505 }
506
507 List = List->ForwardLink;
508 }
509
510 HostBridgeInstance->ResourceSubmited = FALSE;
511 HostBridgeInstance->CanRestarted = TRUE;
512 return ReturnStatus;
513
514 case EfiPciHostBridgeEndResourceAllocation:
515 HostBridgeInstance->CanRestarted = FALSE;
516 break;
517
518 default:
519 return EFI_INVALID_PARAMETER;
520 }
521
522 return EFI_SUCCESS;
523 }
524
525 /**
526 Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
527
528 This function is called multiple times to retrieve the device handles of all the PCI root bridges that
529 are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
530 root bridges. On each call, the handle that was returned by the previous call is passed into the
531 interface, and on output the interface returns the device handle of the next PCI root bridge. The
532 caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
533 for that root bridge. When there are no more PCI root bridges to report, the interface returns
534 EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
535 are returned by this function.
536 For D945 implementation, there is only one root bridge in PCI host bridge.
537
538 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
539 @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.
540
541 @retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
542 specific Host bridge and return EFI_SUCCESS.
543 @retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.
544 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
545 returned on a previous call to GetNextRootBridge().
546 **/
547 EFI_STATUS
548 EFIAPI
549 GetNextRootBridge(
550 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
551 IN OUT EFI_HANDLE *RootBridgeHandle
552 )
553 {
554 BOOLEAN NoRootBridge;
555 LIST_ENTRY *List;
556 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
557 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
558
559 NoRootBridge = TRUE;
560 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
561 List = HostBridgeInstance->Head.ForwardLink;
562
563
564 while (List != &HostBridgeInstance->Head) {
565 NoRootBridge = FALSE;
566 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
567 if (*RootBridgeHandle == NULL) {
568 //
569 // Return the first Root Bridge Handle of the Host Bridge
570 //
571 *RootBridgeHandle = RootBridgeInstance->Handle;
572 return EFI_SUCCESS;
573 } else {
574 if (*RootBridgeHandle == RootBridgeInstance->Handle) {
575 //
576 // Get next if have
577 //
578 List = List->ForwardLink;
579 if (List!=&HostBridgeInstance->Head) {
580 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
581 *RootBridgeHandle = RootBridgeInstance->Handle;
582 return EFI_SUCCESS;
583 } else {
584 return EFI_NOT_FOUND;
585 }
586 }
587 }
588
589 List = List->ForwardLink;
590 } //end while
591
592 if (NoRootBridge) {
593 return EFI_NOT_FOUND;
594 } else {
595 return EFI_INVALID_PARAMETER;
596 }
597 }
598
599 /**
600 Returns the allocation attributes of a PCI root bridge.
601
602 The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
603 from one PCI root bridge to another. These attributes are different from the decode-related
604 attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
605 RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
606 handles of all the root bridges that are associated with this host bridge must be obtained by calling
607 GetNextRootBridge(). The attributes are static in the sense that they do not change during or
608 after the enumeration process. The hardware may provide mechanisms to change the attributes on
609 the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
610 installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
611 "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
612 For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
613 include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
614 prefetchable memory.
615 Attribute Description
616 ------------------------------------ ----------------------------------------------------------------------
617 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate
618 windows for nonprefetchable and prefetchable memory. A PCI bus
619 driver needs to include requests for prefetchable memory in the
620 nonprefetchable memory pool.
621
622 EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory
623 windows. If this bit is not set, the PCI bus driver needs to include
624 requests for a 64-bit memory address in the corresponding 32-bit
625 memory pool.
626
627 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
628 @param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type
629 EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
630 @param[out] Attributes The pointer to attribte of root bridge, it is output parameter
631
632 @retval EFI_INVALID_PARAMETER Attribute pointer is NULL
633 @retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
634 @retval EFI_SUCCESS Success to get attribute of interested root bridge.
635
636 **/
637 EFI_STATUS
638 EFIAPI
639 GetAttributes(
640 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
641 IN EFI_HANDLE RootBridgeHandle,
642 OUT UINT64 *Attributes
643 )
644 {
645 LIST_ENTRY *List;
646 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
647 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
648
649 if (Attributes == NULL) {
650 return EFI_INVALID_PARAMETER;
651 }
652
653 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
654 List = HostBridgeInstance->Head.ForwardLink;
655
656 while (List != &HostBridgeInstance->Head) {
657 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
658 if (RootBridgeHandle == RootBridgeInstance->Handle) {
659 *Attributes = RootBridgeInstance->RootBridgeAttrib;
660 return EFI_SUCCESS;
661 }
662 List = List->ForwardLink;
663 }
664
665 //
666 // RootBridgeHandle is not an EFI_HANDLE
667 // that was returned on a previous call to GetNextRootBridge()
668 //
669 return EFI_INVALID_PARAMETER;
670 }
671
672 /**
673 Sets up the specified PCI root bridge for the bus enumeration process.
674
675 This member function sets up the root bridge for bus enumeration and returns the PCI bus range
676 over which the search should be performed in ACPI 2.0 resource descriptor format.
677
678 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
679 @param[in] RootBridgeHandle The PCI Root Bridge to be set up.
680 @param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.
681
682 @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
683 @retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
684 @retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
685
686 **/
687 EFI_STATUS
688 EFIAPI
689 StartBusEnumeration(
690 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
691 IN EFI_HANDLE RootBridgeHandle,
692 OUT VOID **Configuration
693 )
694 {
695 LIST_ENTRY *List;
696 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
697 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
698 VOID *Buffer;
699 UINT8 *Temp;
700 UINT64 BusStart;
701 UINT64 BusEnd;
702
703 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
704 List = HostBridgeInstance->Head.ForwardLink;
705
706 while (List != &HostBridgeInstance->Head) {
707 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
708 if (RootBridgeHandle == RootBridgeInstance->Handle) {
709 //
710 // Set up the Root Bridge for Bus Enumeration
711 //
712 BusStart = RootBridgeInstance->BusBase;
713 BusEnd = RootBridgeInstance->BusLimit;
714 //
715 // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
716 //
717
718 Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
719 if (Buffer == NULL) {
720 return EFI_OUT_OF_RESOURCES;
721 }
722
723 Temp = (UINT8 *)Buffer;
724
725 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
726 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
727 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
728 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
729 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
730 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
731 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
732 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
733 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
734 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
735
736 Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
737 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
738 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
739
740 *Configuration = Buffer;
741 return EFI_SUCCESS;
742 }
743 List = List->ForwardLink;
744 }
745
746 return EFI_INVALID_PARAMETER;
747 }
748
749 /**
750 Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
751
752 This member function programs the specified PCI root bridge to decode the bus range that is
753 specified by the input parameter Configuration.
754 The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
755
756 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
757 @param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
758 @param[in] Configuration The pointer to the PCI bus resource descriptor
759
760 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
761 @retval EFI_INVALID_PARAMETER Configuration is NULL.
762 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
763 @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.
764 @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than
765 bus descriptors.
766 @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.
767 @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.
768 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.
769 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
770 @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.
771
772 **/
773 EFI_STATUS
774 EFIAPI
775 SetBusNumbers(
776 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
777 IN EFI_HANDLE RootBridgeHandle,
778 IN VOID *Configuration
779 )
780 {
781 LIST_ENTRY *List;
782 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
783 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
784 UINT8 *Ptr;
785 UINTN BusStart;
786 UINTN BusEnd;
787 UINTN BusLen;
788
789 if (Configuration == NULL) {
790 return EFI_INVALID_PARAMETER;
791 }
792
793 Ptr = Configuration;
794
795 //
796 // Check the Configuration is valid
797 //
798 if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
799 return EFI_INVALID_PARAMETER;
800 }
801
802 if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
803 return EFI_INVALID_PARAMETER;
804 }
805
806 Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
807 if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
808 return EFI_INVALID_PARAMETER;
809 }
810
811 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
812 List = HostBridgeInstance->Head.ForwardLink;
813
814 Ptr = Configuration;
815
816 while (List != &HostBridgeInstance->Head) {
817 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
818 if (RootBridgeHandle == RootBridgeInstance->Handle) {
819 BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
820 BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
821 BusEnd = BusStart + BusLen - 1;
822
823 if (BusStart > BusEnd) {
824 return EFI_INVALID_PARAMETER;
825 }
826
827 if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
828 return EFI_INVALID_PARAMETER;
829 }
830
831 //
832 // Update the Bus Range
833 //
834 RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
835 RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
836 RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
837
838 //
839 // Program the Root Bridge Hardware
840 //
841
842 return EFI_SUCCESS;
843 }
844
845 List = List->ForwardLink;
846 }
847
848 return EFI_INVALID_PARAMETER;
849 }
850
851
852 /**
853 Submits the I/O and memory resource requirements for the specified PCI root bridge.
854
855 This function is used to submit all the I/O and memory resources that are required by the specified
856 PCI root bridge. The input parameter Configuration is used to specify the following:
857 - The various types of resources that are required
858 - The associated lengths in terms of ACPI 2.0 resource descriptor format
859
860 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
861 @param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.
862 @param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.
863
864 @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.
865 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
866 @retval EFI_INVALID_PARAMETER Configuration is NULL.
867 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
868 @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are
869 not supported by this PCI root bridge. This error will happen if the caller
870 did not combine resources according to Attributes that were returned by
871 GetAllocAttributes().
872 @retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
873 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.
874 @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.
875
876 **/
877 EFI_STATUS
878 EFIAPI
879 SubmitResources(
880 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
881 IN EFI_HANDLE RootBridgeHandle,
882 IN VOID *Configuration
883 )
884 {
885 LIST_ENTRY *List;
886 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
887 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
888 UINT8 *Temp;
889 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
890 UINT64 AddrLen;
891 UINT64 Alignment;
892
893 //
894 // Check the input parameter: Configuration
895 //
896 if (Configuration == NULL) {
897 return EFI_INVALID_PARAMETER;
898 }
899
900 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
901 List = HostBridgeInstance->Head.ForwardLink;
902
903 Temp = (UINT8 *)Configuration;
904 while ( *Temp == 0x8A) {
905 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
906 }
907 if (*Temp != 0x79) {
908 return EFI_INVALID_PARAMETER;
909 }
910
911 Temp = (UINT8 *)Configuration;
912 while (List != &HostBridgeInstance->Head) {
913 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
914 if (RootBridgeHandle == RootBridgeInstance->Handle) {
915 while ( *Temp == 0x8A) {
916 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
917
918 //
919 // Check Address Length
920 //
921 if (Ptr->AddrLen > 0xffffffff) {
922 return EFI_INVALID_PARAMETER;
923 }
924
925 //
926 // Check address range alignment
927 //
928 if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
929 return EFI_INVALID_PARAMETER;
930 }
931
932 switch (Ptr->ResType) {
933
934 case 0:
935
936 //
937 // Check invalid Address Sapce Granularity
938 //
939 if (Ptr->AddrSpaceGranularity != 32) {
940 return EFI_INVALID_PARAMETER;
941 }
942
943 //
944 // check the memory resource request is supported by PCI root bridge
945 //
946 if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
947 Ptr->SpecificFlag == 0x06) {
948 return EFI_INVALID_PARAMETER;
949 }
950
951 AddrLen = Ptr->AddrLen;
952 Alignment = Ptr->AddrRangeMax;
953 if (Ptr->AddrSpaceGranularity == 32) {
954 if (Ptr->SpecificFlag == 0x06) {
955 //
956 // Apply from GCD
957 //
958 RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
959 } else {
960 RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
961 RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
962 RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
963 HostBridgeInstance->ResourceSubmited = TRUE;
964 }
965 }
966
967 if (Ptr->AddrSpaceGranularity == 64) {
968 if (Ptr->SpecificFlag == 0x06) {
969 RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
970 } else {
971 RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
972 }
973 }
974 break;
975
976 case 1:
977 AddrLen = (UINTN) Ptr->AddrLen;
978 Alignment = (UINTN) Ptr->AddrRangeMax;
979 RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
980 RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
981 RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
982 HostBridgeInstance->ResourceSubmited = TRUE;
983 break;
984
985 default:
986 break;
987 };
988
989 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
990 }
991
992 return EFI_SUCCESS;
993 }
994
995 List = List->ForwardLink;
996 }
997
998 return EFI_INVALID_PARAMETER;
999 }
1000
1001 /**
1002 Returns the proposed resource settings for the specified PCI root bridge.
1003
1004 This member function returns the proposed resource settings for the specified PCI root bridge. The
1005 proposed resource settings are prepared when NotifyPhase() is called with a Phase of
1006 EfiPciHostBridgeAllocateResources. The output parameter Configuration
1007 specifies the following:
1008 - The various types of resources, excluding bus resources, that are allocated
1009 - The associated lengths in terms of ACPI 2.0 resource descriptor format
1010
1011 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1012 @param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
1013 @param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.
1014
1015 @retval EFI_SUCCESS The requested parameters were returned.
1016 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1017 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
1018 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
1019
1020 **/
1021 EFI_STATUS
1022 EFIAPI
1023 GetProposedResources(
1024 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1025 IN EFI_HANDLE RootBridgeHandle,
1026 OUT VOID **Configuration
1027 )
1028 {
1029 LIST_ENTRY *List;
1030 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1031 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1032 UINTN Index;
1033 UINTN Number;
1034 VOID *Buffer;
1035 UINT8 *Temp;
1036 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
1037 UINT64 ResStatus;
1038
1039 Buffer = NULL;
1040 Number = 0;
1041 //
1042 // Get the Host Bridge Instance from the resource allocation protocol
1043 //
1044 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1045 List = HostBridgeInstance->Head.ForwardLink;
1046
1047 //
1048 // Enumerate the root bridges in this host bridge
1049 //
1050 while (List != &HostBridgeInstance->Head) {
1051 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1052 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1053 for (Index = 0; Index < TypeBus; Index ++) {
1054 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1055 Number ++;
1056 }
1057 }
1058
1059 if (Number == 0) {
1060 return EFI_INVALID_PARAMETER;
1061 }
1062
1063 Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
1064 if (Buffer == NULL) {
1065 return EFI_OUT_OF_RESOURCES;
1066 }
1067
1068 Temp = Buffer;
1069 for (Index = 0; Index < TypeBus; Index ++) {
1070 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1071 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
1072 ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
1073
1074 switch (Index) {
1075
1076 case TypeIo:
1077 //
1078 // Io
1079 //
1080 Ptr->Desc = 0x8A;
1081 Ptr->Len = 0x2B;
1082 Ptr->ResType = 1;
1083 Ptr->GenFlag = 0;
1084 Ptr->SpecificFlag = 0;
1085 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1086 Ptr->AddrRangeMax = 0;
1087 Ptr->AddrTranslationOffset = \
1088 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1089 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1090 break;
1091
1092 case TypeMem32:
1093 //
1094 // Memory 32
1095 //
1096 Ptr->Desc = 0x8A;
1097 Ptr->Len = 0x2B;
1098 Ptr->ResType = 0;
1099 Ptr->GenFlag = 0;
1100 Ptr->SpecificFlag = 0;
1101 Ptr->AddrSpaceGranularity = 32;
1102 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1103 Ptr->AddrRangeMax = 0;
1104 Ptr->AddrTranslationOffset = \
1105 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1106 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1107 break;
1108
1109 case TypePMem32:
1110 //
1111 // Prefetch memory 32
1112 //
1113 Ptr->Desc = 0x8A;
1114 Ptr->Len = 0x2B;
1115 Ptr->ResType = 0;
1116 Ptr->GenFlag = 0;
1117 Ptr->SpecificFlag = 6;
1118 Ptr->AddrSpaceGranularity = 32;
1119 Ptr->AddrRangeMin = 0;
1120 Ptr->AddrRangeMax = 0;
1121 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1122 Ptr->AddrLen = 0;
1123 break;
1124
1125 case TypeMem64:
1126 //
1127 // Memory 64
1128 //
1129 Ptr->Desc = 0x8A;
1130 Ptr->Len = 0x2B;
1131 Ptr->ResType = 0;
1132 Ptr->GenFlag = 0;
1133 Ptr->SpecificFlag = 0;
1134 Ptr->AddrSpaceGranularity = 64;
1135 Ptr->AddrRangeMin = 0;
1136 Ptr->AddrRangeMax = 0;
1137 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1138 Ptr->AddrLen = 0;
1139 break;
1140
1141 case TypePMem64:
1142 //
1143 // Prefetch memory 64
1144 //
1145 Ptr->Desc = 0x8A;
1146 Ptr->Len = 0x2B;
1147 Ptr->ResType = 0;
1148 Ptr->GenFlag = 0;
1149 Ptr->SpecificFlag = 6;
1150 Ptr->AddrSpaceGranularity = 64;
1151 Ptr->AddrRangeMin = 0;
1152 Ptr->AddrRangeMax = 0;
1153 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1154 Ptr->AddrLen = 0;
1155 break;
1156 };
1157
1158 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
1159 }
1160 }
1161
1162 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
1163 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
1164
1165 *Configuration = Buffer;
1166
1167 return EFI_SUCCESS;
1168 }
1169
1170 List = List->ForwardLink;
1171 }
1172
1173 return EFI_INVALID_PARAMETER;
1174 }
1175
1176 /**
1177 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1178 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1179 PCI controllers before enumeration.
1180
1181 This function is called during the PCI enumeration process. No specific action is expected from this
1182 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1183 enumeration.
1184
1185 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1186 @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in
1187 InstallProtocolInterface() in the UEFI 2.0 Specification.
1188 @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the
1189 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
1190 configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
1191 the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
1192 @param Phase The phase of the PCI device enumeration.
1193
1194 @retval EFI_SUCCESS The requested parameters were returned.
1195 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1196 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1197 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1198 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1199 not enumerate this device, including its child devices if it is a PCI-to-PCI
1200 bridge.
1201
1202 **/
1203 EFI_STATUS
1204 EFIAPI
1205 PreprocessController (
1206 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1207 IN EFI_HANDLE RootBridgeHandle,
1208 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
1209 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1210 )
1211 {
1212 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1213 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1214 LIST_ENTRY *List;
1215
1216 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1217 List = HostBridgeInstance->Head.ForwardLink;
1218
1219 //
1220 // Enumerate the root bridges in this host bridge
1221 //
1222 while (List != &HostBridgeInstance->Head) {
1223 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1224 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1225 break;
1226 }
1227 List = List->ForwardLink;
1228 }
1229 if (List == &HostBridgeInstance->Head) {
1230 return EFI_INVALID_PARAMETER;
1231 }
1232
1233 if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
1234 return EFI_INVALID_PARAMETER;
1235 }
1236
1237 return EFI_SUCCESS;
1238 }
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