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1 /** @file
2 Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation
3
4 Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
5 This program and the accompanying materials are
6 licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include "PciHostBridge.h"
16
17 //
18 // Hard code: Root Bridge Number within the host bridge
19 // Root Bridge's attribute
20 // Root Bridge's device path
21 // Root Bridge's resource aperture
22 //
23 UINTN RootBridgeNumber[1] = { 1 };
24
25 UINT64 RootBridgeAttribute[1][1] = { { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM } };
26
27 EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {
28 {
29 {
30 {
31 {
32 ACPI_DEVICE_PATH,
33 ACPI_DP,
34 {
35 (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),
36 (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)
37 }
38 },
39 EISA_PNP_ID(0x0A03),
40 0
41 },
42
43 {
44 END_DEVICE_PATH_TYPE,
45 END_ENTIRE_DEVICE_PATH_SUBTYPE,
46 {
47 END_DEVICE_PATH_LENGTH,
48 0
49 }
50 }
51 }
52 }
53 };
54
55 STATIC PCI_ROOT_BRIDGE_RESOURCE_APERTURE mResAperture[1][1];
56
57 EFI_HANDLE mDriverImageHandle;
58
59 PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {
60 PCI_HOST_BRIDGE_SIGNATURE, // Signature
61 NULL, // HostBridgeHandle
62 0, // RootBridgeNumber
63 {NULL, NULL}, // Head
64 FALSE, // ResourceSubiteed
65 TRUE, // CanRestarted
66 {
67 NotifyPhase,
68 GetNextRootBridge,
69 GetAttributes,
70 StartBusEnumeration,
71 SetBusNumbers,
72 SubmitResources,
73 GetProposedResources,
74 PreprocessController
75 }
76 };
77
78 //
79 // Implementation
80 //
81
82 /**
83 Entry point of this driver
84
85 @param ImageHandle Handle of driver image
86 @param SystemTable Point to EFI_SYSTEM_TABLE
87
88 @retval EFI_OUT_OF_RESOURCES Can not allocate memory resource
89 @retval EFI_DEVICE_ERROR Can not install the protocol instance
90 @retval EFI_SUCCESS Success to initialize the Pci host bridge.
91 **/
92 EFI_STATUS
93 EFIAPI
94 InitializePciHostBridge (
95 IN EFI_HANDLE ImageHandle,
96 IN EFI_SYSTEM_TABLE *SystemTable
97 )
98 {
99 EFI_STATUS Status;
100 UINTN Loop1;
101 UINTN Loop2;
102 PCI_HOST_BRIDGE_INSTANCE *HostBridge;
103 PCI_ROOT_BRIDGE_INSTANCE *PrivateData;
104
105 mDriverImageHandle = ImageHandle;
106
107 mResAperture[0][0].BusBase = PcdGet32 (PcdPciBusMin);
108 mResAperture[0][0].BusLimit = PcdGet32 (PcdPciBusMax);
109
110 mResAperture[0][0].MemBase = PcdGet32 (PcdPciMmio32Base);
111 mResAperture[0][0].MemLimit = (UINT64)PcdGet32 (PcdPciMmio32Base) +
112 PcdGet32 (PcdPciMmio32Size) - 1;
113
114 mResAperture[0][0].IoBase = PcdGet64 (PcdPciIoBase);
115 mResAperture[0][0].IoLimit = PcdGet64 (PcdPciIoBase) +
116 PcdGet64 (PcdPciIoSize) - 1;
117 mResAperture[0][0].IoTranslation = PcdGet64 (PcdPciIoTranslation);
118
119 //
120 // Create Host Bridge Device Handle
121 //
122 for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {
123 HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);
124 if (HostBridge == NULL) {
125 return EFI_OUT_OF_RESOURCES;
126 }
127
128 HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];
129 InitializeListHead (&HostBridge->Head);
130
131 Status = gBS->InstallMultipleProtocolInterfaces (
132 &HostBridge->HostBridgeHandle,
133 &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,
134 NULL
135 );
136 if (EFI_ERROR (Status)) {
137 FreePool (HostBridge);
138 return EFI_DEVICE_ERROR;
139 }
140
141 //
142 // Create Root Bridge Device Handle in this Host Bridge
143 //
144
145 for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {
146 PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));
147 if (PrivateData == NULL) {
148 return EFI_OUT_OF_RESOURCES;
149 }
150
151 PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;
152 PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];
153
154 RootBridgeConstructor (
155 &PrivateData->Io,
156 HostBridge->HostBridgeHandle,
157 RootBridgeAttribute[Loop1][Loop2],
158 &mResAperture[Loop1][Loop2]
159 );
160
161 Status = gBS->InstallMultipleProtocolInterfaces(
162 &PrivateData->Handle,
163 &gEfiDevicePathProtocolGuid, PrivateData->DevicePath,
164 &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,
165 NULL
166 );
167 if (EFI_ERROR (Status)) {
168 FreePool(PrivateData);
169 return EFI_DEVICE_ERROR;
170 }
171
172 InsertTailList (&HostBridge->Head, &PrivateData->Link);
173 }
174 }
175
176 return EFI_SUCCESS;
177 }
178
179
180 /**
181 These are the notifications from the PCI bus driver that it is about to enter a certain
182 phase of the PCI enumeration process.
183
184 This member function can be used to notify the host bridge driver to perform specific actions,
185 including any chipset-specific initialization, so that the chipset is ready to enter the next phase.
186 Eight notification points are defined at this time. See belows:
187 EfiPciHostBridgeBeginEnumeration Resets the host bridge PCI apertures and internal data
188 structures. The PCI enumerator should issue this notification
189 before starting a fresh enumeration process. Enumeration cannot
190 be restarted after sending any other notification such as
191 EfiPciHostBridgeBeginBusAllocation.
192 EfiPciHostBridgeBeginBusAllocation The bus allocation phase is about to begin. No specific action is
193 required here. This notification can be used to perform any
194 chipset-specific programming.
195 EfiPciHostBridgeEndBusAllocation The bus allocation and bus programming phase is complete. No
196 specific action is required here. This notification can be used to
197 perform any chipset-specific programming.
198 EfiPciHostBridgeBeginResourceAllocation
199 The resource allocation phase is about to begin. No specific
200 action is required here. This notification can be used to perform
201 any chipset-specific programming.
202 EfiPciHostBridgeAllocateResources Allocates resources per previously submitted requests for all the PCI
203 root bridges. These resource settings are returned on the next call to
204 GetProposedResources(). Before calling NotifyPhase() with a Phase of
205 EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible
206 for gathering I/O and memory requests for
207 all the PCI root bridges and submitting these requests using
208 SubmitResources(). This function pads the resource amount
209 to suit the root bridge hardware, takes care of dependencies between
210 the PCI root bridges, and calls the Global Coherency Domain (GCD)
211 with the allocation request. In the case of padding, the allocated range
212 could be bigger than what was requested.
213 EfiPciHostBridgeSetResources Programs the host bridge hardware to decode previously allocated
214 resources (proposed resources) for all the PCI root bridges. After the
215 hardware is programmed, reassigning resources will not be supported.
216 The bus settings are not affected.
217 EfiPciHostBridgeFreeResources Deallocates resources that were previously allocated for all the PCI
218 root bridges and resets the I/O and memory apertures to their initial
219 state. The bus settings are not affected. If the request to allocate
220 resources fails, the PCI enumerator can use this notification to
221 deallocate previous resources, adjust the requests, and retry
222 allocation.
223 EfiPciHostBridgeEndResourceAllocation The resource allocation phase is completed. No specific action is
224 required here. This notification can be used to perform any chipsetspecific
225 programming.
226
227 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
228 @param[in] Phase The phase during enumeration
229
230 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error
231 is valid for a Phase of EfiPciHostBridgeAllocateResources if
232 SubmitResources() has not been called for one or more
233 PCI root bridges before this call
234 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid
235 for a Phase of EfiPciHostBridgeSetResources.
236 @retval EFI_INVALID_PARAMETER Invalid phase parameter
237 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
238 This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the
239 previously submitted resource requests cannot be fulfilled or
240 were only partially fulfilled.
241 @retval EFI_SUCCESS The notification was accepted without any errors.
242
243 **/
244 EFI_STATUS
245 EFIAPI
246 NotifyPhase(
247 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
248 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase
249 )
250 {
251 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
252 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
253 PCI_RESOURCE_TYPE Index;
254 LIST_ENTRY *List;
255 EFI_PHYSICAL_ADDRESS BaseAddress;
256 UINT64 AddrLen;
257 UINTN BitsOfAlignment;
258 EFI_STATUS Status;
259 EFI_STATUS ReturnStatus;
260
261 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
262
263 switch (Phase) {
264
265 case EfiPciHostBridgeBeginEnumeration:
266 if (HostBridgeInstance->CanRestarted) {
267 //
268 // Reset the Each Root Bridge
269 //
270 List = HostBridgeInstance->Head.ForwardLink;
271
272 while (List != &HostBridgeInstance->Head) {
273 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
274 for (Index = TypeIo; Index < TypeMax; Index++) {
275 RootBridgeInstance->ResAllocNode[Index].Type = Index;
276 RootBridgeInstance->ResAllocNode[Index].Base = 0;
277 RootBridgeInstance->ResAllocNode[Index].Length = 0;
278 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
279 }
280
281 List = List->ForwardLink;
282 }
283
284 HostBridgeInstance->ResourceSubmited = FALSE;
285 HostBridgeInstance->CanRestarted = TRUE;
286 } else {
287 //
288 // Can not restart
289 //
290 return EFI_NOT_READY;
291 }
292 break;
293
294 case EfiPciHostBridgeEndEnumeration:
295 break;
296
297 case EfiPciHostBridgeBeginBusAllocation:
298 //
299 // No specific action is required here, can perform any chipset specific programing
300 //
301 HostBridgeInstance->CanRestarted = FALSE;
302 break;
303
304 case EfiPciHostBridgeEndBusAllocation:
305 //
306 // No specific action is required here, can perform any chipset specific programing
307 //
308 //HostBridgeInstance->CanRestarted = FALSE;
309 break;
310
311 case EfiPciHostBridgeBeginResourceAllocation:
312 //
313 // No specific action is required here, can perform any chipset specific programing
314 //
315 //HostBridgeInstance->CanRestarted = FALSE;
316 break;
317
318 case EfiPciHostBridgeAllocateResources:
319 ReturnStatus = EFI_SUCCESS;
320 if (HostBridgeInstance->ResourceSubmited) {
321 //
322 // Take care of the resource dependencies between the root bridges
323 //
324 List = HostBridgeInstance->Head.ForwardLink;
325
326 while (List != &HostBridgeInstance->Head) {
327 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
328 for (Index = TypeIo; Index < TypeBus; Index++) {
329 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
330
331 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
332
333 //
334 // Get the number of '1' in Alignment.
335 //
336 BitsOfAlignment = (UINTN) (HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1);
337
338 switch (Index) {
339
340 case TypeIo:
341 //
342 // It is impossible for this chipset to align 0xFFFF for IO16
343 // So clear it
344 //
345 if (BitsOfAlignment >= 16) {
346 BitsOfAlignment = 0;
347 }
348
349 Status = gDS->AllocateIoSpace (
350 EfiGcdAllocateAnySearchBottomUp,
351 EfiGcdIoTypeIo,
352 BitsOfAlignment,
353 AddrLen,
354 &BaseAddress,
355 mDriverImageHandle,
356 NULL
357 );
358
359 if (!EFI_ERROR (Status)) {
360 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
361 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
362 } else {
363 ReturnStatus = Status;
364 if (Status != EFI_OUT_OF_RESOURCES) {
365 RootBridgeInstance->ResAllocNode[Index].Length = 0;
366 }
367 }
368
369 break;
370
371
372 case TypeMem32:
373 //
374 // It is impossible for this chipset to align 0xFFFFFFFF for Mem32
375 // So clear it
376 //
377
378 if (BitsOfAlignment >= 32) {
379 BitsOfAlignment = 0;
380 }
381
382 Status = gDS->AllocateMemorySpace (
383 EfiGcdAllocateAnySearchBottomUp,
384 EfiGcdMemoryTypeMemoryMappedIo,
385 BitsOfAlignment,
386 AddrLen,
387 &BaseAddress,
388 mDriverImageHandle,
389 NULL
390 );
391
392 if (!EFI_ERROR (Status)) {
393 // We were able to allocate the PCI memory
394 RootBridgeInstance->ResAllocNode[Index].Base = (UINTN)BaseAddress;
395 RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;
396
397 } else {
398 // Not able to allocate enough PCI memory
399 ReturnStatus = Status;
400
401 if (Status != EFI_OUT_OF_RESOURCES) {
402 RootBridgeInstance->ResAllocNode[Index].Length = 0;
403 }
404 ASSERT (FALSE);
405 }
406 break;
407
408 case TypePMem32:
409 case TypeMem64:
410 case TypePMem64:
411 ReturnStatus = EFI_ABORTED;
412 break;
413 default:
414 ASSERT (FALSE);
415 break;
416 }; //end switch
417 }
418 }
419
420 List = List->ForwardLink;
421 }
422
423 return ReturnStatus;
424
425 } else {
426 return EFI_NOT_READY;
427 }
428 break;
429
430 case EfiPciHostBridgeSetResources:
431 break;
432
433 case EfiPciHostBridgeFreeResources:
434 ReturnStatus = EFI_SUCCESS;
435 List = HostBridgeInstance->Head.ForwardLink;
436 while (List != &HostBridgeInstance->Head) {
437 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
438 for (Index = TypeIo; Index < TypeBus; Index++) {
439 if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {
440 AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
441 BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;
442 switch (Index) {
443
444 case TypeIo:
445 Status = gDS->FreeIoSpace (BaseAddress, AddrLen);
446 if (EFI_ERROR (Status)) {
447 ReturnStatus = Status;
448 }
449 break;
450
451 case TypeMem32:
452 Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);
453 if (EFI_ERROR (Status)) {
454 ReturnStatus = Status;
455 }
456 break;
457
458 case TypePMem32:
459 break;
460
461 case TypeMem64:
462 break;
463
464 case TypePMem64:
465 break;
466
467 default:
468 ASSERT (FALSE);
469 break;
470
471 }; //end switch
472 RootBridgeInstance->ResAllocNode[Index].Type = Index;
473 RootBridgeInstance->ResAllocNode[Index].Base = 0;
474 RootBridgeInstance->ResAllocNode[Index].Length = 0;
475 RootBridgeInstance->ResAllocNode[Index].Status = ResNone;
476 }
477 }
478
479 List = List->ForwardLink;
480 }
481
482 HostBridgeInstance->ResourceSubmited = FALSE;
483 HostBridgeInstance->CanRestarted = TRUE;
484 return ReturnStatus;
485
486 case EfiPciHostBridgeEndResourceAllocation:
487 HostBridgeInstance->CanRestarted = FALSE;
488 break;
489
490 default:
491 return EFI_INVALID_PARAMETER;
492 }
493
494 return EFI_SUCCESS;
495 }
496
497 /**
498 Return the device handle of the next PCI root bridge that is associated with this Host Bridge.
499
500 This function is called multiple times to retrieve the device handles of all the PCI root bridges that
501 are associated with this PCI host bridge. Each PCI host bridge is associated with one or more PCI
502 root bridges. On each call, the handle that was returned by the previous call is passed into the
503 interface, and on output the interface returns the device handle of the next PCI root bridge. The
504 caller can use the handle to obtain the instance of the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL
505 for that root bridge. When there are no more PCI root bridges to report, the interface returns
506 EFI_NOT_FOUND. A PCI enumerator must enumerate the PCI root bridges in the order that they
507 are returned by this function.
508 For D945 implementation, there is only one root bridge in PCI host bridge.
509
510 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
511 @param[in, out] RootBridgeHandle Returns the device handle of the next PCI root bridge.
512
513 @retval EFI_SUCCESS If parameter RootBridgeHandle = NULL, then return the first Rootbridge handle of the
514 specific Host bridge and return EFI_SUCCESS.
515 @retval EFI_NOT_FOUND Can not find the any more root bridge in specific host bridge.
516 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was
517 returned on a previous call to GetNextRootBridge().
518 **/
519 EFI_STATUS
520 EFIAPI
521 GetNextRootBridge(
522 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
523 IN OUT EFI_HANDLE *RootBridgeHandle
524 )
525 {
526 BOOLEAN NoRootBridge;
527 LIST_ENTRY *List;
528 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
529 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
530
531 NoRootBridge = TRUE;
532 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
533 List = HostBridgeInstance->Head.ForwardLink;
534
535
536 while (List != &HostBridgeInstance->Head) {
537 NoRootBridge = FALSE;
538 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
539 if (*RootBridgeHandle == NULL) {
540 //
541 // Return the first Root Bridge Handle of the Host Bridge
542 //
543 *RootBridgeHandle = RootBridgeInstance->Handle;
544 return EFI_SUCCESS;
545 } else {
546 if (*RootBridgeHandle == RootBridgeInstance->Handle) {
547 //
548 // Get next if have
549 //
550 List = List->ForwardLink;
551 if (List!=&HostBridgeInstance->Head) {
552 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
553 *RootBridgeHandle = RootBridgeInstance->Handle;
554 return EFI_SUCCESS;
555 } else {
556 return EFI_NOT_FOUND;
557 }
558 }
559 }
560
561 List = List->ForwardLink;
562 } //end while
563
564 if (NoRootBridge) {
565 return EFI_NOT_FOUND;
566 } else {
567 return EFI_INVALID_PARAMETER;
568 }
569 }
570
571 /**
572 Returns the allocation attributes of a PCI root bridge.
573
574 The function returns the allocation attributes of a specific PCI root bridge. The attributes can vary
575 from one PCI root bridge to another. These attributes are different from the decode-related
576 attributes that are returned by the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.GetAttributes() member function. The
577 RootBridgeHandle parameter is used to specify the instance of the PCI root bridge. The device
578 handles of all the root bridges that are associated with this host bridge must be obtained by calling
579 GetNextRootBridge(). The attributes are static in the sense that they do not change during or
580 after the enumeration process. The hardware may provide mechanisms to change the attributes on
581 the fly, but such changes must be completed before EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is
582 installed. The permitted values of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES are defined in
583 "Related Definitions" below. The caller uses these attributes to combine multiple resource requests.
584 For example, if the flag EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM is set, the PCI bus enumerator needs to
585 include requests for the prefetchable memory in the nonprefetchable memory pool and not request any
586 prefetchable memory.
587 Attribute Description
588 ------------------------------------ ----------------------------------------------------------------------
589 EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM If this bit is set, then the PCI root bridge does not support separate
590 windows for nonprefetchable and prefetchable memory. A PCI bus
591 driver needs to include requests for prefetchable memory in the
592 nonprefetchable memory pool.
593
594 EFI_PCI_HOST_BRIDGE_MEM64_DECODE If this bit is set, then the PCI root bridge supports 64-bit memory
595 windows. If this bit is not set, the PCI bus driver needs to include
596 requests for a 64-bit memory address in the corresponding 32-bit
597 memory pool.
598
599 @param[in] This The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL
600 @param[in] RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested. Type
601 EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
602 @param[out] Attributes The pointer to attribte of root bridge, it is output parameter
603
604 @retval EFI_INVALID_PARAMETER Attribute pointer is NULL
605 @retval EFI_INVALID_PARAMETER RootBridgehandle is invalid.
606 @retval EFI_SUCCESS Success to get attribute of interested root bridge.
607
608 **/
609 EFI_STATUS
610 EFIAPI
611 GetAttributes(
612 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
613 IN EFI_HANDLE RootBridgeHandle,
614 OUT UINT64 *Attributes
615 )
616 {
617 LIST_ENTRY *List;
618 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
619 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
620
621 if (Attributes == NULL) {
622 return EFI_INVALID_PARAMETER;
623 }
624
625 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
626 List = HostBridgeInstance->Head.ForwardLink;
627
628 while (List != &HostBridgeInstance->Head) {
629 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
630 if (RootBridgeHandle == RootBridgeInstance->Handle) {
631 *Attributes = RootBridgeInstance->RootBridgeAttrib;
632 return EFI_SUCCESS;
633 }
634 List = List->ForwardLink;
635 }
636
637 //
638 // RootBridgeHandle is not an EFI_HANDLE
639 // that was returned on a previous call to GetNextRootBridge()
640 //
641 return EFI_INVALID_PARAMETER;
642 }
643
644 /**
645 Sets up the specified PCI root bridge for the bus enumeration process.
646
647 This member function sets up the root bridge for bus enumeration and returns the PCI bus range
648 over which the search should be performed in ACPI 2.0 resource descriptor format.
649
650 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance.
651 @param[in] RootBridgeHandle The PCI Root Bridge to be set up.
652 @param[out] Configuration Pointer to the pointer to the PCI bus resource descriptor.
653
654 @retval EFI_INVALID_PARAMETER Invalid Root bridge's handle
655 @retval EFI_OUT_OF_RESOURCES Fail to allocate ACPI resource descriptor tag.
656 @retval EFI_SUCCESS Sucess to allocate ACPI resource descriptor.
657
658 **/
659 EFI_STATUS
660 EFIAPI
661 StartBusEnumeration(
662 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
663 IN EFI_HANDLE RootBridgeHandle,
664 OUT VOID **Configuration
665 )
666 {
667 LIST_ENTRY *List;
668 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
669 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
670 VOID *Buffer;
671 UINT8 *Temp;
672 UINT64 BusStart;
673 UINT64 BusEnd;
674
675 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
676 List = HostBridgeInstance->Head.ForwardLink;
677
678 while (List != &HostBridgeInstance->Head) {
679 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
680 if (RootBridgeHandle == RootBridgeInstance->Handle) {
681 //
682 // Set up the Root Bridge for Bus Enumeration
683 //
684 BusStart = RootBridgeInstance->BusBase;
685 BusEnd = RootBridgeInstance->BusLimit;
686 //
687 // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR
688 //
689
690 Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
691 if (Buffer == NULL) {
692 return EFI_OUT_OF_RESOURCES;
693 }
694
695 Temp = (UINT8 *)Buffer;
696
697 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;
698 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len = 0x2B;
699 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;
700 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0;
701 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;
702 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;
703 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;
704 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;
705 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;
706 ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;
707
708 Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
709 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
710 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
711
712 *Configuration = Buffer;
713 return EFI_SUCCESS;
714 }
715 List = List->ForwardLink;
716 }
717
718 return EFI_INVALID_PARAMETER;
719 }
720
721 /**
722 Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.
723
724 This member function programs the specified PCI root bridge to decode the bus range that is
725 specified by the input parameter Configuration.
726 The bus range information is specified in terms of the ACPI 2.0 resource descriptor format.
727
728 @param[in] This The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance
729 @param[in] RootBridgeHandle The PCI Root Bridge whose bus range is to be programmed
730 @param[in] Configuration The pointer to the PCI bus resource descriptor
731
732 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
733 @retval EFI_INVALID_PARAMETER Configuration is NULL.
734 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
735 @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource descriptor.
736 @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI 2.0 resource descriptors other than
737 bus descriptors.
738 @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource descriptors.
739 @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.
740 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.
741 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
742 @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.
743
744 **/
745 EFI_STATUS
746 EFIAPI
747 SetBusNumbers(
748 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
749 IN EFI_HANDLE RootBridgeHandle,
750 IN VOID *Configuration
751 )
752 {
753 LIST_ENTRY *List;
754 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
755 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
756 UINT8 *Ptr;
757 UINTN BusStart;
758 UINTN BusEnd;
759 UINTN BusLen;
760
761 if (Configuration == NULL) {
762 return EFI_INVALID_PARAMETER;
763 }
764
765 Ptr = Configuration;
766
767 //
768 // Check the Configuration is valid
769 //
770 if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {
771 return EFI_INVALID_PARAMETER;
772 }
773
774 if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {
775 return EFI_INVALID_PARAMETER;
776 }
777
778 Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
779 if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {
780 return EFI_INVALID_PARAMETER;
781 }
782
783 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
784 List = HostBridgeInstance->Head.ForwardLink;
785
786 Ptr = Configuration;
787
788 while (List != &HostBridgeInstance->Head) {
789 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
790 if (RootBridgeHandle == RootBridgeInstance->Handle) {
791 BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;
792 BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;
793 BusEnd = BusStart + BusLen - 1;
794
795 if (BusStart > BusEnd) {
796 return EFI_INVALID_PARAMETER;
797 }
798
799 if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {
800 return EFI_INVALID_PARAMETER;
801 }
802
803 //
804 // Update the Bus Range
805 //
806 RootBridgeInstance->ResAllocNode[TypeBus].Base = BusStart;
807 RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;
808 RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;
809
810 //
811 // Program the Root Bridge Hardware
812 //
813
814 return EFI_SUCCESS;
815 }
816
817 List = List->ForwardLink;
818 }
819
820 return EFI_INVALID_PARAMETER;
821 }
822
823
824 /**
825 Submits the I/O and memory resource requirements for the specified PCI root bridge.
826
827 This function is used to submit all the I/O and memory resources that are required by the specified
828 PCI root bridge. The input parameter Configuration is used to specify the following:
829 - The various types of resources that are required
830 - The associated lengths in terms of ACPI 2.0 resource descriptor format
831
832 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
833 @param[in] RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being submitted.
834 @param[in] Configuration The pointer to the PCI I/O and PCI memory resource descriptor.
835
836 @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were accepted.
837 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
838 @retval EFI_INVALID_PARAMETER Configuration is NULL.
839 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI 2.0 resource descriptor.
840 @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource types that are
841 not supported by this PCI root bridge. This error will happen if the caller
842 did not combine resources according to Attributes that were returned by
843 GetAllocAttributes().
844 @retval EFI_INVALID_PARAMETER Address Range Maximum" is invalid.
845 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.
846 @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.
847
848 **/
849 EFI_STATUS
850 EFIAPI
851 SubmitResources(
852 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
853 IN EFI_HANDLE RootBridgeHandle,
854 IN VOID *Configuration
855 )
856 {
857 LIST_ENTRY *List;
858 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
859 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
860 UINT8 *Temp;
861 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
862 UINT64 AddrLen;
863 UINT64 Alignment;
864
865 //
866 // Check the input parameter: Configuration
867 //
868 if (Configuration == NULL) {
869 return EFI_INVALID_PARAMETER;
870 }
871
872 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
873 List = HostBridgeInstance->Head.ForwardLink;
874
875 Temp = (UINT8 *)Configuration;
876 while ( *Temp == 0x8A) {
877 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
878 }
879 if (*Temp != 0x79) {
880 return EFI_INVALID_PARAMETER;
881 }
882
883 Temp = (UINT8 *)Configuration;
884 while (List != &HostBridgeInstance->Head) {
885 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
886 if (RootBridgeHandle == RootBridgeInstance->Handle) {
887 while ( *Temp == 0x8A) {
888 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
889
890 //
891 // Check Address Length
892 //
893 if (Ptr->AddrLen > 0xffffffff) {
894 return EFI_INVALID_PARAMETER;
895 }
896
897 //
898 // Check address range alignment
899 //
900 if (Ptr->AddrRangeMax >= 0xffffffff || Ptr->AddrRangeMax != (GetPowerOfTwo64 (Ptr->AddrRangeMax + 1) - 1)) {
901 return EFI_INVALID_PARAMETER;
902 }
903
904 switch (Ptr->ResType) {
905
906 case 0:
907
908 //
909 // Check invalid Address Sapce Granularity
910 //
911 if (Ptr->AddrSpaceGranularity != 32) {
912 return EFI_INVALID_PARAMETER;
913 }
914
915 //
916 // check the memory resource request is supported by PCI root bridge
917 //
918 if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&
919 Ptr->SpecificFlag == 0x06) {
920 return EFI_INVALID_PARAMETER;
921 }
922
923 AddrLen = Ptr->AddrLen;
924 Alignment = Ptr->AddrRangeMax;
925 if (Ptr->AddrSpaceGranularity == 32) {
926 if (Ptr->SpecificFlag == 0x06) {
927 //
928 // Apply from GCD
929 //
930 RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;
931 } else {
932 RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;
933 RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;
934 RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested;
935 HostBridgeInstance->ResourceSubmited = TRUE;
936 }
937 }
938
939 if (Ptr->AddrSpaceGranularity == 64) {
940 if (Ptr->SpecificFlag == 0x06) {
941 RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;
942 } else {
943 RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;
944 }
945 }
946 break;
947
948 case 1:
949 AddrLen = (UINTN) Ptr->AddrLen;
950 Alignment = (UINTN) Ptr->AddrRangeMax;
951 RootBridgeInstance->ResAllocNode[TypeIo].Length = AddrLen;
952 RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;
953 RootBridgeInstance->ResAllocNode[TypeIo].Status = ResRequested;
954 HostBridgeInstance->ResourceSubmited = TRUE;
955 break;
956
957 default:
958 break;
959 };
960
961 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;
962 }
963
964 return EFI_SUCCESS;
965 }
966
967 List = List->ForwardLink;
968 }
969
970 return EFI_INVALID_PARAMETER;
971 }
972
973 /**
974 Returns the proposed resource settings for the specified PCI root bridge.
975
976 This member function returns the proposed resource settings for the specified PCI root bridge. The
977 proposed resource settings are prepared when NotifyPhase() is called with a Phase of
978 EfiPciHostBridgeAllocateResources. The output parameter Configuration
979 specifies the following:
980 - The various types of resources, excluding bus resources, that are allocated
981 - The associated lengths in terms of ACPI 2.0 resource descriptor format
982
983 @param[in] This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
984 @param[in] RootBridgeHandle The PCI root bridge handle. Type EFI_HANDLE is defined in InstallProtocolInterface() in the UEFI 2.0 Specification.
985 @param[out] Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.
986
987 @retval EFI_SUCCESS The requested parameters were returned.
988 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
989 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.
990 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.
991
992 **/
993 EFI_STATUS
994 EFIAPI
995 GetProposedResources(
996 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
997 IN EFI_HANDLE RootBridgeHandle,
998 OUT VOID **Configuration
999 )
1000 {
1001 LIST_ENTRY *List;
1002 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1003 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1004 UINTN Index;
1005 UINTN Number;
1006 VOID *Buffer;
1007 UINT8 *Temp;
1008 EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Ptr;
1009 UINT64 ResStatus;
1010
1011 Buffer = NULL;
1012 Number = 0;
1013 //
1014 // Get the Host Bridge Instance from the resource allocation protocol
1015 //
1016 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1017 List = HostBridgeInstance->Head.ForwardLink;
1018
1019 //
1020 // Enumerate the root bridges in this host bridge
1021 //
1022 while (List != &HostBridgeInstance->Head) {
1023 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1024 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1025 for (Index = 0; Index < TypeBus; Index ++) {
1026 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1027 Number ++;
1028 }
1029 }
1030
1031 if (Number == 0) {
1032 return EFI_INVALID_PARAMETER;
1033 }
1034
1035 Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));
1036 if (Buffer == NULL) {
1037 return EFI_OUT_OF_RESOURCES;
1038 }
1039
1040 Temp = Buffer;
1041 for (Index = 0; Index < TypeBus; Index ++) {
1042 if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {
1043 Ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;
1044 ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;
1045
1046 switch (Index) {
1047
1048 case TypeIo:
1049 //
1050 // Io
1051 //
1052 Ptr->Desc = 0x8A;
1053 Ptr->Len = 0x2B;
1054 Ptr->ResType = 1;
1055 Ptr->GenFlag = 0;
1056 Ptr->SpecificFlag = 0;
1057 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1058 Ptr->AddrRangeMax = 0;
1059 Ptr->AddrTranslationOffset = \
1060 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1061 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1062 break;
1063
1064 case TypeMem32:
1065 //
1066 // Memory 32
1067 //
1068 Ptr->Desc = 0x8A;
1069 Ptr->Len = 0x2B;
1070 Ptr->ResType = 0;
1071 Ptr->GenFlag = 0;
1072 Ptr->SpecificFlag = 0;
1073 Ptr->AddrSpaceGranularity = 32;
1074 Ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;
1075 Ptr->AddrRangeMax = 0;
1076 Ptr->AddrTranslationOffset = \
1077 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;
1078 Ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;
1079 break;
1080
1081 case TypePMem32:
1082 //
1083 // Prefetch memory 32
1084 //
1085 Ptr->Desc = 0x8A;
1086 Ptr->Len = 0x2B;
1087 Ptr->ResType = 0;
1088 Ptr->GenFlag = 0;
1089 Ptr->SpecificFlag = 6;
1090 Ptr->AddrSpaceGranularity = 32;
1091 Ptr->AddrRangeMin = 0;
1092 Ptr->AddrRangeMax = 0;
1093 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1094 Ptr->AddrLen = 0;
1095 break;
1096
1097 case TypeMem64:
1098 //
1099 // Memory 64
1100 //
1101 Ptr->Desc = 0x8A;
1102 Ptr->Len = 0x2B;
1103 Ptr->ResType = 0;
1104 Ptr->GenFlag = 0;
1105 Ptr->SpecificFlag = 0;
1106 Ptr->AddrSpaceGranularity = 64;
1107 Ptr->AddrRangeMin = 0;
1108 Ptr->AddrRangeMax = 0;
1109 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1110 Ptr->AddrLen = 0;
1111 break;
1112
1113 case TypePMem64:
1114 //
1115 // Prefetch memory 64
1116 //
1117 Ptr->Desc = 0x8A;
1118 Ptr->Len = 0x2B;
1119 Ptr->ResType = 0;
1120 Ptr->GenFlag = 0;
1121 Ptr->SpecificFlag = 6;
1122 Ptr->AddrSpaceGranularity = 64;
1123 Ptr->AddrRangeMin = 0;
1124 Ptr->AddrRangeMax = 0;
1125 Ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;
1126 Ptr->AddrLen = 0;
1127 break;
1128 };
1129
1130 Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);
1131 }
1132 }
1133
1134 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;
1135 ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;
1136
1137 *Configuration = Buffer;
1138
1139 return EFI_SUCCESS;
1140 }
1141
1142 List = List->ForwardLink;
1143 }
1144
1145 return EFI_INVALID_PARAMETER;
1146 }
1147
1148 /**
1149 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various
1150 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual
1151 PCI controllers before enumeration.
1152
1153 This function is called during the PCI enumeration process. No specific action is expected from this
1154 member function. It allows the host bridge driver to preinitialize individual PCI controllers before
1155 enumeration.
1156
1157 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.
1158 @param RootBridgeHandle The associated PCI root bridge handle. Type EFI_HANDLE is defined in
1159 InstallProtocolInterface() in the UEFI 2.0 Specification.
1160 @param PciAddress The address of the PCI device on the PCI bus. This address can be passed to the
1161 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL member functions to access the PCI
1162 configuration space of the device. See Table 12-1 in the UEFI 2.0 Specification for
1163 the definition of EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS.
1164 @param Phase The phase of the PCI device enumeration.
1165
1166 @retval EFI_SUCCESS The requested parameters were returned.
1167 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.
1168 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in
1169 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.
1170 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should
1171 not enumerate this device, including its child devices if it is a PCI-to-PCI
1172 bridge.
1173
1174 **/
1175 EFI_STATUS
1176 EFIAPI
1177 PreprocessController (
1178 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,
1179 IN EFI_HANDLE RootBridgeHandle,
1180 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,
1181 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase
1182 )
1183 {
1184 PCI_HOST_BRIDGE_INSTANCE *HostBridgeInstance;
1185 PCI_ROOT_BRIDGE_INSTANCE *RootBridgeInstance;
1186 LIST_ENTRY *List;
1187
1188 HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);
1189 List = HostBridgeInstance->Head.ForwardLink;
1190
1191 //
1192 // Enumerate the root bridges in this host bridge
1193 //
1194 while (List != &HostBridgeInstance->Head) {
1195 RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);
1196 if (RootBridgeHandle == RootBridgeInstance->Handle) {
1197 break;
1198 }
1199 List = List->ForwardLink;
1200 }
1201 if (List == &HostBridgeInstance->Head) {
1202 return EFI_INVALID_PARAMETER;
1203 }
1204
1205 if ((UINT32)Phase > EfiPciBeforeResourceCollection) {
1206 return EFI_INVALID_PARAMETER;
1207 }
1208
1209 return EFI_SUCCESS;
1210 }
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