ArmPlatformPkg/Drivers/LcdGraphicsOutputDxe/PL111Lcd.c

   1 /** @file  PL111Lcd.c
   2
   3   Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
   4
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include <Library/IoLib.h>
  16 #include <Library/MemoryAllocationLib.h>
  17
  18 #include "LcdGraphicsOutputDxe.h"
  19 #include "PL111Lcd.h"
  20
  21 /**********************************************************************
  22  *
  23  *  This file contains all the bits of the PL111 that are
  24  *  platform independent.
  25  *
  26  **********************************************************************/
  27
  28 EFI_STATUS
  29 LcdIdentify (
  30   VOID
  31   )
  32 {
  33   DEBUG ((EFI_D_WARN, "Probing ID registers at 0x%lx for a PL111\n",
  34     PL111_REG_CLCD_PERIPH_ID_0));
  35
  36   // Check if this is a PL111
  37   if (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_0) == PL111_CLCD_PERIPH_ID_0 &&
  38       MmioRead8 (PL111_REG_CLCD_PERIPH_ID_1) == PL111_CLCD_PERIPH_ID_1 &&
  39      (MmioRead8 (PL111_REG_CLCD_PERIPH_ID_2) & 0xf) == PL111_CLCD_PERIPH_ID_2 &&
  40       MmioRead8 (PL111_REG_CLCD_PERIPH_ID_3) == PL111_CLCD_PERIPH_ID_3 &&
  41       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_0) == PL111_CLCD_P_CELL_ID_0 &&
  42       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_1) == PL111_CLCD_P_CELL_ID_1 &&
  43       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_2) == PL111_CLCD_P_CELL_ID_2 &&
  44       MmioRead8 (PL111_REG_CLCD_P_CELL_ID_3) == PL111_CLCD_P_CELL_ID_3) {
  45     return EFI_SUCCESS;
  46   }
  47   return EFI_NOT_FOUND;
  48 }
  49
  50 EFI_STATUS
  51 LcdInitialize (
  52   IN EFI_PHYSICAL_ADDRESS   VramBaseAddress
  53   )
  54 {
  55   // Define start of the VRAM. This never changes for any graphics mode
  56   MmioWrite32(PL111_REG_LCD_UP_BASE, (UINT32) VramBaseAddress);
  57   MmioWrite32(PL111_REG_LCD_LP_BASE, 0); // We are not using a double buffer
  58
  59   // Disable all interrupts from the PL111
  60   MmioWrite32(PL111_REG_LCD_IMSC, 0);
  61
  62   return EFI_SUCCESS;
  63 }
  64
  65 EFI_STATUS
  66 LcdSetMode (
  67   IN UINT32  ModeNumber
  68   )
  69 {
  70   EFI_STATUS        Status;
  71   UINT32            HRes;
  72   UINT32            HSync;
  73   UINT32            HBackPorch;
  74   UINT32            HFrontPorch;
  75   UINT32            VRes;
  76   UINT32            VSync;
  77   UINT32            VBackPorch;
  78   UINT32            VFrontPorch;
  79   UINT32            LcdControl;
  80   LCD_BPP           LcdBpp;
  81
  82   // Set the video mode timings and other relevant information
  83   Status = LcdPlatformGetTimings (ModeNumber,
  84                                   &HRes,&HSync,&HBackPorch,&HFrontPorch,
  85                                   &VRes,&VSync,&VBackPorch,&VFrontPorch);
  86   ASSERT_EFI_ERROR (Status);
  87   if (EFI_ERROR( Status )) {
  88     return EFI_DEVICE_ERROR;
  89   }
  90
  91   Status = LcdPlatformGetBpp (ModeNumber,&LcdBpp);
  92   ASSERT_EFI_ERROR (Status);
  93   if (EFI_ERROR( Status )) {
  94     return EFI_DEVICE_ERROR;
  95   }
  96
  97   // Disable the CLCD_LcdEn bit
  98   LcdControl = MmioRead32( PL111_REG_LCD_CONTROL);
  99   MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl & ~1);
 100
 101   // Set Timings
 102   MmioWrite32 (PL111_REG_LCD_TIMING_0, HOR_AXIS_PANEL(HBackPorch, HFrontPorch, HSync, HRes));
 103   MmioWrite32 (PL111_REG_LCD_TIMING_1, VER_AXIS_PANEL(VBackPorch, VFrontPorch, VSync, VRes));
 104   MmioWrite32 (PL111_REG_LCD_TIMING_2, CLK_SIG_POLARITY(HRes));
 105   MmioWrite32 (PL111_REG_LCD_TIMING_3, 0);
 106
 107   // PL111_REG_LCD_CONTROL
 108   LcdControl = PL111_CTRL_LCD_EN | PL111_CTRL_LCD_BPP(LcdBpp) | PL111_CTRL_LCD_TFT | PL111_CTRL_BGR;
 109   MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl);
 110
 111   // Turn on power to the LCD Panel
 112   LcdControl |= PL111_CTRL_LCD_PWR;
 113   MmioWrite32(PL111_REG_LCD_CONTROL,  LcdControl);
 114
 115   return EFI_SUCCESS;
 116 }
 117
 118 VOID
 119 LcdShutdown (
 120   VOID
 121   )
 122 {
 123   // Disable the controller
 124   MmioAnd32 (PL111_REG_LCD_CONTROL, ~PL111_CTRL_LCD_EN);
 125 }