ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include <PiPei.h>
  16
  17 #include <Library/ArmLib.h>
  18 #include <Library/ArmGicLib.h>
  19 #include <Library/ArmPlatformSecLib.h>
  20 #include <Library/DebugLib.h>
  21 #include <Library/PcdLib.h>
  22 #include <Library/PrintLib.h>
  23 #include <Library/SerialPortLib.h>
  24
  25 #include <Chipset/ArmV7.h>
  26
  27 // When the firmware is built as not Standalone, the secondary cores need to wait the firmware
  28 // entirely written into DRAM. It is the firmware from DRAM which will wake up the secondary cores.
  29 VOID
  30 NonSecureWaitForFirmware (
  31   VOID
  32   )
  33 {
  34   VOID (*secondary_start)(VOID);
  35
  36   // The secondary cores will execute the firmware once wake from WFI.
  37   secondary_start = (VOID (*)())PcdGet32(PcdFvBaseAddress);
  38
  39   ArmCallWFI();
  40
  41   // Acknowledge the interrupt and send End of Interrupt signal.
  42   ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);
  43
  44   // Jump to secondary core entry point.
  45   secondary_start ();
  46
  47   // PEI Core should always load and never return
  48   ASSERT (FALSE);
  49 }
  50
  51 /**
  52   Call before jumping to Normal World
  53
  54   This function allows the firmware platform to do extra actions before
  55   jumping to the Normal World
  56
  57 **/
  58 VOID
  59 ArmPlatformSecExtraAction (
  60   IN  UINTN         MpId,
  61   OUT UINTN*        JumpAddress
  62   )
  63 {
  64   CHAR8           Buffer[100];
  65   UINTN           CharCount;
  66
  67   if (FeaturePcdGet (PcdStandalone) == FALSE) {
  68
  69     //
  70     // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
  71     //
  72
  73     if (IS_PRIMARY_CORE(MpId)) {
  74       UINTN*   StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);
  75
  76       // Patch the DRAM to make an infinite loop at the start address
  77       *StartAddress = 0xEAFFFFFE; // opcode for while(1)
  78
  79       CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
  80       SerialPortWrite ((UINT8 *) Buffer, CharCount);
  81
  82       *JumpAddress = PcdGet32(PcdFvBaseAddress);
  83     } else {
  84       // When the primary core is stopped by the hardware debugger to copy the firmware
  85       // into DRAM. The secondary cores are still running. As soon as the first bytes of
  86       // the firmware are written into DRAM, the secondary cores will start to execute the
  87       // code even if the firmware is not entirely written into the memory.
  88       // That's why the secondary cores need to be parked in WFI and wake up once the
  89       // firmware is ready.
  90
  91       *JumpAddress = (UINTN)NonSecureWaitForFirmware;
  92     }
  93   } else if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
  94
  95     //
  96     // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
  97     //
  98
  99     if (IS_PRIMARY_CORE(MpId)) {
 100       // Signal the secondary cores they can jump to PEI phase
 101       ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
 102
 103       // To enter into Non Secure state, we need to make a return from exception
 104       *JumpAddress = PcdGet32(PcdFvBaseAddress);
 105     } else {
 106       // We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary
 107       // cores would make crash the system by setting their stacks in DRAM before the primary core has not
 108       // finished to initialize the system memory.
 109       *JumpAddress = (UINTN)NonSecureWaitForFirmware;
 110     }
 111   } else {
 112     *JumpAddress = PcdGet32(PcdFvBaseAddress);
 113   }
 114 }