ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include <PiPei.h>
  16
  17 #include <Library/ArmLib.h>
  18 #include <Library/ArmGicLib.h>
  19 #include <Library/ArmPlatformLib.h>
  20 #include <Library/ArmPlatformSecLib.h>
  21 #include <Library/DebugLib.h>
  22 #include <Library/PcdLib.h>
  23 #include <Library/PrintLib.h>
  24 #include <Library/SerialPortLib.h>
  25
  26 // When the firmware is built as not Standalone, the secondary cores need to wait the firmware
  27 // entirely written into DRAM. It is the firmware from DRAM which will wake up the secondary cores.
  28 VOID
  29 NonSecureWaitForFirmware (
  30   VOID
  31   )
  32 {
  33   VOID (*secondary_start)(VOID);
  34
  35   // The secondary cores will execute the firmware once wake from WFI.
  36   secondary_start = (VOID (*)())PcdGet32(PcdFvBaseAddress);
  37
  38   ArmCallWFI();
  39
  40   // Acknowledge the interrupt and send End of Interrupt signal.
  41   ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);
  42
  43   // Jump to secondary core entry point.
  44   secondary_start ();
  45
  46   // PEI Core should always load and never return
  47   ASSERT (FALSE);
  48 }
  49
  50 /**
  51   Call before jumping to Normal World
  52
  53   This function allows the firmware platform to do extra actions before
  54   jumping to the Normal World
  55
  56 **/
  57 VOID
  58 ArmPlatformSecExtraAction (
  59   IN  UINTN         MpId,
  60   OUT UINTN*        JumpAddress
  61   )
  62 {
  63   CHAR8           Buffer[100];
  64   UINTN           CharCount;
  65
  66   if (FeaturePcdGet (PcdStandalone) == FALSE) {
  67
  68     //
  69     // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
  70     //
  71
  72     if (ArmPlatformIsPrimaryCore (MpId)) {
  73       UINTN*   StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);
  74
  75       // Patch the DRAM to make an infinite loop at the start address
  76       *StartAddress = 0xEAFFFFFE; // opcode for while(1)
  77
  78       CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
  79       SerialPortWrite ((UINT8 *) Buffer, CharCount);
  80
  81       *JumpAddress = PcdGet32(PcdFvBaseAddress);
  82     } else {
  83       // When the primary core is stopped by the hardware debugger to copy the firmware
  84       // into DRAM. The secondary cores are still running. As soon as the first bytes of
  85       // the firmware are written into DRAM, the secondary cores will start to execute the
  86       // code even if the firmware is not entirely written into the memory.
  87       // That's why the secondary cores need to be parked in WFI and wake up once the
  88       // firmware is ready.
  89
  90       *JumpAddress = (UINTN)NonSecureWaitForFirmware;
  91     }
  92   } else if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
  93
  94     //
  95     // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
  96     //
  97
  98     if (ArmPlatformIsPrimaryCore (MpId)) {
  99       // Signal the secondary cores they can jump to PEI phase
 100       ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
 101
 102       // To enter into Non Secure state, we need to make a return from exception
 103       *JumpAddress = PcdGet32(PcdFvBaseAddress);
 104     } else {
 105       // We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary
 106       // cores would make crash the system by setting their stacks in DRAM before the primary core has not
 107       // finished to initialize the system memory.
 108       *JumpAddress = (UINTN)NonSecureWaitForFirmware;
 109     }
 110   } else {
 111     *JumpAddress = PcdGet32(PcdFvBaseAddress);
 112   }
 113 }