ArmPlatformPkg/Library/DebugSecExtraActionLib/DebugSecExtraActionLib.c

   1 /** @file
   2 *
   3 *  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   4 *
   5 *  This program and the accompanying materials
   6 *  are licensed and made available under the terms and conditions of the BSD License
   7 *  which accompanies this distribution.  The full text of the license may be found at
   8 *  http://opensource.org/licenses/bsd-license.php
   9 *
  10 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 *
  13 **/
  14
  15 #include <PiPei.h>
  16
  17 #include <Library/ArmLib.h>
  18 #include <Library/ArmGicLib.h>
  19 #include <Library/ArmPlatformLib.h>
  20 #include <Library/ArmPlatformSecLib.h>
  21 #include <Library/DebugLib.h>
  22 #include <Library/PcdLib.h>
  23 #include <Library/PrintLib.h>
  24 #include <Library/SerialPortLib.h>
  25
  26 #include <Chipset/ArmV7.h>
  27
  28 // When the firmware is built as not Standalone, the secondary cores need to wait the firmware
  29 // entirely written into DRAM. It is the firmware from DRAM which will wake up the secondary cores.
  30 VOID
  31 NonSecureWaitForFirmware (
  32   VOID
  33   )
  34 {
  35   VOID (*secondary_start)(VOID);
  36
  37   // The secondary cores will execute the firmware once wake from WFI.
  38   secondary_start = (VOID (*)())PcdGet32(PcdFvBaseAddress);
  39
  40   ArmCallWFI();
  41
  42   // Acknowledge the interrupt and send End of Interrupt signal.
  43   ArmGicAcknowledgeInterrupt (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase), NULL, NULL);
  44
  45   // Jump to secondary core entry point.
  46   secondary_start ();
  47
  48   // PEI Core should always load and never return
  49   ASSERT (FALSE);
  50 }
  51
  52 /**
  53   Call before jumping to Normal World
  54
  55   This function allows the firmware platform to do extra actions before
  56   jumping to the Normal World
  57
  58 **/
  59 VOID
  60 ArmPlatformSecExtraAction (
  61   IN  UINTN         MpId,
  62   OUT UINTN*        JumpAddress
  63   )
  64 {
  65   CHAR8           Buffer[100];
  66   UINTN           CharCount;
  67
  68   if (FeaturePcdGet (PcdStandalone) == FALSE) {
  69
  70     //
  71     // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
  72     //
  73
  74     if (ArmPlatformIsPrimaryCore (MpId)) {
  75       UINTN*   StartAddress = (UINTN*)PcdGet32(PcdFvBaseAddress);
  76
  77       // Patch the DRAM to make an infinite loop at the start address
  78       *StartAddress = 0xEAFFFFFE; // opcode for while(1)
  79
  80       CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Waiting for firmware at 0x%08X ...\n\r",StartAddress);
  81       SerialPortWrite ((UINT8 *) Buffer, CharCount);
  82
  83       *JumpAddress = PcdGet32(PcdFvBaseAddress);
  84     } else {
  85       // When the primary core is stopped by the hardware debugger to copy the firmware
  86       // into DRAM. The secondary cores are still running. As soon as the first bytes of
  87       // the firmware are written into DRAM, the secondary cores will start to execute the
  88       // code even if the firmware is not entirely written into the memory.
  89       // That's why the secondary cores need to be parked in WFI and wake up once the
  90       // firmware is ready.
  91
  92       *JumpAddress = (UINTN)NonSecureWaitForFirmware;
  93     }
  94   } else if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
  95
  96     //
  97     // Warning: This code assumes the DRAM has already been initialized by ArmPlatformSecLib
  98     //
  99
 100     if (ArmPlatformIsPrimaryCore (MpId)) {
 101       // Signal the secondary cores they can jump to PEI phase
 102       ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E, PcdGet32 (PcdGicSgiIntId));
 103
 104       // To enter into Non Secure state, we need to make a return from exception
 105       *JumpAddress = PcdGet32(PcdFvBaseAddress);
 106     } else {
 107       // We wait for the primary core to finish to initialize the System Memory. Otherwise the secondary
 108       // cores would make crash the system by setting their stacks in DRAM before the primary core has not
 109       // finished to initialize the system memory.
 110       *JumpAddress = (UINTN)NonSecureWaitForFirmware;
 111     }
 112   } else {
 113     *JumpAddress = PcdGet32(PcdFvBaseAddress);
 114   }
 115 }