ArmPlatformPkg/Library/SP804TimerLib/SP804TimerLib.c

   1 /** @file
   2
   3   Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
   4
   5   This program and the accompanying materials
   6   are licensed and made available under the terms and conditions of the BSD License
   7   which accompanies this distribution.  The full text of the license may be found at
   8   http://opensource.org/licenses/bsd-license.php
   9
  10   THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11   WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12
  13 **/
  14
  15 #include <Base.h>
  16
  17 #include <Library/BaseLib.h>
  18 #include <Library/TimerLib.h>
  19 #include <Library/DebugLib.h>
  20 #include <Library/PcdLib.h>
  21 #include <Library/IoLib.h>
  22 #include <Drivers/SP804Timer.h>
  23 #include <ArmPlatform.h>
  24
  25 // Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter
  26 // Note: ArmVE's Timer0 and Timer1 are used by TimerDxe.
  27 RETURN_STATUS
  28 EFIAPI
  29 TimerConstructor (
  30   VOID
  31   )
  32 {
  33   // Check if Timer 2 is already initialized
  34   if (MmioRead32(SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
  35     return RETURN_SUCCESS;
  36   } else {
  37     // Configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled
  38     MmioOr32 (SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
  39
  40     // Preload the timer count register
  41     MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);
  42
  43     // Enable the timer
  44     MmioOr32 (SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
  45   }
  46
  47   // Check if Timer 3 is already initialized
  48   if (MmioRead32(SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
  49     return RETURN_SUCCESS;
  50   } else {
  51     // Configure timer 3 for free running operation, 32 bits, no prescaler, interrupt disabled
  52     MmioOr32 (SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
  53
  54     // Enable the timer
  55     MmioOr32 (SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
  56   }
  57
  58   return RETURN_SUCCESS;
  59 }
  60
  61 /**
  62   Stalls the CPU for at least the given number of microseconds.
  63
  64   Stalls the CPU for the number of microseconds specified by MicroSeconds.
  65
  66   @param  MicroSeconds  The minimum number of microseconds to delay.
  67
  68   @return The value of MicroSeconds inputted.
  69
  70 **/
  71 UINTN
  72 EFIAPI
  73 MicroSecondDelay (
  74   IN  UINTN MicroSeconds
  75   )
  76 {
  77   UINTN Index;
  78
  79   // Reload the counter for each 1Mhz to avoid an overflow in the load value
  80   for (Index = 0; Index < (UINTN)PcdGet32(PcdSP804FrequencyInMHz); Index++) {
  81     // load the timer count register
  82     MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, MicroSeconds);
  83
  84     while (MmioRead32 (SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {
  85       ;
  86     }
  87   }
  88
  89   return MicroSeconds;
  90 }
  91
  92 /**
  93   Stalls the CPU for at least the given number of nanoseconds.
  94
  95   Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
  96
  97   @param  NanoSeconds The minimum number of nanoseconds to delay.
  98
  99   @return The value of NanoSeconds inputted.
 100
 101 **/
 102 UINTN
 103 EFIAPI
 104 NanoSecondDelay (
 105   IN  UINTN NanoSeconds
 106   )
 107 {
 108   UINTN   Index;
 109   UINT32  MicroSeconds;
 110
 111   // Round up to 1us Tick Number
 112   MicroSeconds =   (UINT32)NanoSeconds / 1000;
 113   MicroSeconds += ((UINT32)NanoSeconds % 1000) == 0 ? 0 : 1;
 114
 115   // Reload the counter for each 1Mhz to avoid an overflow in the load value
 116   for (Index = 0; Index < (UINTN)PcdGet32(PcdSP804FrequencyInMHz); Index++) {
 117     // load the timer count register
 118     MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, MicroSeconds);
 119
 120     while (MmioRead32 (SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {
 121       ;
 122     }
 123   }
 124
 125   return NanoSeconds;
 126 }
 127
 128 /**
 129   Retrieves the current value of a 64-bit free running performance counter.
 130
 131   The counter can either count up by 1 or count down by 1. If the physical
 132   performance counter counts by a larger increment, then the counter values
 133   must be translated. The properties of the counter can be retrieved from
 134   GetPerformanceCounterProperties().
 135
 136   @return The current value of the free running performance counter.
 137
 138 **/
 139 UINT64
 140 EFIAPI
 141 GetPerformanceCounter (
 142   VOID
 143   )
 144 {
 145   // Free running 64-bit/32-bit counter is needed here.
 146   // Don't think we need this to boot, just to do performance profile
 147   UINT64 Value;
 148   Value = MmioRead32 (SP804_TIMER3_BASE + SP804_TIMER_CURRENT_REG);
 149   ASSERT(Value > 0);
 150   return Value;
 151 }
 152
 153
 154 /**
 155   Retrieves the 64-bit frequency in Hz and the range of performance counter
 156   values.
 157
 158   If StartValue is not NULL, then the value that the performance counter starts
 159   with immediately after is it rolls over is returned in StartValue. If
 160   EndValue is not NULL, then the value that the performance counter end with
 161   immediately before it rolls over is returned in EndValue. The 64-bit
 162   frequency of the performance counter in Hz is always returned. If StartValue
 163   is less than EndValue, then the performance counter counts up. If StartValue
 164   is greater than EndValue, then the performance counter counts down. For
 165   example, a 64-bit free running counter that counts up would have a StartValue
 166   of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
 167   that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
 168
 169   @param  StartValue  The value the performance counter starts with when it
 170                       rolls over.
 171   @param  EndValue    The value that the performance counter ends with before
 172                       it rolls over.
 173
 174   @return The frequency in Hz.
 175
 176 **/
 177 UINT64
 178 EFIAPI
 179 GetPerformanceCounterProperties (
 180   OUT UINT64  *StartValue,  OPTIONAL
 181   OUT UINT64  *EndValue     OPTIONAL
 182   )
 183 {
 184   if (StartValue != NULL) {
 185     // Timer starts with the reload value
 186     *StartValue = (UINT64)0ULL;
 187   }
 188
 189   if (EndValue != NULL) {
 190     // Timer counts up to 0xFFFFFFFF
 191     *EndValue = 0xFFFFFFFF;
 192   }
 193
 194   return PcdGet64 (PcdEmbeddedPerformanceCounterFrequencyInHz);
 195 }