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ArmPlatformPkg/SP804Timer: Remove the SP810 System Controller dependency
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1 /** @file
2
3 Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
4
5 This program and the accompanying materials
6 are licensed and made available under the terms and conditions of the BSD License
7 which accompanies this distribution. The full text of the license may be found at
8 http://opensource.org/licenses/bsd-license.php
9
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12
13 **/
14
15 #include <Base.h>
16
17 #include <Library/BaseLib.h>
18 #include <Library/TimerLib.h>
19 #include <Library/DebugLib.h>
20 #include <Library/PcdLib.h>
21 #include <Library/IoLib.h>
22 #include <Drivers/SP804Timer.h>
23 #include <ArmPlatform.h>
24
25 // Setup SP810's Timer2 for managing delay functions. And Timer3 for Performance counter
26 // Note: ArmVE's Timer0 and Timer1 are used by TimerDxe.
27 RETURN_STATUS
28 EFIAPI
29 TimerConstructor (
30 VOID
31 )
32 {
33 // Check if Timer 2 is already initialized
34 if (MmioRead32(SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
35 return RETURN_SUCCESS;
36 } else {
37 // Configure timer 2 for one shot operation, 32 bits, no prescaler, and interrupt disabled
38 MmioOr32 (SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ONESHOT | SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
39
40 // Preload the timer count register
41 MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, 1);
42
43 // Enable the timer
44 MmioOr32 (SP804_TIMER2_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
45 }
46
47 // Check if Timer 3 is already initialized
48 if (MmioRead32(SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG) & SP804_TIMER_CTRL_ENABLE) {
49 return RETURN_SUCCESS;
50 } else {
51 // Configure timer 3 for free running operation, 32 bits, no prescaler, interrupt disabled
52 MmioOr32 (SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_32BIT | SP804_PRESCALE_DIV_1);
53
54 // Enable the timer
55 MmioOr32 (SP804_TIMER3_BASE + SP804_TIMER_CONTROL_REG, SP804_TIMER_CTRL_ENABLE);
56 }
57
58 return RETURN_SUCCESS;
59 }
60
61 /**
62 Stalls the CPU for at least the given number of microseconds.
63
64 Stalls the CPU for the number of microseconds specified by MicroSeconds.
65
66 @param MicroSeconds The minimum number of microseconds to delay.
67
68 @return The value of MicroSeconds inputted.
69
70 **/
71 UINTN
72 EFIAPI
73 MicroSecondDelay (
74 IN UINTN MicroSeconds
75 )
76 {
77 // load the timer count register
78 MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, MicroSeconds);
79
80 while (MmioRead32 (SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {
81 ;
82 }
83
84 return MicroSeconds;
85 }
86
87 /**
88 Stalls the CPU for at least the given number of nanoseconds.
89
90 Stalls the CPU for the number of nanoseconds specified by NanoSeconds.
91
92 @param NanoSeconds The minimum number of nanoseconds to delay.
93
94 @return The value of NanoSeconds inputted.
95
96 **/
97 UINTN
98 EFIAPI
99 NanoSecondDelay (
100 IN UINTN NanoSeconds
101 )
102 {
103 UINT32 MicroSeconds;
104
105 // Round up to 1us Tick Number
106 MicroSeconds = (UINT32)NanoSeconds / 1000;
107 MicroSeconds += ((UINT32)NanoSeconds % 1000) == 0 ? 0 : 1;
108
109 // load the timer count register
110 MmioWrite32 (SP804_TIMER2_BASE + SP804_TIMER_LOAD_REG, MicroSeconds);
111
112 while (MmioRead32 (SP804_TIMER2_BASE + SP804_TIMER_CURRENT_REG) > 0) {
113 ;
114 }
115
116 return NanoSeconds;
117 }
118
119 /**
120 Retrieves the current value of a 64-bit free running performance counter.
121
122 The counter can either count up by 1 or count down by 1. If the physical
123 performance counter counts by a larger increment, then the counter values
124 must be translated. The properties of the counter can be retrieved from
125 GetPerformanceCounterProperties().
126
127 @return The current value of the free running performance counter.
128
129 **/
130 UINT64
131 EFIAPI
132 GetPerformanceCounter (
133 VOID
134 )
135 {
136 // Free running 64-bit/32-bit counter is needed here.
137 // Don't think we need this to boot, just to do performance profile
138 UINT64 Value;
139 Value = MmioRead32 (SP804_TIMER3_BASE + SP804_TIMER_CURRENT_REG);
140 ASSERT(Value > 0);
141 return Value;
142 }
143
144
145 /**
146 Retrieves the 64-bit frequency in Hz and the range of performance counter
147 values.
148
149 If StartValue is not NULL, then the value that the performance counter starts
150 with immediately after is it rolls over is returned in StartValue. If
151 EndValue is not NULL, then the value that the performance counter end with
152 immediately before it rolls over is returned in EndValue. The 64-bit
153 frequency of the performance counter in Hz is always returned. If StartValue
154 is less than EndValue, then the performance counter counts up. If StartValue
155 is greater than EndValue, then the performance counter counts down. For
156 example, a 64-bit free running counter that counts up would have a StartValue
157 of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter
158 that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.
159
160 @param StartValue The value the performance counter starts with when it
161 rolls over.
162 @param EndValue The value that the performance counter ends with before
163 it rolls over.
164
165 @return The frequency in Hz.
166
167 **/
168 UINT64
169 EFIAPI
170 GetPerformanceCounterProperties (
171 OUT UINT64 *StartValue, OPTIONAL
172 OUT UINT64 *EndValue OPTIONAL
173 )
174 {
175 if (StartValue != NULL) {
176 // Timer starts with the reload value
177 *StartValue = (UINT64)0ULL;
178 }
179
180 if (EndValue != NULL) {
181 // Timer counts up to 0xFFFFFFFF
182 *EndValue = 0xFFFFFFFF;
183 }
184
185 return 1000000;
186 }