ArmPlatformPkg/PrePeiCore/AArch64/Exception.S

   1 #
   2 #  Copyright (c) 2011-2014, ARM Limited. All rights reserved.
   3 #
   4 #  SPDX-License-Identifier: BSD-2-Clause-Patent
   5 #
   6 #
   7
   8 #include <Chipset/AArch64.h>
   9 #include <AsmMacroIoLibV8.h>
  10 #include <Base.h>
  11 #include <AutoGen.h>
  12
  13 .text
  14
  15 //============================================================
  16 //Default Exception Handlers
  17 //============================================================
  18
  19 #define TO_HANDLER                                              \
  20    EL1_OR_EL2(x1)                                               \
  21 1: mrs  x1, elr_el1    /* EL1 Exception Link Register */       ;\
  22    b    3f                                                     ;\
  23 2: mrs  x1, elr_el2    /* EL2 Exception Link Register */       ;\
  24 3: bl   ASM_PFX(PeiCommonExceptionEntry)                       ;
  25
  26
  27 //
  28 // Default Exception handlers: There is no plan to return from any of these exceptions.
  29 // No context saving at all.
  30 //
  31
  32 VECTOR_BASE(PeiVectorTable)
  33
  34 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SYNC)
  35 _DefaultSyncExceptHandler_t:
  36   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
  37   TO_HANDLER
  38
  39 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_IRQ)
  40 _DefaultIrq_t:
  41   mov  x0, #EXCEPT_AARCH64_IRQ
  42   TO_HANDLER
  43
  44 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_FIQ)
  45 _DefaultFiq_t:
  46   mov  x0, #EXCEPT_AARCH64_FIQ
  47   TO_HANDLER
  48
  49 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SP0_SERR)
  50 _DefaultSError_t:
  51   mov  x0, #EXCEPT_AARCH64_SERROR
  52   TO_HANDLER
  53
  54 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SYNC)
  55 _DefaultSyncExceptHandler_h:
  56   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
  57   TO_HANDLER
  58
  59 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_IRQ)
  60 _DefaultIrq_h:
  61   mov  x0, #EXCEPT_AARCH64_IRQ
  62   TO_HANDLER
  63
  64 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_FIQ)
  65 _DefaultFiq_h:
  66   mov  x0, #EXCEPT_AARCH64_FIQ
  67   TO_HANDLER
  68
  69 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_CUR_SPx_SERR)
  70 _DefaultSError_h:
  71   mov  x0, #EXCEPT_AARCH64_SERROR
  72   TO_HANDLER
  73
  74 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SYNC)
  75 _DefaultSyncExceptHandler_LowerA64:
  76   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
  77   TO_HANDLER
  78
  79 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_IRQ)
  80 _DefaultIrq_LowerA64:
  81   mov  x0, #EXCEPT_AARCH64_IRQ
  82   TO_HANDLER
  83
  84 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_FIQ)
  85 _DefaultFiq_LowerA64:
  86   mov  x0, #EXCEPT_AARCH64_FIQ
  87   TO_HANDLER
  88
  89 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A64_SERR)
  90 _DefaultSError_LowerA64:
  91   mov  x0, #EXCEPT_AARCH64_SERROR
  92   TO_HANDLER
  93
  94 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SYNC)
  95 _DefaultSyncExceptHandler_LowerA32:
  96   mov  x0, #EXCEPT_AARCH64_SYNCHRONOUS_EXCEPTIONS
  97   TO_HANDLER
  98
  99 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_IRQ)
 100 _DefaultIrq_LowerA32:
 101   mov  x0, #EXCEPT_AARCH64_IRQ
 102   TO_HANDLER
 103
 104 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_FIQ)
 105 _DefaultFiq_LowerA32:
 106   mov  x0, #EXCEPT_AARCH64_FIQ
 107   TO_HANDLER
 108
 109 VECTOR_ENTRY(PeiVectorTable, ARM_VECTOR_LOW_A32_SERR)
 110 _DefaultSError_LowerA32:
 111   mov  x0, #EXCEPT_AARCH64_SERROR
 112   TO_HANDLER
 113
 114 VECTOR_END(PeiVectorTable)