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1 //
2 // Copyright (c) 2011-2013, ARM Limited. All rights reserved.
3 //
4 // This program and the accompanying materials
5 // are licensed and made available under the terms and conditions of the BSD License
6 // which accompanies this distribution. The full text of the license may be found at
7 // http://opensource.org/licenses/bsd-license.php
8 //
9 // THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
10 // WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
11 //
12 //
13
14 #include <AsmMacroIoLibV8.h>
15 #include <Base.h>
16 #include <Library/PcdLib.h>
17 #include <AutoGen.h>
18
19 .text
20 .align 3
21
22 GCC_ASM_IMPORT(CEntryPoint)
23 GCC_ASM_IMPORT(ArmPlatformGetCorePosition)
24 GCC_ASM_IMPORT(ArmPlatformIsPrimaryCore)
25 GCC_ASM_IMPORT(ArmReadMpidr)
26 GCC_ASM_IMPORT(ArmPlatformPeiBootAction)
27 GCC_ASM_EXPORT(_ModuleEntryPoint)
28
29 StartupAddr: .dword CEntryPoint
30
31 ASM_PFX(_ModuleEntryPoint):
32 // Do early platform specific actions
33 bl ASM_PFX(ArmPlatformPeiBootAction)
34
35 // NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect
36 // and configure the system accordingly. EL2 is default if possible.
37 // If we started in EL3 we need to switch and run at EL2.
38 // If we are running at EL2 stay in EL2
39 // If we are starting at EL1 stay in EL1.
40
41 // If started at EL3 Sec is run and switches to EL2 before jumping to PEI.
42 // If started at EL1 or EL2 Sec jumps directly to PEI without making any
43 // changes.
44
45 // Which EL are we running at? Every EL needs some level of setup...
46 EL1_OR_EL2_OR_EL3(x0)
47 1:bl ASM_PFX(SetupExceptionLevel1)
48 b ASM_PFX(MainEntryPoint)
49 2:bl ASM_PFX(SetupExceptionLevel2)
50 b ASM_PFX(MainEntryPoint)
51 3:// If we are at EL3 we die.
52 b dead
53
54 ASM_PFX(MainEntryPoint):
55 // Identify CPU ID
56 bl ASM_PFX(ArmReadMpidr)
57 // Keep a copy of the MpId register value
58 mov x5, x0
59
60 // Is it the Primary Core ?
61 bl ASM_PFX(ArmPlatformIsPrimaryCore)
62
63 // Get the top of the primary stacks (and the base of the secondary stacks)
64 LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), x1)
65 LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), x2)
66 add x1, x1, x2
67
68 // x0 is equal to 1 if I am the primary core
69 cmp x0, #1
70 b.eq _SetupPrimaryCoreStack
71
72 _SetupSecondaryCoreStack:
73 // x1 contains the base of the secondary stacks
74
75 // Get the Core Position
76 mov x6, x1 // Save base of the secondary stacks
77 mov x0, x5
78 bl ASM_PFX(ArmPlatformGetCorePosition)
79 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
80 add x0, x0, #1
81
82 // StackOffset = CorePos * StackSize
83 LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), x2)
84 mul x0, x0, x2
85 // SP = StackBase + StackOffset
86 add sp, x6, x0
87
88 _PrepareArguments:
89 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
90 LoadConstantToReg (FixedPcdGet64(PcdFvBaseAddress), x2)
91 add x2, x2, #8
92 ldr x1, [x2]
93
94 // Move sec startup address into a data register
95 // Ensure we're jumping to FV version of the code (not boot remapped alias)
96 ldr x3, StartupAddr
97
98 // Jump to PrePeiCore C code
99 // x0 = mp_id
100 // x1 = pei_core_address
101 mov x0, x5
102 blr x3
103
104 _SetupPrimaryCoreStack:
105 // x1 contains the top of the primary stack
106 LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), x2)
107
108 // The reserved space for global variable must be 16-bytes aligned for pushing
109 // 128-bit variable on the stack
110 SetPrimaryStack (x1, x2, x3, x4)
111 b _PrepareArguments
112
113 dead:
114 b dead