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UefiCpuPkg: Move AsmRelocateApLoopStart from Mpfuncs.nasm to AmdSev.nasm
[mirror_edk2.git] / ArmPlatformPkg / PrePeiCore / AArch64 / PrePeiCoreEntryPoint.S
1 //
2 // Copyright (c) 2011-2014, ARM Limited. All rights reserved.
3 //
4 // SPDX-License-Identifier: BSD-2-Clause-Patent
5 //
6 //
7
8 #include <AsmMacroIoLibV8.h>
9
10 ASM_FUNC(_ModuleEntryPoint)
11 // Do early platform specific actions
12 bl ASM_PFX(ArmPlatformPeiBootAction)
13
14 // NOTE: We could be booting from EL3, EL2 or EL1. Need to correctly detect
15 // and configure the system accordingly. EL2 is default if possible.
16 // If we started in EL3 we need to switch and run at EL2.
17 // If we are running at EL2 stay in EL2
18 // If we are starting at EL1 stay in EL1.
19
20 // If started at EL3 Sec is run and switches to EL2 before jumping to PEI.
21 // If started at EL1 or EL2 Sec jumps directly to PEI without making any
22 // changes.
23
24 // Which EL are we running at? Every EL needs some level of setup...
25 // We should not run this code in EL3
26 EL1_OR_EL2(x0)
27 1:bl ASM_PFX(SetupExceptionLevel1)
28 b ASM_PFX(MainEntryPoint)
29 2:bl ASM_PFX(SetupExceptionLevel2)
30 b ASM_PFX(MainEntryPoint)
31
32 ASM_PFX(MainEntryPoint):
33 // Identify CPU ID
34 bl ASM_PFX(ArmReadMpidr)
35 // Keep a copy of the MpId register value
36 mov x5, x0
37
38 // Is it the Primary Core ?
39 bl ASM_PFX(ArmPlatformIsPrimaryCore)
40
41 // Get the top of the primary stacks (and the base of the secondary stacks)
42 MOV64 (x1, FixedPcdGet64(PcdCPUCoresStackBase) + FixedPcdGet32(PcdCPUCorePrimaryStackSize))
43
44 // x0 is equal to 1 if I am the primary core
45 cmp x0, #1
46 b.eq _SetupPrimaryCoreStack
47
48 _SetupSecondaryCoreStack:
49 // x1 contains the base of the secondary stacks
50
51 // Get the Core Position
52 mov x6, x1 // Save base of the secondary stacks
53 mov x0, x5
54 bl ASM_PFX(ArmPlatformGetCorePosition)
55 // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
56 add x0, x0, #1
57
58 // StackOffset = CorePos * StackSize
59 MOV32 (x2, FixedPcdGet32(PcdCPUCoreSecondaryStackSize))
60 mul x0, x0, x2
61 // SP = StackBase + StackOffset
62 add sp, x6, x0
63
64 _PrepareArguments:
65 // The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
66 MOV64 (x2, FixedPcdGet64(PcdFvBaseAddress))
67 ldr x1, [x2, #8]
68
69 // Move sec startup address into a data register
70 // Ensure we're jumping to FV version of the code (not boot remapped alias)
71 ldr x3, =ASM_PFX(CEntryPoint)
72
73 // Set the frame pointer to NULL so any backtraces terminate here
74 mov x29, xzr
75
76 // Jump to PrePeiCore C code
77 // x0 = mp_id
78 // x1 = pei_core_address
79 mov x0, x5
80 blr x3
81
82 _SetupPrimaryCoreStack:
83 mov sp, x1
84 MOV64 (x8, FixedPcdGet64 (PcdCPUCoresStackBase))
85 MOV64 (x9, FixedPcdGet32 (PcdInitValueInTempStack) |\
86 FixedPcdGet32 (PcdInitValueInTempStack) << 32)
87 0:stp x9, x9, [x8], #16
88 cmp x8, x1
89 b.lt 0b
90 b _PrepareArguments