ArmPlatformPkg/PrePeiCore/PrePeiCoreEntryPoint.S

   1 //
   2 //  Copyright (c) 2011, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <AsmMacroIoLib.h>
  15 #include <Base.h>
  16 #include <Library/PcdLib.h>
  17 #include <AutoGen.h>
  18
  19 .text
  20 .align 3
  21
  22 GCC_ASM_IMPORT(CEntryPoint)
  23 GCC_ASM_IMPORT(ArmReadMpidr)
  24 GCC_ASM_EXPORT(_ModuleEntryPoint)
  25
  26 StartupAddr: .word    CEntryPoint
  27
  28 ASM_PFX(_ModuleEntryPoint):
  29   # Identify CPU ID
  30   bl    ASM_PFX(ArmReadMpidr)
  31   // Get ID of this CPU in Multicore system
  32   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
  33   and   r0, r0, r1
  34
  35 _SetupStack:
  36   # Setup Stack for the 4 CPU cores
  37   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackBase), r1)
  38   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresNonSecStackSize), r2)
  39
  40   mov     r3,r0         @ r3 = core_id
  41   mul     r3,r3,r2      @ r3 = core_id * stack_size = offset from the stack base
  42   add     r3,r3,r1      @ r3 = stack_base + offset
  43   add     r3,r3,r2,LSR #1   @ r3 = stack_offset + (stack_size/2)   <-- the top half is for the heap
  44   mov     sp, r3
  45
  46   # Only allocate memory in top of the primary core stack
  47   cmp   r0, #0
  48   bne   _PrepareArguments
  49
  50 _AllocateGlobalPeiVariables:
  51   # Reserve top of the stack for Global PEI Variables (eg: PeiServicesTablePointer)
  52   LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r1)
  53   sub   sp, sp, r1
  54
  55 _PrepareArguments:
  56   # The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
  57   LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
  58   add   r2, r2, #4
  59   ldr   r1, [r2]
  60
  61   # move sec startup address into a data register
  62   # ensure we're jumping to FV version of the code (not boot remapped alias)
  63   ldr   r2, StartupAddr
  64
  65   # jump to PrePeiCore C code
  66   #    r0 = core_id
  67   #    r1 = pei_core_address
  68   blx   r2