3 * Copyright (c) 2011, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Library/ArmMPCoreMailBoxLib.h>
18 #include <Chipset/ArmV7.h>
19 #include <Drivers/PL390Gic.h>
23 IN UINTN UefiMemoryBase
,
25 IN UINT64 StartTimeStamp
28 //Enable the GIC Distributor
29 PL390GicEnableDistributor(PcdGet32(PcdGicDistributorBase
));
31 // If ArmVe has not been built as Standalone then we need to wake up the secondary cores
32 if (!FixedPcdGet32(PcdStandalone
)) {
33 // Sending SGI to all the Secondary CPU interfaces
34 PL390GicSendSgiTo (PcdGet32(PcdGicDistributorBase
), GIC_ICDSGIR_FILTER_EVERYONEELSE
, 0x0E);
37 PrePiMain (UefiMemoryBase
, StackBase
, StartTimeStamp
);
39 // We must never return
48 // Function pointer to Secondary Core entry point
49 VOID (*secondary_start
)(VOID
);
50 UINTN secondary_entry_addr
=0;
52 // Clear Secondary cores MailBox
53 ArmClearMPCoreMailbox();
55 while (secondary_entry_addr
= ArmGetMPCoreMailbox(), secondary_entry_addr
== 0) {
57 // Acknowledge the interrupt and send End of Interrupt signal.
58 PL390GicAcknowledgeSgiFrom(PcdGet32(PcdGicInterruptInterfaceBase
),0/*CoreId*/);
61 secondary_start
= (VOID (*)())secondary_entry_addr
;
63 // Jump to secondary core entry point.
66 // The secondaries shouldn't reach here