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1 /** @file
2 *
3 * Copyright (c) 2011, ARM Limited. All rights reserved.
4 *
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
9 *
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
12 *
13 **/
14
15 #include "PrePi.h"
16
17 #include <Library/ArmGicLib.h>
18 #include <Chipset/ArmV7.h>
19
20 VOID
21 PrimaryMain (
22 IN UINTN UefiMemoryBase,
23 IN UINTN StacksBase,
24 IN UINTN GlobalVariableBase,
25 IN UINT64 StartTimeStamp
26 )
27 {
28 // Enable the GIC Distributor
29 ArmGicEnableDistributor(PcdGet32(PcdGicDistributorBase));
30
31 // In some cases, the secondary cores are waiting for an SGI from the next stage boot loader toresume their initialization
32 if (!FixedPcdGet32(PcdSendSgiToBringUpSecondaryCores)) {
33 // Sending SGI to all the Secondary CPU interfaces
34 ArmGicSendSgiTo (PcdGet32(PcdGicDistributorBase), ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE, 0x0E);
35 }
36
37 PrePiMain (UefiMemoryBase, StacksBase, GlobalVariableBase, StartTimeStamp);
38
39 // We must never return
40 ASSERT(FALSE);
41 }
42
43 VOID
44 SecondaryMain (
45 IN UINTN MpId
46 )
47 {
48 // Function pointer to Secondary Core entry point
49 VOID (*secondary_start)(VOID);
50 UINTN secondary_entry_addr=0;
51
52 // Clear Secondary cores MailBox
53 ArmClearMPCoreMailbox();
54
55 while (secondary_entry_addr = ArmGetMPCoreMailbox(), secondary_entry_addr == 0) {
56 ArmCallWFI();
57 // Acknowledge the interrupt and send End of Interrupt signal.
58 ArmGicAcknowledgeSgiFrom (PcdGet32(PcdGicInterruptInterfaceBase), PRIMARY_CORE_ID);
59 }
60
61 secondary_start = (VOID (*)())secondary_entry_addr;
62
63 // Jump to secondary core entry point.
64 secondary_start();
65
66 // The secondaries shouldn't reach here
67 ASSERT(FALSE);
68 }