ArmPlatformPkg/Sec/Helper.S

   1 #========================================================================================
   2 #  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   3 #
   4 #  This program and the accompanying materials
   5 #  are licensed and made available under the terms and conditions of the BSD License
   6 #  which accompanies this distribution.  The full text of the license may be found at
   7 #  http:#opensource.org/licenses/bsd-license.php
   8 #
   9 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 #
  12 #=======================================================================================
  13
  14 #start of the code section
  15 .text
  16 .align 3
  17
  18 GCC_ASM_EXPORT(return_from_exception)
  19 GCC_ASM_EXPORT(enter_monitor_mode)
  20 GCC_ASM_EXPORT(copy_cpsr_into_spsr)
  21 GCC_ASM_EXPORT(set_non_secure_mode)
  22
  23 # r0: Monitor World EntryPoint
  24 # r1: MpId
  25 # r2: Secure Monitor mode stack
  26 ASM_PFX(enter_monitor_mode):
  27     cmp     r2, #0                      @ If a Secure Monitor stack base has not been defined then use the Secure stack
  28     moveq   r2, sp
  29
  30     mrs     r4, cpsr                    @ Save current mode (SVC) in r4
  31     bic     r3, r4, #0x1f               @ Clear all mode bits
  32     orr     r3, r3, #0x16               @ Set bits for Monitor mode
  33     msr     cpsr_cxsf, r3               @ We are now in Monitor Mode
  34
  35     mov   sp, r2                      @ Set the stack of the Monitor Mode
  36
  37     mov     lr, r0                      @ Use the pass entrypoint as lr
  38
  39     msr     spsr_cxsf, r4               @ Use saved mode for the MOVS jump to the kernel
  40
  41     mov     r4, r0                      @ Swap EntryPoint and MpId registers
  42     mov     r0, r1
  43
  44     bx      r4
  45
  46 # We cannot use the instruction 'movs pc, lr' because the caller can be written either in ARM or Thumb2 assembler.
  47 # When we will jump into this function, we will set the CPSR flag to ARM assembler. By copying directly 'lr' into
  48 # 'pc'; we will not change the CPSR flag and it will crash.
  49 # The way to fix this limitation is to do the movs into the ARM assmbler code and then do a 'bx'.
  50 ASM_PFX(return_from_exception):
  51     ldr     lr, returned_exception
  52
  53     #The following instruction breaks the code.
  54     #movs    pc, lr
  55     mrs     r2, cpsr
  56     bic     r2, r2, #0x1f
  57     orr     r2, r2, #0x13
  58     msr     cpsr_c, r2
  59
  60 returned_exception:                           @ We are now in non-secure state
  61     bx      r0
  62
  63 # Save the current Program Status Register (PSR) into the Saved PSR
  64 ASM_PFX(copy_cpsr_into_spsr):
  65     mrs     r0, cpsr
  66     msr     spsr_cxsf, r0
  67     bx      lr
  68
  69 # Set the Non Secure Mode
  70 ASM_PFX(set_non_secure_mode):
  71     push    { r1 }
  72     and     r0, r0, #0x1f     @ Keep only the mode bits
  73     mrs     r1, spsr          @ Read the spsr
  74     bic     r1, r1, #0x1f     @ Clear all mode bits
  75     orr     r1, r1, r0
  76     msr     spsr_cxsf, r1     @ write back spsr (may have caused a mode switch)
  77     isb
  78     pop     { r1 }
  79     bx      lr                @ return (hopefully thumb-safe!)
  80
  81 dead:
  82     b       dead
  83
  84 ASM_FUNCTION_REMOVE_IF_UNREFERENCED