ArmPlatformPkg/Sec/Sec.c

   1 /** @file
   2 *  Main file supporting the SEC Phase on ARM Platforms
   3 *
   4 *  Copyright (c) 2011, ARM Limited. All rights reserved.
   5 *
   6 *  This program and the accompanying materials
   7 *  are licensed and made available under the terms and conditions of the BSD License
   8 *  which accompanies this distribution.  The full text of the license may be found at
   9 *  http://opensource.org/licenses/bsd-license.php
  10 *
  11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 *
  14 **/
  15
  16 #include <Library/DebugAgentLib.h>
  17 #include <Library/PrintLib.h>
  18 #include <Library/BaseMemoryLib.h>
  19 #include <Library/SerialPortLib.h>
  20 #include <Library/ArmGicLib.h>
  21 #include <Library/ArmCpuLib.h>
  22
  23 #include "SecInternal.h"
  24
  25 #define SerialPrint(txt)  SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
  26
  27 extern VOID *monitor_vector_table;
  28
  29 VOID
  30 CEntryPoint (
  31   IN  UINTN                     MpId
  32   )
  33 {
  34   CHAR8           Buffer[100];
  35   UINTN           CharCount;
  36   UINTN           JumpAddress;
  37
  38   // Invalidate the data cache. Doesn't have to do the Data cache clean.
  39   ArmInvalidateDataCache();
  40
  41   // Invalidate Instruction Cache
  42   ArmInvalidateInstructionCache();
  43
  44   // Invalidate I & D TLBs
  45   ArmInvalidateInstructionAndDataTlb();
  46
  47   // CPU specific settings
  48   ArmCpuSetup (MpId);
  49
  50   // Primary CPU clears out the SCU tag RAMs, secondaries wait
  51   if (IS_PRIMARY_CORE(MpId)) {
  52     if (ArmIsMpCore()) {
  53       ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT);
  54     }
  55
  56     // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
  57     // In non SEC modules the init call is in autogenerated code.
  58     SerialPortInitialize ();
  59
  60     // Start talking
  61     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__);
  62     SerialPortWrite ((UINT8 *) Buffer, CharCount);
  63
  64     // Initialize the Debug Agent for Source Level Debugging
  65     InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
  66     SaveAndSetDebugTimerInterrupt (TRUE);
  67
  68     // Now we've got UART, make the check:
  69     // - The Vector table must be 32-byte aligned
  70     ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0);
  71
  72     // Enable the GIC distributor and CPU Interface
  73     // - no other Interrupts are enabled,  doesn't have to worry about the priority.
  74     // - all the cores are in secure state, use secure SGI's
  75     ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
  76     ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
  77   } else {
  78     // Enable the GIC CPU Interface
  79     ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
  80   }
  81
  82   // Enable Full Access to CoProcessors
  83   ArmWriteCPACR (CPACR_CP_FULL_ACCESS);
  84
  85   if (FixedPcdGet32 (PcdVFPEnabled)) {
  86     ArmEnableVFP();
  87   }
  88
  89   if (IS_PRIMARY_CORE(MpId)) {
  90     // Initialize peripherals that must be done at the early stage
  91     // Example: Some L2x0 controllers must be initialized in Secure World
  92     ArmPlatformSecInitialize ();
  93
  94     // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
  95     // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
  96     if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
  97       // Initialize system memory (DRAM)
  98       ArmPlatformInitializeSystemMemory ();
  99     }
 100   }
 101
 102   // Test if Trustzone is supported on this platform
 103   if (FixedPcdGetBool (PcdTrustzoneSupport)) {
 104     // Ensure the Monitor Stack Base & Size have been set
 105     ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0);
 106     ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0);
 107
 108     if (ArmIsMpCore()) {
 109       // Setup SMP in Non Secure world
 110       ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
 111     }
 112
 113     // Enter Monitor Mode
 114     enter_monitor_mode ((VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * GET_CORE_POS(MpId))));
 115
 116     //Write the monitor mode vector table address
 117     ArmWriteVMBar((UINT32) &monitor_vector_table);
 118
 119     //-------------------- Monitor Mode ---------------------
 120     // Setup the Trustzone Chipsets
 121     if (IS_PRIMARY_CORE(MpId)) {
 122       ArmPlatformTrustzoneInit ();
 123
 124       // Waiting for the Primary Core to have finished to initialize the Secure World
 125       ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT);
 126     } else {
 127       // The secondary cores need to wait until the Trustzone chipsets configuration is done
 128       // before switching to Non Secure World
 129
 130       // Waiting for the Primary Core to have finished to initialize the Secure World
 131       ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT);
 132     }
 133
 134     // Transfer the interrupt to Non-secure World
 135     ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
 136
 137     // Write to CP15 Non-secure Access Control Register
 138     ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
 139
 140     // CP15 Secure Configuration Register
 141     ArmWriteScr (PcdGet32 (PcdArmScr));
 142   } else {
 143     if (IS_PRIMARY_CORE(MpId)) {
 144       SerialPrint ("Trust Zone Configuration is disabled\n\r");
 145     }
 146
 147     // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
 148     // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
 149     // Status Register as the the current one (CPSR).
 150     copy_cpsr_into_spsr ();
 151   }
 152
 153   JumpAddress = PcdGet32 (PcdFvBaseAddress);
 154   ArmPlatformSecExtraAction (MpId, &JumpAddress);
 155
 156   // If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
 157   // By not set, the mode for Non Secure World is SVC
 158   if (PcdGet32 (PcdArmNonSecModeTransition) != 0) {
 159     set_non_secure_mode ((ARM_PROCESSOR_MODE)PcdGet32 (PcdArmNonSecModeTransition));
 160   }
 161
 162   return_from_exception (JumpAddress);
 163   //-------------------- Non Secure Mode ---------------------
 164
 165   // PEI Core should always load and never return
 166   ASSERT (FALSE);
 167 }
 168
 169 VOID
 170 SecCommonExceptionEntry (
 171   IN UINT32 Entry,
 172   IN UINT32 LR
 173   )
 174 {
 175   CHAR8           Buffer[100];
 176   UINTN           CharCount;
 177
 178   switch (Entry) {
 179   case 0:
 180     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);
 181     break;
 182   case 1:
 183     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);
 184     break;
 185   case 2:
 186     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);
 187     break;
 188   case 3:
 189     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);
 190     break;
 191   case 4:
 192     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);
 193     break;
 194   case 5:
 195     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);
 196     break;
 197   case 6:
 198     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);
 199     break;
 200   case 7:
 201     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);
 202     break;
 203   default:
 204     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);
 205     break;
 206   }
 207   SerialPortWrite ((UINT8 *) Buffer, CharCount);
 208   while(1);
 209 }