ArmPlatformPkg/Sec/Sec.c

   1 /** @file
   2 *  Main file supporting the SEC Phase on ARM Platforms
   3 *
   4 *  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   5 *
   6 *  This program and the accompanying materials
   7 *  are licensed and made available under the terms and conditions of the BSD License
   8 *  which accompanies this distribution.  The full text of the license may be found at
   9 *  http://opensource.org/licenses/bsd-license.php
  10 *
  11 *  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  12 *  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  13 *
  14 **/
  15
  16 #include <Library/ArmTrustedMonitorLib.h>
  17 #include <Library/DebugAgentLib.h>
  18 #include <Library/PrintLib.h>
  19 #include <Library/BaseMemoryLib.h>
  20 #include <Library/SerialPortLib.h>
  21 #include <Library/ArmGicLib.h>
  22 #include <Library/ArmCpuLib.h>
  23
  24 #include "SecInternal.h"
  25
  26 #define SerialPrint(txt)  SerialPortWrite ((UINT8*)txt, AsciiStrLen(txt)+1);
  27
  28 VOID
  29 CEntryPoint (
  30   IN  UINTN                     MpId
  31   )
  32 {
  33   CHAR8           Buffer[100];
  34   UINTN           CharCount;
  35
  36   // Invalidate the data cache. Doesn't have to do the Data cache clean.
  37   ArmInvalidateDataCache();
  38
  39   // Invalidate Instruction Cache
  40   ArmInvalidateInstructionCache();
  41
  42   // Invalidate I & D TLBs
  43   ArmInvalidateInstructionAndDataTlb();
  44
  45   // CPU specific settings
  46   ArmCpuSetup (MpId);
  47
  48   // Enable Floating Point Coprocessor if supported by the platform
  49   if (FixedPcdGet32 (PcdVFPEnabled)) {
  50     ArmEnableVFP();
  51   }
  52
  53   // Primary CPU clears out the SCU tag RAMs, secondaries wait
  54   if (IS_PRIMARY_CORE(MpId)) {
  55     if (ArmIsMpCore()) {
  56       ArmCpuSynchronizeSignal (ARM_CPU_EVENT_BOOT_MEM_INIT);
  57     }
  58
  59     // SEC phase needs to run library constructors by hand. This assumes we are linked against the SerialLib
  60     // In non SEC modules the init call is in autogenerated code.
  61     SerialPortInitialize ();
  62
  63     // Start talking
  64     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"UEFI firmware built at %a on %a\n\r",__TIME__, __DATE__);
  65     SerialPortWrite ((UINT8 *) Buffer, CharCount);
  66
  67     // Initialize the Debug Agent for Source Level Debugging
  68     InitializeDebugAgent (DEBUG_AGENT_INIT_PREMEM_SEC, NULL, NULL);
  69     SaveAndSetDebugTimerInterrupt (TRUE);
  70
  71     // Now we've got UART, make the check:
  72     // - The Vector table must be 32-byte aligned
  73     ASSERT(((UINT32)SecVectorTable & ((1 << 5)-1)) == 0);
  74
  75     // Enable the GIC distributor and CPU Interface
  76     // - no other Interrupts are enabled,  doesn't have to worry about the priority.
  77     // - all the cores are in secure state, use secure SGI's
  78     ArmGicEnableDistributor (PcdGet32(PcdGicDistributorBase));
  79     ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
  80   } else {
  81     // Enable the GIC CPU Interface
  82     ArmGicEnableInterruptInterface (PcdGet32(PcdGicInterruptInterfaceBase));
  83   }
  84
  85   // Enable Full Access to CoProcessors
  86   ArmWriteCPACR (CPACR_CP_FULL_ACCESS);
  87
  88   if (IS_PRIMARY_CORE(MpId)) {
  89     // Initialize peripherals that must be done at the early stage
  90     // Example: Some L2x0 controllers must be initialized in Secure World
  91     ArmPlatformSecInitialize ();
  92
  93     // If we skip the PEI Core we could want to initialize the DRAM in the SEC phase.
  94     // If we are in standalone, we need the initialization to copy the UEFI firmware into DRAM
  95     if (FeaturePcdGet (PcdSystemMemoryInitializeInSec)) {
  96       // Initialize system memory (DRAM)
  97       ArmPlatformInitializeSystemMemory ();
  98     }
  99   }
 100
 101   // Test if Trustzone is supported on this platform
 102   if (FixedPcdGetBool (PcdTrustzoneSupport)) {
 103     // Ensure the Monitor Stack Base & Size have been set
 104     ASSERT(PcdGet32(PcdCPUCoresSecMonStackBase) != 0);
 105     ASSERT(PcdGet32(PcdCPUCoreSecMonStackSize) != 0);
 106
 107     if (ArmIsMpCore()) {
 108       // Setup SMP in Non Secure world
 109       ArmCpuSetupSmpNonSecure (GET_CORE_ID(MpId));
 110     }
 111
 112     // Enter Monitor Mode
 113     enter_monitor_mode ((UINTN)TrustedWorldInitialization, MpId, (VOID*)(PcdGet32(PcdCPUCoresSecMonStackBase) + (PcdGet32(PcdCPUCoreSecMonStackSize) * (GET_CORE_POS(MpId) + 1))));
 114   } else {
 115     if (IS_PRIMARY_CORE(MpId)) {
 116       SerialPrint ("Trust Zone Configuration is disabled\n\r");
 117     }
 118
 119     // With Trustzone support the transition from Sec to Normal world is done by return_from_exception().
 120     // If we want to keep this function call we need to ensure the SVC's SPSR point to the same Program
 121     // Status Register as the the current one (CPSR).
 122     copy_cpsr_into_spsr ();
 123
 124     NonTrustedWorldTransition (MpId);
 125   }
 126   ASSERT (0); // We must never return from the above function
 127 }
 128
 129 VOID
 130 TrustedWorldInitialization (
 131   IN  UINTN                     MpId
 132   )
 133 {
 134   //-------------------- Monitor Mode ---------------------
 135
 136   // Set up Monitor World (Vector Table, etc)
 137   ArmSecureMonitorWorldInitialize ();
 138
 139   // Setup the Trustzone Chipsets
 140   if (IS_PRIMARY_CORE(MpId)) {
 141     ArmPlatformTrustzoneInit ();
 142
 143     if (ArmIsMpCore()) {
 144       // Waiting for the Primary Core to have finished to initialize the Secure World
 145       ArmCpuSynchronizeSignal (ARM_CPU_EVENT_SECURE_INIT);
 146     }
 147   } else {
 148     // The secondary cores need to wait until the Trustzone chipsets configuration is done
 149     // before switching to Non Secure World
 150
 151     // Waiting for the Primary Core to have finished to initialize the Secure World
 152     ArmCpuSynchronizeWait (ARM_CPU_EVENT_SECURE_INIT);
 153   }
 154
 155   // Transfer the interrupt to Non-secure World
 156   ArmGicSetupNonSecure (PcdGet32(PcdGicDistributorBase), PcdGet32(PcdGicInterruptInterfaceBase));
 157
 158   // Write to CP15 Non-secure Access Control Register
 159   ArmWriteNsacr (PcdGet32 (PcdArmNsacr));
 160
 161   // CP15 Secure Configuration Register
 162   ArmWriteScr (PcdGet32 (PcdArmScr));
 163
 164   NonTrustedWorldTransition (MpId);
 165 }
 166
 167 VOID
 168 NonTrustedWorldTransition (
 169   IN  UINTN                     MpId
 170   )
 171 {
 172   UINTN           JumpAddress;
 173
 174   JumpAddress = PcdGet32 (PcdFvBaseAddress);
 175   ArmPlatformSecExtraAction (MpId, &JumpAddress);
 176
 177   // If PcdArmNonSecModeTransition is defined then set this specific mode to CPSR before the transition
 178   // By not set, the mode for Non Secure World is SVC
 179   if (PcdGet32 (PcdArmNonSecModeTransition) != 0) {
 180     set_non_secure_mode ((ARM_PROCESSOR_MODE)PcdGet32 (PcdArmNonSecModeTransition));
 181   }
 182
 183   return_from_exception (JumpAddress);
 184   //-------------------- Non Secure Mode ---------------------
 185
 186   // PEI Core should always load and never return
 187   ASSERT (FALSE);
 188 }
 189
 190 VOID
 191 SecCommonExceptionEntry (
 192   IN UINT32 Entry,
 193   IN UINT32 LR
 194   )
 195 {
 196   CHAR8           Buffer[100];
 197   UINTN           CharCount;
 198
 199   switch (Entry) {
 200   case 0:
 201     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reset Exception at 0x%X\n\r",LR);
 202     break;
 203   case 1:
 204     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Undefined Exception at 0x%X\n\r",LR);
 205     break;
 206   case 2:
 207     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"SWI Exception at 0x%X\n\r",LR);
 208     break;
 209   case 3:
 210     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"PrefetchAbort Exception at 0x%X\n\r",LR);
 211     break;
 212   case 4:
 213     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"DataAbort Exception at 0x%X\n\r",LR);
 214     break;
 215   case 5:
 216     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Reserved Exception at 0x%X\n\r",LR);
 217     break;
 218   case 6:
 219     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"IRQ Exception at 0x%X\n\r",LR);
 220     break;
 221   case 7:
 222     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"FIQ Exception at 0x%X\n\r",LR);
 223     break;
 224   default:
 225     CharCount = AsciiSPrint (Buffer,sizeof (Buffer),"Unknown Exception at 0x%X\n\r",LR);
 226     break;
 227   }
 228   SerialPortWrite ((UINT8 *) Buffer, CharCount);
 229   while(1);
 230 }