ArmPlatformPkg/Sec/SecEntryPoint.asm

   1 //
   2 //  Copyright (c) 2011-2012, ARM Limited. All rights reserved.
   3 //
   4 //  This program and the accompanying materials
   5 //  are licensed and made available under the terms and conditions of the BSD License
   6 //  which accompanies this distribution.  The full text of the license may be found at
   7 //  http://opensource.org/licenses/bsd-license.php
   8 //
   9 //  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  10 //  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  11 //
  12 //
  13
  14 #include <AutoGen.h>
  15 #include <AsmMacroIoLib.h>
  16 #include "SecInternal.h"
  17
  18   INCLUDE AsmMacroIoLib.inc
  19
  20   IMPORT  CEntryPoint
  21   IMPORT  ArmPlatformSecBootAction
  22   IMPORT  ArmPlatformSecBootMemoryInit
  23   IMPORT  ArmDisableInterrupts
  24   IMPORT  ArmDisableCachesAndMmu
  25   IMPORT  ArmReadMpidr
  26   IMPORT  ArmCallWFE
  27   EXPORT  _ModuleEntryPoint
  28
  29   PRESERVE8
  30   AREA    SecEntryPoint, CODE, READONLY
  31
  32 StartupAddr        DCD      CEntryPoint
  33
  34 _ModuleEntryPoint FUNCTION
  35   // First ensure all interrupts are disabled
  36   blx   ArmDisableInterrupts
  37
  38   // Ensure that the MMU and caches are off
  39   blx   ArmDisableCachesAndMmu
  40
  41   // By default, we are doing a cold boot
  42   mov   r10, #ARM_SEC_COLD_BOOT
  43
  44   // Jump to Platform Specific Boot Action function
  45   blx   ArmPlatformSecBootAction
  46
  47 _IdentifyCpu
  48   // Identify CPU ID
  49   bl    ArmReadMpidr
  50   // Get ID of this CPU in Multicore system
  51   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
  52   and   r5, r0, r1
  53
  54   // Is it the Primary Core ?
  55   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r3)
  56   cmp   r5, r3
  57   // Only the primary core initialize the memory (SMC)
  58   beq   _InitMem
  59
  60 _WaitInitMem
  61   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
  62   // Otherwise we have to wait the Primary Core to finish the initialization
  63   cmp   r10, #ARM_SEC_COLD_BOOT
  64   bne   _SetupSecondaryCoreStack
  65
  66   // Wait for the primary core to initialize the initial memory (event: BOOT_MEM_INIT)
  67   bl    ArmCallWFE
  68   // Now the Init Mem is initialized, we setup the secondary core stacks
  69   b     _SetupSecondaryCoreStack
  70
  71 _InitMem
  72   // If we are not doing a cold boot in this case we should assume the Initial Memory to be already initialized
  73   cmp   r10, #ARM_SEC_COLD_BOOT
  74   bne   _SetupPrimaryCoreStack
  75
  76   // Initialize Init Boot Memory
  77   bl    ArmPlatformSecBootMemoryInit
  78
  79   // Only Primary CPU could run this line (the secondary cores have jumped from _IdentifyCpu to _SetupStack)
  80   LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r5)
  81
  82 _SetupPrimaryCoreStack
  83   // Get the top of the primary stacks (and the base of the secondary stacks)
  84   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
  85   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
  86   add   r1, r1, r2
  87
  88   LoadConstantToReg (FixedPcdGet32(PcdSecGlobalVariableSize), r2)
  89
  90   // The reserved space for global variable must be 8-bytes aligned for pushing
  91   // 64-bit variable on the stack
  92   SetPrimaryStack (r1, r2, r3)
  93   b     _PrepareArguments
  94
  95 _SetupSecondaryCoreStack
  96   // Get the top of the primary stacks (and the base of the secondary stacks)
  97   LoadConstantToReg (FixedPcdGet32(PcdCPUCoresSecStackBase), r1)
  98   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecPrimaryStackSize), r2)
  99   add   r1, r1, r2
 100
 101   // Get the Core Position (ClusterId * 4) + CoreId
 102   GetCorePositionFromMpId(r0, r5, r2)
 103   // The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
 104   add   r0, r0, #1
 105
 106   // StackOffset = CorePos * StackSize
 107   LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecSecondaryStackSize), r2)
 108   mul   r0, r0, r2
 109   // SP = StackBase + StackOffset
 110   add   sp, r1, r0
 111
 112 _PrepareArguments
 113   // Move sec startup address into a data register
 114   // Ensure we're jumping to FV version of the code (not boot remapped alias)
 115   ldr   r3, StartupAddr
 116
 117   // Jump to SEC C code
 118   //    r0 = mp_id
 119   //    r1 = Boot Mode
 120   mov   r0, r5
 121   mov   r1, r10
 122   blx   r3
 123   ENDFUNC
 124
 125 _NeverReturn
 126   b _NeverReturn
 127   END