ArmVirtPkg/Library/ArmXenRelocatablePlatformLib/AARCH64/RelocatableVirtHelper.S

   1 #
   2 #  Copyright (c) 2011-2013, ARM Limited. All rights reserved.
   3 #  Copyright (c) 2016, Linaro Limited. All rights reserved.
   4 #
   5 #  This program and the accompanying materials
   6 #  are licensed and made available under the terms and conditions of the BSD License
   7 #  which accompanies this distribution.  The full text of the license may be found at
   8 #  http://opensource.org/licenses/bsd-license.php
   9 #
  10 #  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  11 #  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
  12 #
  13 #
  14
  15 #include <AsmMacroIoLibV8.h>
  16 #include <Library/ArmLib.h>
  17
  18 // VOID
  19 // ArmPlatformPeiBootAction (
  20 //   VOID   *DeviceTreeBaseAddress,   // passed by loader in x0
  21 //   VOID   *ImageBase                // passed by FDF trampoline in x1
  22 //   );
  23 ASM_FUNC(ArmPlatformPeiBootAction)
  24   mov   x29, x30            // preserve LR
  25   mov   x28, x0             // preserve DTB pointer
  26   mov   x27, x1             // preserve base of image pointer
  27
  28   //
  29   // If we are booting from RAM using the Linux kernel boot protocol, x0 will
  30   // point to the DTB image in memory. Otherwise, we are just coming out of
  31   // reset, and x0 will be 0.
  32   //
  33   cbz   x0, .Lout
  34
  35   //
  36   // The base of the runtime image has been preserved in x1. Check whether
  37   // the expected magic number can be found in the header.
  38   //
  39   ldr   w8, .LArm64LinuxMagic
  40   ldr   w9, [x1, #0x38]
  41   cmp   w8, w9
  42   bne   .Lout
  43
  44   //
  45   //
  46   // OK, so far so good. We have confirmed that we likely have a DTB and are
  47   // booting via the arm64 Linux boot protocol. Update the base-of-image PCD
  48   // to the actual relocated value, and add the shift of PcdFdBaseAddress to
  49   // PcdFvBaseAddress as well
  50   //
  51   adr   x8, PcdGet64 (PcdFdBaseAddress)
  52   adr   x9, PcdGet64 (PcdFvBaseAddress)
  53   ldr   x6, [x8]
  54   ldr   x7, [x9]
  55   sub   x7, x7, x6
  56   add   x7, x7, x1
  57   str   x1, [x8]
  58   str   x7, [x9]
  59
  60   //
  61   // Discover the memory size and offset from the DTB, and record in the
  62   // respective PCDs. This will also return false if a corrupt DTB is
  63   // encountered. Since we are calling a C function, use the window at the
  64   // beginning of the FD image as a temp stack.
  65   //
  66   adr   x1, PcdGet64 (PcdSystemMemoryBase)
  67   adr   x2, PcdGet64 (PcdSystemMemorySize)
  68   mov   sp, x7
  69   bl    FindMemnode
  70   cbz   x0, .Lout
  71
  72   //
  73   // Copy the DTB to the slack space right after the 64 byte arm64/Linux style
  74   // image header at the base of this image (defined in the FDF), and record the
  75   // pointer in PcdDeviceTreeInitialBaseAddress.
  76   //
  77   adr   x8, PcdGet64 (PcdDeviceTreeInitialBaseAddress)
  78   add   x27, x27, #0x40
  79   str   x27, [x8]
  80
  81   mov   x0, x27
  82   mov   x1, x28
  83   bl    CopyFdt
  84
  85 .Lout:
  86   ret    x29
  87
  88 .LArm64LinuxMagic:
  89   .byte   0x41, 0x52, 0x4d, 0x64
  90
  91 //UINTN
  92 //ArmPlatformGetPrimaryCoreMpId (
  93 //  VOID
  94 //  );
  95 ASM_FUNC(ArmPlatformGetPrimaryCoreMpId)
  96   MOV32  (w0, FixedPcdGet32 (PcdArmPrimaryCore))
  97   ret
  98
  99 //UINTN
 100 //ArmPlatformIsPrimaryCore (
 101 //  IN UINTN MpId
 102 //  );
 103 ASM_FUNC(ArmPlatformIsPrimaryCore)
 104   mov   x0, #1
 105   ret
 106
 107 //UINTN
 108 //ArmPlatformGetCorePosition (
 109 //  IN UINTN MpId
 110 //  );
 111 // With this function: CorePos = (ClusterId * 4) + CoreId
 112 ASM_FUNC(ArmPlatformGetCorePosition)
 113   and   x1, x0, #ARM_CORE_MASK
 114   and   x0, x0, #ARM_CLUSTER_MASK
 115   add   x0, x1, x0, LSR #6
 116   ret
 117
 118 //EFI_PHYSICAL_ADDRESS
 119 //GetPhysAddrTop (
 120 //  VOID
 121 //  );
 122 ASM_FUNC(ArmGetPhysAddrTop)
 123   mrs   x0, id_aa64mmfr0_el1
 124   adr   x1, .LPARanges
 125   and   x0, x0, #7
 126   ldrb  w1, [x1, x0]
 127   mov   x0, #1
 128   lsl   x0, x0, x1
 129   ret
 130
 131 //
 132 // Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
 133 // physical address space support on this CPU:
 134 // 0 == 32 bits, 1 == 36 bits, etc etc
 135 // 6 and 7 are reserved
 136 //
 137 .LPARanges:
 138   .byte 32, 36, 40, 42, 44, 48, -1, -1
 139
 140 ASM_FUNCTION_REMOVE_IF_UNREFERENCED