3 * Copyright (c) 2011-2014, ARM Limited. All rights reserved.
5 * This program and the accompanying materials
6 * are licensed and made available under the terms and conditions of the BSD License
7 * which accompanies this distribution. The full text of the license may be found at
8 * http://opensource.org/licenses/bsd-license.php
10 * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
11 * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
17 #include <Library/PrePiLib.h>
18 #include <Library/PrintLib.h>
19 #include <Library/PeCoffGetEntryPointLib.h>
20 #include <Library/PrePiHobListPointerLib.h>
21 #include <Library/TimerLib.h>
22 #include <Library/PerformanceLib.h>
23 #include <Library/CacheMaintenanceLib.h>
25 #include <Ppi/GuidedSectionExtraction.h>
26 #include <Ppi/ArmMpCoreInfo.h>
27 #include <Guid/LzmaDecompress.h>
30 #include "LzmaDecompress.h"
34 ProcessLibraryConstructorList (
46 EFI_PEI_PPI_DESCRIPTOR
*PpiList
;
50 ArmPlatformGetPlatformPpiList (&PpiListSize
, &PpiList
);
51 PpiListCount
= PpiListSize
/ sizeof(EFI_PEI_PPI_DESCRIPTOR
);
52 for (Index
= 0; Index
< PpiListCount
; Index
++, PpiList
++) {
53 if (CompareGuid (PpiList
->Guid
, PpiGuid
) == TRUE
) {
64 IN UINTN UefiMemoryBase
,
66 IN UINT64 StartTimeStamp
69 EFI_HOB_HANDOFF_INFO_TABLE
* HobList
;
75 // Initialize the architecture specific bits
78 // Declare the PI/UEFI memory region
79 HobList
= HobConstructor (
80 (VOID
*)UefiMemoryBase
,
81 FixedPcdGet32 (PcdSystemMemoryUefiRegionSize
),
82 (VOID
*)UefiMemoryBase
,
83 (VOID
*)StacksBase
// The top of the UEFI Memory is reserved for the stacks
85 PrePeiSetHobList (HobList
);
88 // Ensure that the loaded image is invalidated in the caches, so that any
89 // modifications we made with the caches and MMU off (such as the applied
90 // relocations) don't become invisible once we turn them on.
92 InvalidateDataCacheRange((VOID
*)(UINTN
)PcdGet64 (PcdFdBaseAddress
), PcdGet32 (PcdFdSize
));
94 // Initialize MMU and Memory HOBs (Resource Descriptor HOBs)
95 Status
= MemoryPeim (UefiMemoryBase
, FixedPcdGet32 (PcdSystemMemoryUefiRegionSize
));
96 ASSERT_EFI_ERROR (Status
);
98 // Initialize the Serial Port
99 SerialPortInitialize ();
100 CharCount
= AsciiSPrint (Buffer
,sizeof (Buffer
),"UEFI firmware (version %s built at %a on %a)\n\r",
101 (CHAR16
*)PcdGetPtr(PcdFirmwareVersionString
), __TIME__
, __DATE__
);
102 SerialPortWrite ((UINT8
*) Buffer
, CharCount
);
104 // Create the Stacks HOB (reserve the memory for all stacks)
105 StacksSize
= PcdGet32 (PcdCPUCorePrimaryStackSize
);
106 BuildStackHob (StacksBase
, StacksSize
);
108 //TODO: Call CpuPei as a library
109 BuildCpuHob (PcdGet8 (PcdPrePiCpuMemorySize
), PcdGet8 (PcdPrePiCpuIoSize
));
112 SetBootMode (ArmPlatformGetBootMode ());
114 // Initialize Platform HOBs (CpuHob and FvHob)
115 Status
= PlatformPeim ();
116 ASSERT_EFI_ERROR (Status
);
118 // Now, the HOB List has been initialized, we can register performance information
119 PERF_START (NULL
, "PEI", NULL
, StartTimeStamp
);
121 // SEC phase needs to run library constructors by hand.
122 ProcessLibraryConstructorList ();
124 // Build HOBs to pass up our version of stuff the DXE Core needs to save space
125 BuildPeCoffLoaderHob ();
126 BuildExtractSectionHob (
127 &gLzmaCustomDecompressGuid
,
128 LzmaGuidedSectionGetInfo
,
129 LzmaGuidedSectionExtraction
132 // Assume the FV that contains the SEC (our code) also contains a compressed FV.
133 Status
= DecompressFirstFv ();
134 ASSERT_EFI_ERROR (Status
);
136 // Load the DXE Core and transfer control to it
137 Status
= LoadDxeCoreFromFv (NULL
, 0);
138 ASSERT_EFI_ERROR (Status
);
144 IN UINTN UefiMemoryBase
,
148 UINT64 StartTimeStamp
;
150 // Initialize the platform specific controllers
151 ArmPlatformInitialize (MpId
);
153 if (PerformanceMeasurementEnabled ()) {
154 // Initialize the Timer Library to setup the Timer HW controller
156 // We cannot call yet the PerformanceLib because the HOB List has not been initialized
157 StartTimeStamp
= GetPerformanceCounter ();
162 // Data Cache enabled on Primary core when MMU is enabled.
163 ArmDisableDataCache ();
164 // Invalidate instruction cache
165 ArmInvalidateInstructionCache ();
166 // Enable Instruction Caches on all cores.
167 ArmEnableInstructionCache ();
169 PrePiMain (UefiMemoryBase
, StacksBase
, StartTimeStamp
);
171 // DXE Core should always load and never return